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NVIDIA: SAUCE: phy: tegra: xusb: Add Tegra264 support

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Add support for the XUSB pad controller for Tegra264. Most of
the Tegra264 XUSB PADCTL registers definition and programming sequence
are the same as Tegra234, Tegra264 XUSB PADCTL can share the same
driver with Tegra186, Tegra194, and Tegra234 XUSB PADCTL.

http://nvbugs/4295138

Signed-off-by: Sing-Han Chen <singhanc@nvidia.com>
Signed-off-by: Bodla Rakesh Babu <rbodla@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Noah Wager <noah.wager@canonical.com>
Acked-by: Jacob Martin <jacob.martin@canonical.com>
Signed-off-by: Noah Wager <noah.wager@canonical.com>
This commit is contained in:
Sing-Han Chen
2024-05-27 10:08:04 +00:00
committed by Noah Wager
parent 37f47a2683
commit 3608232d16
4 changed files with 35 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/phy/tegra/Makefile
+1
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@@ -8,4 +8,5 @@ phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_210_SOC) += xusb-tegra210.o
phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_186_SOC) += xusb-tegra186.o
phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_194_SOC) += xusb-tegra186.o
phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_234_SOC) += xusb-tegra186.o
phy-tegra-xusb-$(CONFIG_ARCH_TEGRA_264_SOC) += xusb-tegra186.o
obj-$(CONFIG_PHY_TEGRA194_P2U) += phy-tegra194-p2u.o
drivers/phy/tegra/xusb-tegra186.c
+25 -1
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@@ -1684,7 +1684,8 @@ EXPORT_SYMBOL_GPL(tegra186_xusb_padctl_soc);
#endif
#if IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC) || \
IS_ENABLED(CONFIG_ARCH_TEGRA_264_SOC)
static const char * const tegra194_xusb_padctl_supply_names[] = {
"avdd-usb",
"vclamp-usb",
@@ -1765,6 +1766,29 @@ const struct tegra_xusb_padctl_soc tegra234_xusb_padctl_soc = {
.supports_lp_cfg_en = true,
};
EXPORT_SYMBOL_GPL(tegra234_xusb_padctl_soc);
const struct tegra_xusb_padctl_soc tegra264_xusb_padctl_soc = {
.num_pads = ARRAY_SIZE(tegra194_pads),
.pads = tegra194_pads,
.ports = {
.usb2 = {
.ops = &tegra186_usb2_port_ops,
.count = 4,
},
.usb3 = {
.ops = &tegra186_usb3_port_ops,
.count = 4,
},
},
.ops = &tegra186_xusb_padctl_ops,
.supply_names = tegra194_xusb_padctl_supply_names,
.num_supplies = ARRAY_SIZE(tegra194_xusb_padctl_supply_names),
.supports_gen2 = true,
.poll_trk_completed = true,
.trk_hw_mode = true,
.supports_lp_cfg_en = true,
};
EXPORT_SYMBOL_GPL(tegra264_xusb_padctl_soc);
#endif
MODULE_AUTHOR("JC Kuo <jckuo@nvidia.com>");
drivers/phy/tegra/xusb.c
+6
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@@ -77,6 +77,12 @@ static const struct of_device_id tegra_xusb_padctl_of_match[] = {
.compatible = "nvidia,tegra234-xusb-padctl",
.data = &tegra234_xusb_padctl_soc,
},
#endif
#if defined(CONFIG_ARCH_TEGRA_264_SOC)
{
.compatible = "nvidia,tegra264-xusb-padctl",
.data = &tegra264_xusb_padctl_soc,
},
#endif
{ }
};
drivers/phy/tegra/xusb.h
+3
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@@ -517,5 +517,8 @@ extern const struct tegra_xusb_padctl_soc tegra194_xusb_padctl_soc;
#if defined(CONFIG_ARCH_TEGRA_234_SOC)
extern const struct tegra_xusb_padctl_soc tegra234_xusb_padctl_soc;
#endif
#if defined(CONFIG_ARCH_TEGRA_264_SOC)
extern const struct tegra_xusb_padctl_soc tegra264_xusb_padctl_soc;
#endif
#endif /* __PHY_TEGRA_XUSB_H */