Merge 53b5e72b9d ("Merge tag 'asm-generic-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic") into android-mainline
Steps on the way to 6.4-rc1 Change-Id: I6e71a9693e700fd90f0a8cf2f45450ea6f34e7c3 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Kroah-Hartman
@@ -58,6 +58,7 @@ SoC-specific documents
|
||||
stm32/stm32f769-overview
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||||
stm32/stm32f429-overview
|
||||
stm32/stm32mp13-overview
|
||||
stm32/stm32mp151-overview
|
||||
stm32/stm32mp157-overview
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||||
stm32/stm32-dma-mdma-chaining
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||||
|
||||
|
||||
@@ -0,0 +1,36 @@
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||||
===================
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||||
STM32MP151 Overview
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===================
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||||
|
||||
Introduction
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------------
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||||
|
||||
The STM32MP151 is a Cortex-A MPU aimed at various applications.
|
||||
It features:
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- Single Cortex-A7 application core
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- Standard memories interface support
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- Standard connectivity, widely inherited from the STM32 MCU family
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- Comprehensive security support
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||||
|
||||
More details:
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||||
|
||||
- Cortex-A7 core running up to @800MHz
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- FMC controller to connect SDRAM, NOR and NAND memories
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- QSPI
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||||
- SD/MMC/SDIO support
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- Ethernet controller
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- ADC/DAC
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- USB EHCI/OHCI controllers
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- USB OTG
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- I2C, SPI busses support
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||||
- Several general purpose timers
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- Serial Audio interface
|
||||
- LCD-TFT controller
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- DCMIPP
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- SPDIFRX
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- DFSDM
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||||
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||||
:Authors:
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||||
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- Roan van Dijk <roan@protonic.nl>
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@@ -153,17 +153,27 @@ properties:
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||||
- description: Boards with the Amlogic Meson G12B A311D SoC
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||||
items:
|
||||
- enum:
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||||
- bananapi,bpi-m2s
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- khadas,vim3
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- radxa,zero2
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- const: amlogic,a311d
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- const: amlogic,g12b
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||||
- description: Boards using the BPI-CM4 module with Amlogic Meson G12B A311D SoC
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items:
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- enum:
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- bananapi,bpi-cm4io
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- const: bananapi,bpi-cm4
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- const: amlogic,a311d
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- const: amlogic,g12b
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- description: Boards with the Amlogic Meson G12B S922X SoC
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items:
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- enum:
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- azw,gsking-x
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- azw,gtking
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- azw,gtking-pro
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- bananapi,bpi-m2s
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||||
- hardkernel,odroid-go-ultra
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- hardkernel,odroid-n2
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- hardkernel,odroid-n2l
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|
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@@ -2,8 +2,8 @@
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# Copyright 2019 BayLibre, SAS
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-gx-ao-secure.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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$id: http://devicetree.org/schemas/arm/amlogic/amlogic,meson-gx-ao-secure.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Amlogic Meson Firmware registers Interface
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||||
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@@ -1,8 +1,8 @@
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||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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||||
$id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml#"
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||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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||||
$id: http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml#
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||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
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||||
|
||||
title: Amlogic Meson8/Meson8b/Meson8m2 SECBUS2 register interface
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||||
|
||||
|
||||
@@ -19,6 +19,12 @@ description: |
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||||
- MacBook Air (M1, 2020)
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||||
- iMac (24-inch, M1, 2021)
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||||
|
||||
Devices based on the "M2" SoC:
|
||||
|
||||
- MacBook Air (M2, 2022)
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||||
- MacBook Pro (13-inch, M2, 2022)
|
||||
- Mac mini (M2, 2023)
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||||
|
||||
And devices based on the "M1 Pro", "M1 Max" and "M1 Ultra" SoCs:
|
||||
|
||||
- MacBook Pro (14-inch, M1 Pro, 2021)
|
||||
@@ -70,6 +76,15 @@ properties:
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||||
- const: apple,t8103
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||||
- const: apple,arm-platform
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||||
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||||
- description: Apple M2 SoC based platforms
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||||
items:
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||||
- enum:
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||||
- apple,j413 # MacBook Air (M2, 2022)
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||||
- apple,j473 # Mac mini (M2, 2023)
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- apple,j493 # MacBook Pro (13-inch, M2, 2022)
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- const: apple,t8112
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- const: apple,arm-platform
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||||
- description: Apple M1 Pro SoC based platforms
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||||
items:
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||||
- enum:
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||||
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||||
@@ -23,6 +23,7 @@ properties:
|
||||
items:
|
||||
- enum:
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||||
- apple,t8103-pmgr
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- apple,t8112-pmgr
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- apple,t6000-pmgr
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||||
- const: apple,pmgr
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||||
- const: syscon
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@@ -85,6 +85,8 @@ properties:
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||||
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||||
compatible:
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enum:
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||||
- apple,avalanche
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||||
- apple,blizzard
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- apple,icestorm
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- apple,firestorm
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||||
- arm,arm710t
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||||
@@ -28,7 +28,8 @@ properties:
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||||
maxItems: 1
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||||
description: |
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||||
This interrupt which is used to signal an event by the secure world
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||||
software is expected to be edge-triggered.
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||||
software is expected to be either a per-cpu interrupt or an
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edge-triggered peripheral interrupt.
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||||
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method:
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enum: [smc, hvc]
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@@ -300,6 +300,7 @@ properties:
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||||
- variscite,dt6customboard
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||||
- wand,imx6q-wandboard # Wandboard i.MX6 Quad Board
|
||||
- ysoft,imx6q-yapp4-crux # i.MX6 Quad Y Soft IOTA Crux board
|
||||
- ysoft,imx6q-yapp4-pegasus # i.MX6 Quad Y Soft IOTA Pegasus board
|
||||
- zealz,imx6q-gk802 # Zealz GK802
|
||||
- zii,imx6q-zii-rdu2 # ZII RDU2 Board
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||||
- const: fsl,imx6q
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||||
@@ -410,6 +411,7 @@ properties:
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||||
- prt,prtwd3 # Protonic WD3 board
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||||
- wand,imx6qp-wandboard # Wandboard i.MX6 QuadPlus Board
|
||||
- ysoft,imx6qp-yapp4-crux-plus # i.MX6 Quad Plus Y Soft IOTA Crux+ board
|
||||
- ysoft,imx6qp-yapp4-pegasus-plus # i.MX6 Quad Plus Y Soft IOTA Pegasus+ board
|
||||
- zii,imx6qp-zii-rdu2 # ZII RDU2+ Board
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||||
- const: fsl,imx6qp
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||||
|
||||
@@ -474,9 +476,11 @@ properties:
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||||
- udoo,imx6dl-udoo # Udoo i.MX6 Dual-lite Board
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||||
- vdl,lanmcu # Van der Laan LANMCU board
|
||||
- wand,imx6dl-wandboard # Wandboard i.MX6 Dual Lite Board
|
||||
- ysoft,imx6dl-yapp4-draco # i.MX6 DualLite Y Soft IOTA Draco board
|
||||
- ysoft,imx6dl-yapp4-draco # i.MX6 Solo Y Soft IOTA Draco board
|
||||
- ysoft,imx6dl-yapp4-hydra # i.MX6 DualLite Y Soft IOTA Hydra board
|
||||
- ysoft,imx6dl-yapp4-lynx # i.MX6 DualLite Y Soft IOTA Lynx board
|
||||
- ysoft,imx6dl-yapp4-orion # i.MX6 DualLite Y Soft IOTA Orion board
|
||||
- ysoft,imx6dl-yapp4-phoenix # i.MX6 DualLite Y Soft IOTA Phoenix board
|
||||
- ysoft,imx6dl-yapp4-ursa # i.MX6 Solo Y Soft IOTA Ursa board
|
||||
- const: fsl,imx6dl
|
||||
|
||||
@@ -581,6 +585,7 @@ properties:
|
||||
- kobo,aura2
|
||||
- kobo,tolino-shine2hd
|
||||
- kobo,tolino-shine3
|
||||
- kobo,tolino-vision
|
||||
- kobo,tolino-vision5
|
||||
- revotics,imx6sl-warp # Revotics WaRP Board
|
||||
- const: fsl,imx6sl
|
||||
@@ -702,6 +707,15 @@ properties:
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||||
- const: armadeus,imx6ull-opos6ul # OPOS6UL (i.MX6ULL) SoM
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||||
- const: fsl,imx6ull
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||||
|
||||
- description: i.MX6ULL chargebyte Tarragon Boards
|
||||
items:
|
||||
- enum:
|
||||
- chargebyte,imx6ull-tarragon-master
|
||||
- chargebyte,imx6ull-tarragon-micro
|
||||
- chargebyte,imx6ull-tarragon-slave
|
||||
- chargebyte,imx6ull-tarragon-slavext
|
||||
- const: fsl,imx6ull
|
||||
|
||||
- description: i.MX6ULL DHCOM SoM based Boards
|
||||
items:
|
||||
- enum:
|
||||
@@ -1002,6 +1016,7 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- beacon,imx8mp-beacon-kit # i.MX8MP Beacon Development Kit
|
||||
- dmo,imx8mp-data-modul-edm-sbc # i.MX8MP eDM SBC
|
||||
- fsl,imx8mp-evk # i.MX8MP EVK Board
|
||||
- gateworks,imx8mp-gw74xx # i.MX8MP Gateworks Board
|
||||
- polyhex,imx8mp-debix # Polyhex Debix boards
|
||||
@@ -1020,7 +1035,9 @@ properties:
|
||||
|
||||
- description: i.MX8MP DHCOM based Boards
|
||||
items:
|
||||
- const: dh,imx8mp-dhcom-pdk2 # i.MX8MP DHCOM SoM on PDK2 board
|
||||
- enum:
|
||||
- dh,imx8mp-dhcom-pdk2 # i.MX8MP DHCOM SoM on PDK2 board
|
||||
- dh,imx8mp-dhcom-pdk3 # i.MX8MP DHCOM SoM on PDK3 board
|
||||
- const: dh,imx8mp-dhcom-som # i.MX8MP DHCOM SoM
|
||||
- const: fsl,imx8mp
|
||||
|
||||
@@ -1119,6 +1136,25 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- fsl,imx8qm-mek # i.MX8QM MEK Board
|
||||
- toradex,apalis-imx8 # Apalis iMX8 Modules
|
||||
- toradex,apalis-imx8-v1.1 # Apalis iMX8 V1.1 Modules
|
||||
- const: fsl,imx8qm
|
||||
|
||||
- description: i.MX8QM Boards with Toradex Apalis iMX8 Modules
|
||||
items:
|
||||
- enum:
|
||||
- toradex,apalis-imx8-eval # Apalis iMX8 Module on Apalis Evaluation Board
|
||||
- toradex,apalis-imx8-ixora-v1.1 # Apalis iMX8 Module on Ixora V1.1 Carrier Board
|
||||
- const: toradex,apalis-imx8
|
||||
- const: fsl,imx8qm
|
||||
|
||||
- description: i.MX8QM Boards with Toradex Apalis iMX8 V1.1 Modules
|
||||
items:
|
||||
- enum:
|
||||
- toradex,apalis-imx8-v1.1-eval # Apalis iMX8 V1.1 Module on Apalis Eval. Board
|
||||
- toradex,apalis-imx8-v1.1-ixora-v1.1 # Apalis iMX8 V1.1 Module on Ixora V1.1 C. Board
|
||||
- toradex,apalis-imx8-v1.1-ixora-v1.2 # Apalis iMX8 V1.1 Module on Ixora V1.2 C. Board
|
||||
- const: toradex,apalis-imx8-v1.1
|
||||
- const: fsl,imx8qm
|
||||
|
||||
- description: i.MX8QXP based Boards
|
||||
@@ -1135,10 +1171,13 @@ properties:
|
||||
- fsl,imx8dxl-evk # i.MX8DXL EVK Board
|
||||
- const: fsl,imx8dxl
|
||||
|
||||
- description: i.MX8QXP Boards with Toradex Coilbri iMX8X Modules
|
||||
- description: i.MX8QXP Boards with Toradex Colibri iMX8X Modules
|
||||
items:
|
||||
- enum:
|
||||
- toradex,colibri-imx8x-aster # Colibri iMX8X Module on Aster Board
|
||||
- toradex,colibri-imx8x-eval-v3 # Colibri iMX8X Module on Colibri Evaluation Board V3
|
||||
- toradex,colibri-imx8x-iris # Colibri iMX8X Module on Iris Board
|
||||
- toradex,colibri-imx8x-iris-v2 # Colibri iMX8X Module on Iris Board V2
|
||||
- const: toradex,colibri-imx8x
|
||||
- const: fsl,imx8qxp
|
||||
|
||||
|
||||
@@ -7,8 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
title: Last Level Cache Controller
|
||||
|
||||
maintainers:
|
||||
- Rishabh Bhatnagar <rishabhb@codeaurora.org>
|
||||
- Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
|
||||
- Bjorn Andersson <andersson@kernel.org>
|
||||
|
||||
description: |
|
||||
LLCC (Last Level Cache Controller) provides last level of cache memory in SoC,
|
||||
@@ -27,6 +26,7 @@ properties:
|
||||
- qcom,sc8280xp-llcc
|
||||
- qcom,sdm845-llcc
|
||||
- qcom,sm6350-llcc
|
||||
- qcom,sm7150-llcc
|
||||
- qcom,sm8150-llcc
|
||||
- qcom,sm8250-llcc
|
||||
- qcom,sm8350-llcc
|
||||
@@ -34,14 +34,12 @@ properties:
|
||||
- qcom,sm8550-llcc
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: LLCC base register region
|
||||
- description: LLCC broadcast base register region
|
||||
minItems: 2
|
||||
maxItems: 9
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: llcc_base
|
||||
- const: llcc_broadcast_base
|
||||
minItems: 2
|
||||
maxItems: 9
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
@@ -51,15 +49,120 @@ required:
|
||||
- reg
|
||||
- reg-names
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sc7180-llcc
|
||||
- qcom,sm6350-llcc
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
items:
|
||||
- description: LLCC0 base register region
|
||||
- description: LLCC broadcast base register region
|
||||
reg-names:
|
||||
items:
|
||||
- const: llcc0_base
|
||||
- const: llcc_broadcast_base
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sc7280-llcc
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
items:
|
||||
- description: LLCC0 base register region
|
||||
- description: LLCC1 base register region
|
||||
- description: LLCC broadcast base register region
|
||||
reg-names:
|
||||
items:
|
||||
- const: llcc0_base
|
||||
- const: llcc1_base
|
||||
- const: llcc_broadcast_base
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sc8180x-llcc
|
||||
- qcom,sc8280xp-llcc
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
items:
|
||||
- description: LLCC0 base register region
|
||||
- description: LLCC1 base register region
|
||||
- description: LLCC2 base register region
|
||||
- description: LLCC3 base register region
|
||||
- description: LLCC4 base register region
|
||||
- description: LLCC5 base register region
|
||||
- description: LLCC6 base register region
|
||||
- description: LLCC7 base register region
|
||||
- description: LLCC broadcast base register region
|
||||
reg-names:
|
||||
items:
|
||||
- const: llcc0_base
|
||||
- const: llcc1_base
|
||||
- const: llcc2_base
|
||||
- const: llcc3_base
|
||||
- const: llcc4_base
|
||||
- const: llcc5_base
|
||||
- const: llcc6_base
|
||||
- const: llcc7_base
|
||||
- const: llcc_broadcast_base
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sdm845-llcc
|
||||
- qcom,sm8150-llcc
|
||||
- qcom,sm8250-llcc
|
||||
- qcom,sm8350-llcc
|
||||
- qcom,sm8450-llcc
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
items:
|
||||
- description: LLCC0 base register region
|
||||
- description: LLCC1 base register region
|
||||
- description: LLCC2 base register region
|
||||
- description: LLCC3 base register region
|
||||
- description: LLCC broadcast base register region
|
||||
reg-names:
|
||||
items:
|
||||
- const: llcc0_base
|
||||
- const: llcc1_base
|
||||
- const: llcc2_base
|
||||
- const: llcc3_base
|
||||
- const: llcc_broadcast_base
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
system-cache-controller@1100000 {
|
||||
compatible = "qcom,sdm845-llcc";
|
||||
reg = <0x1100000 0x200000>, <0x1300000 0x50000> ;
|
||||
reg-names = "llcc_base", "llcc_broadcast_base";
|
||||
interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
|
||||
soc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
system-cache-controller@1100000 {
|
||||
compatible = "qcom,sdm845-llcc";
|
||||
reg = <0 0x01100000 0 0x50000>, <0 0x01180000 0 0x50000>,
|
||||
<0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>,
|
||||
<0 0x01300000 0 0x50000>;
|
||||
reg-names = "llcc0_base", "llcc1_base", "llcc2_base",
|
||||
"llcc3_base", "llcc_broadcast_base";
|
||||
interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/arm/nvidia,tegra194-ccplex.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/arm/nvidia,tegra194-ccplex.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra194 CPU Complex
|
||||
|
||||
@@ -25,7 +25,7 @@ properties:
|
||||
- nvidia,tegra194-ccplex
|
||||
|
||||
nvidia,bpmp:
|
||||
$ref: '/schemas/types.yaml#/definitions/phandle'
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: |
|
||||
Specifies the bpmp node that needs to be queried to get
|
||||
operating point data for all CPUs.
|
||||
|
||||
@@ -1,14 +0,0 @@
|
||||
Oxford Semiconductor OXNAS SoCs Family device tree bindings
|
||||
-------------------------------------------
|
||||
|
||||
Boards with the OX810SE SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible: "oxsemi,ox810se"
|
||||
|
||||
Boards with the OX820 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible: "oxsemi,ox820"
|
||||
|
||||
Board compatible values:
|
||||
- "wd,mbwe" (OX810SE)
|
||||
- "cloudengines,pogoplugv3" (OX820)
|
||||
@@ -30,8 +30,10 @@ description: |
|
||||
apq8084
|
||||
apq8096
|
||||
ipq4018
|
||||
ipq5332
|
||||
ipq6018
|
||||
ipq8074
|
||||
ipq9574
|
||||
mdm9615
|
||||
msm8226
|
||||
msm8916
|
||||
@@ -45,7 +47,10 @@ description: |
|
||||
msm8996
|
||||
msm8998
|
||||
qcs404
|
||||
qcm2290
|
||||
qdu1000
|
||||
qrb2210
|
||||
qrb4210
|
||||
qru1000
|
||||
sa8155p
|
||||
sa8540p
|
||||
@@ -80,6 +85,9 @@ description: |
|
||||
The 'board' element must be one of the following strings:
|
||||
|
||||
adp
|
||||
ap-al02-c7
|
||||
ap-mi01.2
|
||||
ap-mi01.6
|
||||
cdp
|
||||
cp01-c1
|
||||
dragonboard
|
||||
@@ -90,6 +98,7 @@ description: |
|
||||
liquid
|
||||
mtp
|
||||
qrd
|
||||
rb2
|
||||
ride
|
||||
sbc
|
||||
x100
|
||||
@@ -226,6 +235,7 @@ properties:
|
||||
- thwc,uf896
|
||||
- thwc,ufi001c
|
||||
- wingtech,wt88047
|
||||
- yiming,uz801-v3
|
||||
- const: qcom,msm8916
|
||||
|
||||
- items:
|
||||
@@ -320,6 +330,12 @@ properties:
|
||||
- qcom,ipq4019-dk04.1-c1
|
||||
- const: qcom,ipq4019
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,ipq5332-ap-mi01.2
|
||||
- qcom,ipq5332-ap-mi01.6
|
||||
- const: qcom,ipq5332
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- mikrotik,rb3011
|
||||
@@ -333,12 +349,24 @@ properties:
|
||||
- qcom,ipq8074-hk10-c2
|
||||
- const: qcom,ipq8074
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,ipq9574-ap-al02-c7
|
||||
- const: qcom,ipq9574
|
||||
|
||||
- description: Sierra Wireless MangOH Green with WP8548 Module
|
||||
items:
|
||||
- const: swir,mangoh-green-wp8548
|
||||
- const: swir,wp8548
|
||||
- const: qcom,mdm9615
|
||||
|
||||
- description: Qualcomm Technologies, Inc. Robotics RB1
|
||||
items:
|
||||
- enum:
|
||||
- qcom,qrb2210-rb1
|
||||
- const: qcom,qrb2210
|
||||
- const: qcom,qcm2290
|
||||
|
||||
- description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform
|
||||
items:
|
||||
- enum:
|
||||
@@ -848,6 +876,12 @@ properties:
|
||||
- oneplus,billie2
|
||||
- const: qcom,sm4250
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,qrb4210-rb2
|
||||
- const: qcom,qrb4210
|
||||
- const: qcom,sm4250
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- lenovo,j606f
|
||||
@@ -857,6 +891,7 @@ properties:
|
||||
- items:
|
||||
- enum:
|
||||
- sony,pdx201
|
||||
- xiaomi,laurel-sprout
|
||||
- const: qcom,sm6125
|
||||
|
||||
- items:
|
||||
@@ -913,6 +948,7 @@ properties:
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,sm8550-mtp
|
||||
- qcom,sm8550-qrd
|
||||
- const: qcom,sm8550
|
||||
|
||||
# Board compatibles go above
|
||||
|
||||
@@ -185,9 +185,11 @@ properties:
|
||||
- const: firefly,rk3566-roc-pc
|
||||
- const: rockchip,rk3566
|
||||
|
||||
- description: FriendlyElec NanoPi R2S
|
||||
- description: FriendlyElec NanoPi R2 series boards
|
||||
items:
|
||||
- const: friendlyarm,nanopi-r2s
|
||||
- enum:
|
||||
- friendlyarm,nanopi-r2c
|
||||
- friendlyarm,nanopi-r2s
|
||||
- const: rockchip,rk3328
|
||||
|
||||
- description: FriendlyElec NanoPi4 series boards
|
||||
@@ -201,6 +203,13 @@ properties:
|
||||
- friendlyarm,nanopi-r4s-enterprise
|
||||
- const: rockchip,rk3399
|
||||
|
||||
- description: FriendlyElec NanoPi R5 series boards
|
||||
items:
|
||||
- enum:
|
||||
- friendlyarm,nanopi-r5c
|
||||
- friendlyarm,nanopi-r5s
|
||||
- const: rockchip,rk3568
|
||||
|
||||
- description: GeekBuying GeekBox
|
||||
items:
|
||||
- const: geekbuying,geekbox
|
||||
@@ -533,6 +542,11 @@ properties:
|
||||
- khadas,edge-v
|
||||
- const: rockchip,rk3399
|
||||
|
||||
- description: Khadas Edge2 series boards
|
||||
items:
|
||||
- const: khadas,edge2
|
||||
- const: rockchip,rk3588s
|
||||
|
||||
- description: Kobol Helios64
|
||||
items:
|
||||
- const: kobol,helios64
|
||||
@@ -817,9 +831,11 @@ properties:
|
||||
- const: tronsmart,orion-r68-meta
|
||||
- const: rockchip,rk3368
|
||||
|
||||
- description: Xunlong Orange Pi R1 Plus
|
||||
- description: Xunlong Orange Pi R1 Plus / LTS
|
||||
items:
|
||||
- const: xunlong,orangepi-r1-plus
|
||||
- enum:
|
||||
- xunlong,orangepi-r1-plus
|
||||
- xunlong,orangepi-r1-plus-lts
|
||||
- const: rockchip,rk3328
|
||||
|
||||
- description: Zkmagic A95X Z2
|
||||
|
||||
@@ -366,6 +366,12 @@ properties:
|
||||
- const: lamobo,lamobo-r1
|
||||
- const: allwinner,sun7i-a20
|
||||
|
||||
- description: Lctech Pi F1C200s
|
||||
items:
|
||||
- const: lctech,pi-f1c200s
|
||||
- const: allwinner,suniv-f1c200s
|
||||
- const: allwinner,suniv-f1c100s
|
||||
|
||||
- description: Libre Computer Board ALL-H3-CC H2+
|
||||
items:
|
||||
- const: libretech,all-h3-cc-h2-plus
|
||||
@@ -807,6 +813,13 @@ properties:
|
||||
- const: sinlinx,sina33
|
||||
- const: allwinner,sun8i-a33
|
||||
|
||||
- description: SourceParts PopStick v1.1
|
||||
items:
|
||||
- const: sourceparts,popstick-v1.1
|
||||
- const: sourceparts,popstick
|
||||
- const: allwinner,suniv-f1c200s
|
||||
- const: allwinner,suniv-f1c100s
|
||||
|
||||
- description: SL631 Action Camera with IMX179
|
||||
items:
|
||||
- const: allwinner,sl631-imx179
|
||||
@@ -843,6 +856,11 @@ properties:
|
||||
- const: wexler,tab7200
|
||||
- const: allwinner,sun7i-a20
|
||||
|
||||
- description: MangoPi MQ-R board
|
||||
items:
|
||||
- const: widora,mangopi-mq-r-t113
|
||||
- const: allwinner,sun8i-t113s
|
||||
|
||||
- description: WITS A31 Colombus Evaluation Board
|
||||
items:
|
||||
- const: wits,colombus
|
||||
|
||||
@@ -167,5 +167,14 @@ properties:
|
||||
- const: nvidia,p3737-0000+p3701-0000
|
||||
- const: nvidia,p3701-0000
|
||||
- const: nvidia,tegra234
|
||||
- description: Jetson Orin NX
|
||||
items:
|
||||
- const: nvidia,p3767-0000
|
||||
- const: nvidia,tegra234
|
||||
- description: Jetson Orin NX Engineering Reference Developer Kit
|
||||
items:
|
||||
- const: nvidia,p3768-0000+p3767-0000
|
||||
- const: nvidia,p3767-0000
|
||||
- const: nvidia,tegra234
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra-ccplex-cluster.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra-ccplex-cluster.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra CPU COMPLEX CLUSTER area
|
||||
|
||||
@@ -29,7 +29,7 @@ properties:
|
||||
maxItems: 1
|
||||
|
||||
nvidia,bpmp:
|
||||
$ref: '/schemas/types.yaml#/definitions/phandle'
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: |
|
||||
Specifies the BPMP node that needs to be queried to get
|
||||
operating point data for all CPUs.
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra194-axi2apb.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra194-axi2apb.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra194 AXI2APB bridge
|
||||
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra194-cbb.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra194-cbb.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra194 CBB 1.0
|
||||
|
||||
@@ -64,13 +64,13 @@ properties:
|
||||
- description: secure interrupt
|
||||
|
||||
nvidia,axi2apb:
|
||||
$ref: '/schemas/types.yaml#/definitions/phandle'
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
Specifies the node having all axi2apb bridges which need to be checked
|
||||
for any error logged in their status register.
|
||||
|
||||
nvidia,apbmisc:
|
||||
$ref: '/schemas/types.yaml#/definitions/phandle'
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
Specifies the apbmisc node which need to be used for reading the ERD
|
||||
register.
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra234-cbb.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra234-cbb.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra CBB 2.0
|
||||
|
||||
|
||||
@@ -28,7 +28,9 @@ properties:
|
||||
- description: K3 AM625 SoC
|
||||
items:
|
||||
- enum:
|
||||
- beagle,am625-beagleplay
|
||||
- ti,am625-sk
|
||||
- ti,am62-lp-sk
|
||||
- const: ti,am625
|
||||
|
||||
- description: K3 AM642 SoC
|
||||
|
||||
@@ -23,6 +23,7 @@ properties:
|
||||
- enum:
|
||||
- apple,t6000-nco
|
||||
- apple,t8103-nco
|
||||
- apple,t8112-nco
|
||||
- const: apple,nco
|
||||
|
||||
clocks:
|
||||
|
||||
@@ -0,0 +1,53 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,ipq5332-gcc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Global Clock & Reset Controller on IPQ5332
|
||||
|
||||
maintainers:
|
||||
- Bjorn Andersson <andersson@kernel.org>
|
||||
|
||||
description: |
|
||||
Qualcomm global clock control module provides the clocks, resets and power
|
||||
domains on IPQ5332.
|
||||
|
||||
See also:: include/dt-bindings/clock/qcom,gcc-ipq5332.h
|
||||
|
||||
allOf:
|
||||
- $ref: qcom,gcc.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,ipq5332-gcc
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Board XO clock source
|
||||
- description: Sleep clock source
|
||||
- description: PCIE 2lane PHY pipe clock source
|
||||
- description: PCIE 2lane x1 PHY pipe clock source (For second lane)
|
||||
- description: USB PCIE wrapper pipe clock source
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
clock-controller@1800000 {
|
||||
compatible = "qcom,ipq5332-gcc";
|
||||
reg = <0x01800000 0x80000>;
|
||||
clocks = <&xo_board>,
|
||||
<&sleep_clk>,
|
||||
<&pcie_2lane_phy_pipe_clk>,
|
||||
<&pcie_2lane_phy_pipe_clk_x1>,
|
||||
<&usb_pcie_wrapper_pipe_clk>;
|
||||
#clock-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
...
|
||||
@@ -0,0 +1,61 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,ipq9574-gcc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Global Clock & Reset Controller on IPQ9574
|
||||
|
||||
maintainers:
|
||||
- Anusha Rao <quic_anusha@quicinc.com>
|
||||
|
||||
description: |
|
||||
Qualcomm global clock control module provides the clocks, resets and power
|
||||
domains on IPQ9574
|
||||
|
||||
See also::
|
||||
include/dt-bindings/clock/qcom,ipq9574-gcc.h
|
||||
include/dt-bindings/reset/qcom,ipq9574-gcc.h
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,ipq9574-gcc
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Board XO source
|
||||
- description: Sleep clock source
|
||||
- description: Bias PLL ubi clock source
|
||||
- description: PCIE30 PHY0 pipe clock source
|
||||
- description: PCIE30 PHY1 pipe clock source
|
||||
- description: PCIE30 PHY2 pipe clock source
|
||||
- description: PCIE30 PHY3 pipe clock source
|
||||
- description: USB3 PHY pipe clock source
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
|
||||
allOf:
|
||||
- $ref: qcom,gcc.yaml#
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
clock-controller@1800000 {
|
||||
compatible = "qcom,ipq9574-gcc";
|
||||
reg = <0x01800000 0x80000>;
|
||||
clocks = <&xo_board_clk>,
|
||||
<&sleep_clk>,
|
||||
<&bias_pll_ubi_nc_clk>,
|
||||
<&pcie30_phy0_pipe_clk>,
|
||||
<&pcie30_phy1_pipe_clk>,
|
||||
<&pcie30_phy2_pipe_clk>,
|
||||
<&pcie30_phy3_pipe_clk>,
|
||||
<&usb3phy_0_cc_pipe_clk>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
};
|
||||
...
|
||||
@@ -0,0 +1,58 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,sm6115-gpucc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Graphics Clock & Reset Controller on SM6115
|
||||
|
||||
maintainers:
|
||||
- Konrad Dybcio <konrad.dybcio@linaro.org>
|
||||
|
||||
description: |
|
||||
Qualcomm graphics clock control module provides clocks, resets and power
|
||||
domains on Qualcomm SoCs.
|
||||
|
||||
See also:: include/dt-bindings/clock/qcom,sm6115-gpucc.h
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sm6115-gpucc
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Board XO source
|
||||
- description: GPLL0 main branch source
|
||||
- description: GPLL0 main div source
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
|
||||
allOf:
|
||||
- $ref: qcom,gcc.yaml#
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,gcc-sm6115.h>
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
|
||||
soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
clock-controller@5990000 {
|
||||
compatible = "qcom,sm6115-gpucc";
|
||||
reg = <0x05990000 0x9000>;
|
||||
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
|
||||
<&gcc GCC_GPU_GPLL0_CLK_SRC>,
|
||||
<&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
};
|
||||
};
|
||||
...
|
||||
@@ -0,0 +1,64 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,sm6125-gpucc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Graphics Clock & Reset Controller on SM6125
|
||||
|
||||
maintainers:
|
||||
- Konrad Dybcio <konrad.dybcio@linaro.org>
|
||||
|
||||
description: |
|
||||
Qualcomm graphics clock control module provides clocks and power domains on
|
||||
Qualcomm SoCs.
|
||||
|
||||
See also:: include/dt-bindings/clock/qcom,sm6125-gpucc.h
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sm6125-gpucc
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Board XO source
|
||||
- description: GPLL0 main branch source
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
'#power-domain-cells':
|
||||
const: 1
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- '#clock-cells'
|
||||
- '#power-domain-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,gcc-sm6125.h>
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
|
||||
soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
clock-controller@5990000 {
|
||||
compatible = "qcom,sm6125-gpucc";
|
||||
reg = <0x05990000 0x9000>;
|
||||
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
|
||||
<&gcc GCC_GPU_GPLL0_CLK_SRC>;
|
||||
#clock-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
};
|
||||
};
|
||||
...
|
||||
@@ -0,0 +1,60 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,sm6375-gpucc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Graphics Clock & Reset Controller on SM6375
|
||||
|
||||
maintainers:
|
||||
- Konrad Dybcio <konrad.dybcio@linaro.org>
|
||||
|
||||
description: |
|
||||
Qualcomm graphics clock control module provides clocks, resets and power
|
||||
domains on Qualcomm SoCs.
|
||||
|
||||
See also:: include/dt-bindings/clock/qcom,sm6375-gpucc.h
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sm6375-gpucc
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Board XO source
|
||||
- description: GPLL0 main branch source
|
||||
- description: GPLL0 div branch source
|
||||
- description: SNoC DVM GFX source
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
|
||||
allOf:
|
||||
- $ref: qcom,gcc.yaml#
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,sm6375-gcc.h>
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
|
||||
soc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
clock-controller@5990000 {
|
||||
compatible = "qcom,sm6375-gpucc";
|
||||
reg = <0 0x05990000 0 0x9000>;
|
||||
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
|
||||
<&gcc GCC_GPU_GPLL0_CLK_SRC>,
|
||||
<&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>,
|
||||
<&gcc GCC_GPU_SNOC_DVM_GFX_CLK>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
};
|
||||
};
|
||||
...
|
||||
@@ -37,6 +37,7 @@ properties:
|
||||
- samsung,exynos850-cmu-cmgp
|
||||
- samsung,exynos850-cmu-core
|
||||
- samsung,exynos850-cmu-dpu
|
||||
- samsung,exynos850-cmu-g3d
|
||||
- samsung,exynos850-cmu-hsi
|
||||
- samsung,exynos850-cmu-is
|
||||
- samsung,exynos850-cmu-mfcmscl
|
||||
@@ -169,6 +170,24 @@ allOf:
|
||||
- const: oscclk
|
||||
- const: dout_dpu
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: samsung,exynos850-cmu-g3d
|
||||
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: External reference clock (26 MHz)
|
||||
- description: G3D clock (from CMU_TOP)
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: oscclk
|
||||
- const: dout_g3d_switch
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
||||
@@ -0,0 +1,107 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/starfive,jh7110-aoncrg.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: StarFive JH7110 Always-On Clock and Reset Generator
|
||||
|
||||
maintainers:
|
||||
- Emil Renner Berthing <kernel@esmil.dk>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: starfive,jh7110-aoncrg
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
oneOf:
|
||||
- items:
|
||||
- description: Main Oscillator (24 MHz)
|
||||
- description: GMAC0 RMII reference or GMAC0 RGMII RX
|
||||
- description: STG AXI/AHB
|
||||
- description: APB Bus
|
||||
- description: GMAC0 GTX
|
||||
|
||||
- items:
|
||||
- description: Main Oscillator (24 MHz)
|
||||
- description: GMAC0 RMII reference or GMAC0 RGMII RX
|
||||
- description: STG AXI/AHB or GMAC0 RGMII RX
|
||||
- description: APB Bus or STG AXI/AHB
|
||||
- description: GMAC0 GTX or APB Bus
|
||||
- description: RTC Oscillator (32.768 kHz) or GMAC0 GTX
|
||||
|
||||
- items:
|
||||
- description: Main Oscillator (24 MHz)
|
||||
- description: GMAC0 RMII reference
|
||||
- description: GMAC0 RGMII RX
|
||||
- description: STG AXI/AHB
|
||||
- description: APB Bus
|
||||
- description: GMAC0 GTX
|
||||
- description: RTC Oscillator (32.768 kHz)
|
||||
|
||||
clock-names:
|
||||
oneOf:
|
||||
- minItems: 5
|
||||
items:
|
||||
- const: osc
|
||||
- enum:
|
||||
- gmac0_rmii_refin
|
||||
- gmac0_rgmii_rxin
|
||||
- const: stg_axiahb
|
||||
- const: apb_bus
|
||||
- const: gmac0_gtxclk
|
||||
- const: rtc_osc
|
||||
|
||||
- minItems: 6
|
||||
items:
|
||||
- const: osc
|
||||
- const: gmac0_rmii_refin
|
||||
- const: gmac0_rgmii_rxin
|
||||
- const: stg_axiahb
|
||||
- const: apb_bus
|
||||
- const: gmac0_gtxclk
|
||||
- const: rtc_osc
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
description:
|
||||
See <dt-bindings/clock/starfive,jh7110-crg.h> for valid indices.
|
||||
|
||||
'#reset-cells':
|
||||
const: 1
|
||||
description:
|
||||
See <dt-bindings/reset/starfive,jh7110-crg.h> for valid indices.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- '#clock-cells'
|
||||
- '#reset-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/starfive,jh7110-crg.h>
|
||||
|
||||
clock-controller@17000000 {
|
||||
compatible = "starfive,jh7110-aoncrg";
|
||||
reg = <0x17000000 0x10000>;
|
||||
clocks = <&osc>, <&gmac0_rmii_refin>,
|
||||
<&gmac0_rgmii_rxin>,
|
||||
<&syscrg JH7110_SYSCLK_STG_AXIAHB>,
|
||||
<&syscrg JH7110_SYSCLK_APB_BUS>,
|
||||
<&syscrg JH7110_SYSCLK_GMAC0_GTXCLK>,
|
||||
<&rtc_osc>;
|
||||
clock-names = "osc", "gmac0_rmii_refin",
|
||||
"gmac0_rgmii_rxin", "stg_axiahb",
|
||||
"apb_bus", "gmac0_gtxclk",
|
||||
"rtc_osc";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
@@ -0,0 +1,104 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/starfive,jh7110-syscrg.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: StarFive JH7110 System Clock and Reset Generator
|
||||
|
||||
maintainers:
|
||||
- Emil Renner Berthing <kernel@esmil.dk>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: starfive,jh7110-syscrg
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
oneOf:
|
||||
- items:
|
||||
- description: Main Oscillator (24 MHz)
|
||||
- description: GMAC1 RMII reference or GMAC1 RGMII RX
|
||||
- description: External I2S TX bit clock
|
||||
- description: External I2S TX left/right channel clock
|
||||
- description: External I2S RX bit clock
|
||||
- description: External I2S RX left/right channel clock
|
||||
- description: External TDM clock
|
||||
- description: External audio master clock
|
||||
|
||||
- items:
|
||||
- description: Main Oscillator (24 MHz)
|
||||
- description: GMAC1 RMII reference
|
||||
- description: GMAC1 RGMII RX
|
||||
- description: External I2S TX bit clock
|
||||
- description: External I2S TX left/right channel clock
|
||||
- description: External I2S RX bit clock
|
||||
- description: External I2S RX left/right channel clock
|
||||
- description: External TDM clock
|
||||
- description: External audio master clock
|
||||
|
||||
clock-names:
|
||||
oneOf:
|
||||
- items:
|
||||
- const: osc
|
||||
- enum:
|
||||
- gmac1_rmii_refin
|
||||
- gmac1_rgmii_rxin
|
||||
- const: i2stx_bclk_ext
|
||||
- const: i2stx_lrck_ext
|
||||
- const: i2srx_bclk_ext
|
||||
- const: i2srx_lrck_ext
|
||||
- const: tdm_ext
|
||||
- const: mclk_ext
|
||||
|
||||
- items:
|
||||
- const: osc
|
||||
- const: gmac1_rmii_refin
|
||||
- const: gmac1_rgmii_rxin
|
||||
- const: i2stx_bclk_ext
|
||||
- const: i2stx_lrck_ext
|
||||
- const: i2srx_bclk_ext
|
||||
- const: i2srx_lrck_ext
|
||||
- const: tdm_ext
|
||||
- const: mclk_ext
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
description:
|
||||
See <dt-bindings/clock/starfive,jh7110-crg.h> for valid indices.
|
||||
|
||||
'#reset-cells':
|
||||
const: 1
|
||||
description:
|
||||
See <dt-bindings/reset/starfive,jh7110-crg.h> for valid indices.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- '#clock-cells'
|
||||
- '#reset-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
clock-controller@13020000 {
|
||||
compatible = "starfive,jh7110-syscrg";
|
||||
reg = <0x13020000 0x10000>;
|
||||
clocks = <&osc>, <&gmac1_rmii_refin>,
|
||||
<&gmac1_rgmii_rxin>,
|
||||
<&i2stx_bclk_ext>, <&i2stx_lrck_ext>,
|
||||
<&i2srx_bclk_ext>, <&i2srx_lrck_ext>,
|
||||
<&tdm_ext>, <&mclk_ext>;
|
||||
clock-names = "osc", "gmac1_rmii_refin",
|
||||
"gmac1_rgmii_rxin",
|
||||
"i2stx_bclk_ext", "i2stx_lrck_ext",
|
||||
"i2srx_bclk_ext", "i2srx_lrck_ext",
|
||||
"tdm_ext", "mclk_ext";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
@@ -0,0 +1,42 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/crypto/qcom,inline-crypto-engine.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Technologies, Inc. (QTI) Inline Crypto Engine
|
||||
|
||||
maintainers:
|
||||
- Bjorn Andersson <andersson@kernel.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- qcom,sm8550-inline-crypto-engine
|
||||
- const: qcom,inline-crypto-engine
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,sm8550-gcc.h>
|
||||
|
||||
crypto@1d88000 {
|
||||
compatible = "qcom,sm8550-inline-crypto-engine",
|
||||
"qcom,inline-crypto-engine";
|
||||
reg = <0x01d88000 0x8000>;
|
||||
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
|
||||
};
|
||||
...
|
||||
@@ -56,17 +56,38 @@ properties:
|
||||
description:
|
||||
Specifies the mailboxes used to communicate with SCMI compliant
|
||||
firmware.
|
||||
items:
|
||||
- const: tx
|
||||
- const: rx
|
||||
oneOf:
|
||||
- items:
|
||||
- const: tx
|
||||
- const: rx
|
||||
minItems: 1
|
||||
- items:
|
||||
- const: tx
|
||||
- const: tx_reply
|
||||
- const: rx
|
||||
minItems: 2
|
||||
|
||||
mboxes:
|
||||
description:
|
||||
List of phandle and mailbox channel specifiers. It should contain
|
||||
exactly one or two mailboxes, one for transmitting messages("tx")
|
||||
and another optional for receiving the notifications("rx") if supported.
|
||||
exactly one, two or three mailboxes; the first one or two for transmitting
|
||||
messages ("tx") and another optional ("rx") for receiving notifications
|
||||
and delayed responses, if supported by the platform.
|
||||
The number of mailboxes needed for transmitting messages depends on the
|
||||
type of channels exposed by the specific underlying mailbox controller;
|
||||
one single channel descriptor is enough if such channel is bidirectional,
|
||||
while two channel descriptors are needed to represent the SCMI ("tx")
|
||||
channel if the underlying mailbox channels are of unidirectional type.
|
||||
The effective combination in numbers of mboxes and shmem descriptors let
|
||||
the SCMI subsystem determine unambiguosly which type of SCMI channels are
|
||||
made available by the underlying mailbox controller and how to use them.
|
||||
1 mbox / 1 shmem => SCMI TX over 1 mailbox bidirectional channel
|
||||
2 mbox / 2 shmem => SCMI TX and RX over 2 mailbox bidirectional channels
|
||||
2 mbox / 1 shmem => SCMI TX over 2 mailbox unidirectional channels
|
||||
3 mbox / 2 shmem => SCMI TX and RX over 3 mailbox unidirectional channels
|
||||
Any other combination of mboxes and shmem is invalid.
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
maxItems: 3
|
||||
|
||||
shmem:
|
||||
description:
|
||||
@@ -228,13 +249,20 @@ $defs:
|
||||
maxItems: 1
|
||||
|
||||
mbox-names:
|
||||
items:
|
||||
- const: tx
|
||||
- const: rx
|
||||
oneOf:
|
||||
- items:
|
||||
- const: tx
|
||||
- const: rx
|
||||
minItems: 1
|
||||
- items:
|
||||
- const: tx
|
||||
- const: tx_reply
|
||||
- const: rx
|
||||
minItems: 2
|
||||
|
||||
mboxes:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
maxItems: 3
|
||||
|
||||
shmem:
|
||||
minItems: 1
|
||||
|
||||
@@ -24,9 +24,11 @@ properties:
|
||||
- qcom,scm-apq8064
|
||||
- qcom,scm-apq8084
|
||||
- qcom,scm-ipq4019
|
||||
- qcom,scm-ipq5332
|
||||
- qcom,scm-ipq6018
|
||||
- qcom,scm-ipq806x
|
||||
- qcom,scm-ipq8074
|
||||
- qcom,scm-ipq9574
|
||||
- qcom,scm-mdm9607
|
||||
- qcom,scm-msm8226
|
||||
- qcom,scm-msm8660
|
||||
@@ -38,10 +40,12 @@ properties:
|
||||
- qcom,scm-msm8994
|
||||
- qcom,scm-msm8996
|
||||
- qcom,scm-msm8998
|
||||
- qcom,scm-qcm2290
|
||||
- qcom,scm-qdu1000
|
||||
- qcom,scm-sa8775p
|
||||
- qcom,scm-sc7180
|
||||
- qcom,scm-sc7280
|
||||
- qcom,scm-sc8180x
|
||||
- qcom,scm-sc8280xp
|
||||
- qcom,scm-sdm670
|
||||
- qcom,scm-sdm845
|
||||
@@ -107,6 +111,7 @@ allOf:
|
||||
- qcom,scm-msm8960
|
||||
- qcom,scm-msm8974
|
||||
- qcom,scm-msm8976
|
||||
- qcom,scm-qcm2290
|
||||
- qcom,scm-sm6375
|
||||
then:
|
||||
required:
|
||||
@@ -125,6 +130,7 @@ allOf:
|
||||
- qcom,scm-apq8064
|
||||
- qcom,scm-msm8660
|
||||
- qcom,scm-msm8960
|
||||
- qcom,scm-qcm2290
|
||||
- qcom,scm-sm6375
|
||||
then:
|
||||
properties:
|
||||
@@ -166,6 +172,7 @@ allOf:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,scm-qdu1000
|
||||
- qcom,scm-sm8450
|
||||
- qcom,scm-sm8550
|
||||
then:
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvdec.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvdec.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra NVDEC
|
||||
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvenc.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvenc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra NVENC
|
||||
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvjpg.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvjpg.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra NVJPG
|
||||
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/gpu/host1x/nvidia,tegra234-nvdec.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra234-nvdec.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra234 NVDEC
|
||||
|
||||
|
||||
@@ -23,6 +23,7 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- apple,t8103-i2c
|
||||
- apple,t8112-i2c
|
||||
- apple,t6000-i2c
|
||||
- const: apple,i2c
|
||||
|
||||
|
||||
@@ -31,19 +31,22 @@ description: |
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: apple,t6000-aic
|
||||
- enum:
|
||||
- apple,t8112-aic
|
||||
- apple,t6000-aic
|
||||
- const: apple,aic2
|
||||
|
||||
interrupt-controller: true
|
||||
|
||||
'#interrupt-cells':
|
||||
const: 4
|
||||
minimum: 3
|
||||
maximum: 4
|
||||
description: |
|
||||
The 1st cell contains the interrupt type:
|
||||
- 0: Hardware IRQ
|
||||
- 1: FIQ
|
||||
|
||||
The 2nd cell contains the die ID.
|
||||
The 2nd cell contains the die ID (only present on apple,t6000-aic).
|
||||
|
||||
The next cell contains the interrupt number.
|
||||
- HW IRQs: interrupt number
|
||||
@@ -109,6 +112,19 @@ additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/interrupt-controller.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: apple,t8112-aic
|
||||
then:
|
||||
properties:
|
||||
'#interrupt-cells':
|
||||
const: 3
|
||||
else:
|
||||
properties:
|
||||
'#interrupt-cells':
|
||||
const: 4
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
||||
@@ -59,6 +59,7 @@ properties:
|
||||
- enum:
|
||||
- sifive,fu540-c000-plic
|
||||
- starfive,jh7100-plic
|
||||
- starfive,jh7110-plic
|
||||
- canaan,k210-plic
|
||||
- const: sifive,plic-1.0.0
|
||||
- items:
|
||||
|
||||
@@ -28,9 +28,13 @@ description:
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- apple,t6000-sart
|
||||
- apple,t8103-sart
|
||||
oneOf:
|
||||
- items:
|
||||
- const: apple,t8112-sart
|
||||
- const: apple,t6000-sart
|
||||
- enum:
|
||||
- apple,t6000-sart
|
||||
- apple,t8103-sart
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
@@ -29,6 +29,7 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- apple,t8103-asc-mailbox
|
||||
- apple,t8112-asc-mailbox
|
||||
- apple,t6000-asc-mailbox
|
||||
- const: apple,asc-mailbox-v4
|
||||
|
||||
@@ -39,6 +40,7 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- apple,t8103-m3-mailbox
|
||||
- apple,t8112-m3-mailbox
|
||||
- apple,t6000-m3-mailbox
|
||||
- const: apple,m3-mailbox-v2
|
||||
|
||||
|
||||
@@ -43,6 +43,7 @@ properties:
|
||||
- mediatek,mt8195-smi-common-vdo
|
||||
- mediatek,mt8195-smi-common-vpp
|
||||
- mediatek,mt8195-smi-sub-common
|
||||
- mediatek,mt8365-smi-common
|
||||
|
||||
- description: for mt7623
|
||||
items:
|
||||
@@ -133,6 +134,7 @@ allOf:
|
||||
- mediatek,mt8192-smi-common
|
||||
- mediatek,mt8195-smi-common-vdo
|
||||
- mediatek,mt8195-smi-common-vpp
|
||||
- mediatek,mt8365-smi-common
|
||||
|
||||
then:
|
||||
properties:
|
||||
|
||||
@@ -34,6 +34,10 @@ properties:
|
||||
- const: mediatek,mt7623-smi-larb
|
||||
- const: mediatek,mt2701-smi-larb
|
||||
|
||||
- items:
|
||||
- const: mediatek,mt8365-smi-larb
|
||||
- const: mediatek,mt8186-smi-larb
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/memory-controllers/renesas,dbsc.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/memory-controllers/renesas,dbsc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Renesas DDR Bus Controllers
|
||||
|
||||
|
||||
@@ -20,7 +20,7 @@ description: |
|
||||
- if it contains "cfi-flash", then HyperFlash is used.
|
||||
|
||||
allOf:
|
||||
- $ref: "/schemas/spi/spi-controller.yaml#"
|
||||
- $ref: /schemas/spi/spi-controller.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
||||
@@ -42,7 +42,7 @@ properties:
|
||||
maxItems: 8
|
||||
|
||||
devfreq-events:
|
||||
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
minItems: 1
|
||||
maxItems: 16
|
||||
items:
|
||||
@@ -50,7 +50,7 @@ properties:
|
||||
description: phandles of the PPMU events used by the controller.
|
||||
|
||||
device-handle:
|
||||
$ref: '/schemas/types.yaml#/definitions/phandle'
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: |
|
||||
phandle of the connected DRAM memory device. For more information please
|
||||
refer to jedec,lpddr3.yaml.
|
||||
@@ -73,7 +73,7 @@ properties:
|
||||
- description: registers of DREX1
|
||||
|
||||
samsung,syscon-clk:
|
||||
$ref: '/schemas/types.yaml#/definitions/phandle'
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: |
|
||||
Phandle of the clock register set used by the controller, these registers
|
||||
are used for enabling a 'pause' feature and are not exposed by clock
|
||||
|
||||
@@ -222,7 +222,6 @@ additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/pinctrl/k3.h>
|
||||
#include <dt-bindings/soc/ti,sci_pm_domain.h>
|
||||
#include <dt-bindings/net/ti-dp83867.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
@@ -14,6 +14,7 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- apple,t8103-nvme-ans2
|
||||
- apple,t8112-nvme-ans2
|
||||
- apple,t6000-nvme-ans2
|
||||
- const: apple,nvme-ans2
|
||||
|
||||
@@ -65,7 +66,9 @@ if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: apple,t8103-nvme-ans2
|
||||
enum:
|
||||
- apple,t8103-nvme-ans2
|
||||
- apple,t8112-nvme-ans2
|
||||
then:
|
||||
properties:
|
||||
power-domains:
|
||||
|
||||
@@ -33,6 +33,7 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- apple,t8103-pcie
|
||||
- apple,t8112-pcie
|
||||
- apple,t6000-pcie
|
||||
- const: apple,pcie
|
||||
|
||||
|
||||
@@ -19,6 +19,7 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- apple,t8103-pinctrl
|
||||
- apple,t8112-pinctrl
|
||||
- apple,t6000-pinctrl
|
||||
- const: apple,pinctrl
|
||||
|
||||
|
||||
@@ -75,7 +75,9 @@ $defs:
|
||||
bias-pull-down: true
|
||||
bias-pull-up: true
|
||||
bias-disable: true
|
||||
input-enable: true
|
||||
input-enable: false
|
||||
output-disable: true
|
||||
output-enable: true
|
||||
output-high: true
|
||||
output-low: true
|
||||
|
||||
|
||||
@@ -32,6 +32,7 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- apple,t8103-pmgr-pwrstate
|
||||
- apple,t8112-pmgr-pwrstate
|
||||
- apple,t6000-pmgr-pwrstate
|
||||
- const: apple,pmgr-pwrstate
|
||||
|
||||
|
||||
@@ -35,6 +35,7 @@ properties:
|
||||
- sifive,e7
|
||||
- sifive,e71
|
||||
- sifive,rocket0
|
||||
- sifive,s7
|
||||
- sifive,u5
|
||||
- sifive,u54
|
||||
- sifive,u7
|
||||
|
||||
@@ -64,6 +64,11 @@ properties:
|
||||
- const: widora,mangopi-mq-pro
|
||||
- const: allwinner,sun20i-d1
|
||||
|
||||
- description: MangoPi MQ-R board
|
||||
items:
|
||||
- const: widora,mangopi-mq-r-f133
|
||||
- const: allwinner,sun20i-d1s
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
|
||||
@@ -2,8 +2,8 @@
|
||||
# Copyright 2019 BayLibre, SAS
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/soc/amlogic/amlogic,canvas.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/soc/amlogic/amlogic,canvas.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Amlogic Canvas Video Lookup Table
|
||||
|
||||
|
||||
@@ -0,0 +1,40 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/soc/amlogic/amlogic,meson-gx-clk-measure.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Amlogic Internal Clock Measurer
|
||||
|
||||
description:
|
||||
The Amlogic SoCs contains an IP to measure the internal clocks.
|
||||
The precision is multiple of MHz, useful to debug the clock states.
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- amlogic,meson-gx-clk-measure
|
||||
- amlogic,meson8-clk-measure
|
||||
- amlogic,meson8b-clk-measure
|
||||
- amlogic,meson-axg-clk-measure
|
||||
- amlogic,meson-g12a-clk-measure
|
||||
- amlogic,meson-sm1-clk-measure
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
clock-measure@8758 {
|
||||
compatible = "amlogic,meson-gx-clk-measure";
|
||||
reg = <0x8758 0x10>;
|
||||
};
|
||||
@@ -1,21 +0,0 @@
|
||||
Amlogic Internal Clock Measurer
|
||||
===============================
|
||||
|
||||
The Amlogic SoCs contains an IP to measure the internal clocks.
|
||||
The precision is multiple of MHz, useful to debug the clock states.
|
||||
|
||||
Required properties:
|
||||
- compatible: Shall contain one of the following :
|
||||
"amlogic,meson-gx-clk-measure" for GX SoCs
|
||||
"amlogic,meson8-clk-measure" for Meson8 SoCs
|
||||
"amlogic,meson8b-clk-measure" for Meson8b SoCs
|
||||
"amlogic,meson-axg-clk-measure" for AXG SoCs
|
||||
"amlogic,meson-g12a-clk-measure" for G12a SoCs
|
||||
"amlogic,meson-sm1-clk-measure" for SM1 SoCs
|
||||
- reg: base address and size of the Clock Measurer register space.
|
||||
|
||||
Example:
|
||||
clock-measure@8758 {
|
||||
compatible = "amlogic,meson-gx-clk-measure";
|
||||
reg = <0x0 0x8758 0x0 0x10>;
|
||||
};
|
||||
@@ -70,7 +70,7 @@ examples:
|
||||
#include <dt-bindings/clock/imx8mm-clock.h>
|
||||
#include <dt-bindings/power/imx8mm-power.h>
|
||||
|
||||
disp_blk_ctl: blk_ctrl@32e28000 {
|
||||
blk-ctrl@32e28000 {
|
||||
compatible = "fsl,imx8mm-disp-blk-ctrl", "syscon";
|
||||
reg = <0x32e28000 0x100>;
|
||||
power-domains = <&pgc_dispmix>, <&pgc_dispmix>, <&pgc_dispmix>,
|
||||
|
||||
@@ -150,7 +150,7 @@ examples:
|
||||
#include <dt-bindings/clock/imx8mm-clock.h>
|
||||
#include <dt-bindings/power/imx8mm-power.h>
|
||||
|
||||
vpu_blk_ctrl: blk-ctrl@38330000 {
|
||||
blk-ctrl@38330000 {
|
||||
compatible = "fsl,imx8mm-vpu-blk-ctrl", "syscon";
|
||||
reg = <0x38330000 0x100>;
|
||||
power-domains = <&pgc_vpumix>, <&pgc_vpu_g1>,
|
||||
|
||||
@@ -71,7 +71,7 @@ examples:
|
||||
#include <dt-bindings/clock/imx8mn-clock.h>
|
||||
#include <dt-bindings/power/imx8mn-power.h>
|
||||
|
||||
disp_blk_ctl: blk_ctrl@32e28000 {
|
||||
blk-ctrl@32e28000 {
|
||||
compatible = "fsl,imx8mn-disp-blk-ctrl", "syscon";
|
||||
reg = <0x32e28000 0x100>;
|
||||
power-domains = <&pgc_dispmix>, <&pgc_dispmix>,
|
||||
|
||||
@@ -76,7 +76,7 @@ examples:
|
||||
#include <dt-bindings/clock/imx8mp-clock.h>
|
||||
#include <dt-bindings/power/imx8mp-power.h>
|
||||
|
||||
hsio_blk_ctrl: blk-ctrl@32f10000 {
|
||||
blk-ctrl@32f10000 {
|
||||
compatible = "fsl,imx8mp-hsio-blk-ctrl", "syscon";
|
||||
reg = <0x32f10000 0x24>;
|
||||
clocks = <&clk IMX8MP_CLK_USB_ROOT>,
|
||||
|
||||
@@ -23,6 +23,12 @@ properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 1
|
||||
|
||||
'#power-domain-cells':
|
||||
const: 1
|
||||
|
||||
@@ -78,9 +84,16 @@ properties:
|
||||
- const: isp1
|
||||
- const: dwe
|
||||
|
||||
bridge@5c:
|
||||
type: object
|
||||
$ref: /schemas/display/bridge/fsl,ldb.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
- '#power-domain-cells'
|
||||
- power-domains
|
||||
- power-domain-names
|
||||
@@ -94,7 +107,7 @@ examples:
|
||||
#include <dt-bindings/clock/imx8mp-clock.h>
|
||||
#include <dt-bindings/power/imx8mp-power.h>
|
||||
|
||||
media_blk_ctl: blk-ctl@32ec0000 {
|
||||
blk-ctrl@32ec0000 {
|
||||
compatible = "fsl,imx8mp-media-blk-ctrl", "syscon";
|
||||
reg = <0x32ec0000 0x138>;
|
||||
power-domains = <&mediamix_pd>, <&mipi_phy1_pd>, <&mipi_phy1_pd>,
|
||||
@@ -114,5 +127,43 @@ examples:
|
||||
clock-names = "apb", "axi", "cam1", "cam2", "disp1", "disp2",
|
||||
"isp", "phy";
|
||||
#power-domain-cells = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
bridge@5c {
|
||||
compatible = "fsl,imx8mp-ldb";
|
||||
reg = <0x5c 0x4>, <0x128 0x4>;
|
||||
reg-names = "ldb", "lvds";
|
||||
clocks = <&clk IMX8MP_CLK_MEDIA_LDB>;
|
||||
clock-names = "ldb";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
ldb_from_lcdif2: endpoint {
|
||||
remote-endpoint = <&lcdif2_to_ldb>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
ldb_lvds_ch0: endpoint {
|
||||
remote-endpoint = <&ldb_to_lvdsx4panel>;
|
||||
};
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
|
||||
ldb_lvds_ch1: endpoint {
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
|
||||
@@ -59,7 +59,7 @@ examples:
|
||||
#include <dt-bindings/clock/imx8mq-clock.h>
|
||||
#include <dt-bindings/power/imx8mq-power.h>
|
||||
|
||||
vpu_blk_ctrl: blk-ctrl@38320000 {
|
||||
blk-ctrl@38320000 {
|
||||
compatible = "fsl,imx8mq-vpu-blk-ctrl";
|
||||
reg = <0x38320000 0x100>;
|
||||
power-domains = <&pgc_vpu>, <&pgc_vpu>, <&pgc_vpu>;
|
||||
|
||||
@@ -60,7 +60,7 @@ examples:
|
||||
#include <dt-bindings/clock/imx93-clock.h>
|
||||
#include <dt-bindings/power/fsl,imx93-power.h>
|
||||
|
||||
media_blk_ctrl: system-controller@4ac10000 {
|
||||
system-controller@4ac10000 {
|
||||
compatible = "fsl,imx93-media-blk-ctrl", "syscon";
|
||||
reg = <0x4ac10000 0x10000>;
|
||||
power-domains = <&mediamix>;
|
||||
|
||||
@@ -35,6 +35,8 @@ properties:
|
||||
- mediatek,mt8188-disp-mutex
|
||||
- mediatek,mt8192-disp-mutex
|
||||
- mediatek,mt8195-disp-mutex
|
||||
- mediatek,mt8195-vpp-mutex
|
||||
- mediatek,mt8365-disp-mutex
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
@@ -70,12 +72,30 @@ properties:
|
||||
4 arguments defined in this property. Each GCE subsys id is mapping to
|
||||
a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- mediatek,mt2701-disp-mutex
|
||||
- mediatek,mt2712-disp-mutex
|
||||
- mediatek,mt6795-disp-mutex
|
||||
- mediatek,mt8173-disp-mutex
|
||||
- mediatek,mt8186-disp-mutex
|
||||
- mediatek,mt8186-mdp3-mutex
|
||||
- mediatek,mt8192-disp-mutex
|
||||
- mediatek,mt8195-disp-mutex
|
||||
then:
|
||||
required:
|
||||
- clocks
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- power-domains
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
|
||||
@@ -25,6 +25,7 @@ properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- qcom,qdu1000-aoss-qmp
|
||||
- qcom,sc7180-aoss-qmp
|
||||
- qcom,sc7280-aoss-qmp
|
||||
- qcom,sc8180x-aoss-qmp
|
||||
|
||||
@@ -62,7 +62,14 @@ properties:
|
||||
maxItems: 1
|
||||
|
||||
qcom,intents:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-matrix
|
||||
minItems: 1
|
||||
maxItems: 32
|
||||
items:
|
||||
items:
|
||||
- description: size of each intent to preallocate
|
||||
- description: amount of intents to preallocate
|
||||
minimum: 1
|
||||
description:
|
||||
List of (size, amount) pairs describing what intents should be
|
||||
preallocated for this virtual channel. This can be used to tweak the
|
||||
|
||||
@@ -25,6 +25,8 @@ properties:
|
||||
- qcom,sc8180x-pmic-glink
|
||||
- qcom,sc8280xp-pmic-glink
|
||||
- qcom,sm8350-pmic-glink
|
||||
- qcom,sm8450-pmic-glink
|
||||
- qcom,sm8550-pmic-glink
|
||||
- const: qcom,pmic-glink
|
||||
|
||||
'#address-cells':
|
||||
|
||||
@@ -33,6 +33,7 @@ properties:
|
||||
enum:
|
||||
- qcom,rpm-apq8084
|
||||
- qcom,rpm-ipq6018
|
||||
- qcom,rpm-ipq9574
|
||||
- qcom,rpm-msm8226
|
||||
- qcom,rpm-msm8909
|
||||
- qcom,rpm-msm8916
|
||||
@@ -40,6 +41,7 @@ properties:
|
||||
- qcom,rpm-msm8953
|
||||
- qcom,rpm-msm8974
|
||||
- qcom,rpm-msm8976
|
||||
- qcom,rpm-msm8994
|
||||
- qcom,rpm-msm8996
|
||||
- qcom,rpm-msm8998
|
||||
- qcom,rpm-sdm660
|
||||
@@ -84,6 +86,7 @@ if:
|
||||
- qcom,rpm-msm8974
|
||||
- qcom,rpm-msm8976
|
||||
- qcom,rpm-msm8953
|
||||
- qcom,rpm-msm8994
|
||||
then:
|
||||
properties:
|
||||
qcom,glink-channels: false
|
||||
|
||||
@@ -212,12 +212,12 @@ properties:
|
||||
- renesas,silk # SILK (RTP0RC7794LCB00011S)
|
||||
- const: renesas,r8a7794
|
||||
|
||||
- description: R-Car H3 (R8A77950)
|
||||
# Note: R-Car H3 ES1.* (R8A77950) is not supported upstream anymore!
|
||||
|
||||
- description: R-Car H3 ES2.0 and later (R8A77951)
|
||||
items:
|
||||
- enum:
|
||||
# H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKBX0010SA00 (H3 ES1.1))
|
||||
# H3ULCB (R-Car Starter Kit Premier, RTP0RC77951SKBX010SA00 (H3 ES2.0))
|
||||
- renesas,h3ulcb
|
||||
- renesas,h3ulcb # H3ULCB (R-Car Starter Kit Premier, RTP0RC77951SKBX010SA00 (H3 ES2.0))
|
||||
- renesas,salvator-x # Salvator-X (RTP0RC7795SIPB0010S)
|
||||
- renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC7795SIPB0012S)
|
||||
- const: renesas,r8a7795
|
||||
@@ -431,6 +431,13 @@ properties:
|
||||
- renesas,rzn1d400-db # RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package)
|
||||
- const: renesas,r9a06g032
|
||||
|
||||
- description: RZ/N1{D,S} EB
|
||||
items:
|
||||
- enum:
|
||||
- renesas,rzn1d400-eb # RZN1D-EB (Expansion Board when using a RZN1D-DB)
|
||||
- const: renesas,rzn1d400-db
|
||||
- const: renesas,r9a06g032
|
||||
|
||||
- description: RZ/Five and RZ/G2UL (R9A07G043)
|
||||
items:
|
||||
- enum:
|
||||
|
||||
@@ -48,6 +48,9 @@ properties:
|
||||
- const: syscon
|
||||
- items:
|
||||
- enum:
|
||||
- samsung,exynos3250-pmu
|
||||
- samsung,exynos4210-pmu
|
||||
- samsung,exynos4412-pmu
|
||||
- samsung,exynos5250-pmu
|
||||
- samsung,exynos5420-pmu
|
||||
- samsung,exynos5433-pmu
|
||||
@@ -133,6 +136,24 @@ allOf:
|
||||
- clock-names
|
||||
- clocks
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- samsung,exynos3250-pmu
|
||||
- samsung,exynos4210-pmu
|
||||
- samsung,exynos4412-pmu
|
||||
- samsung,exynos5250-pmu
|
||||
- samsung,exynos5420-pmu
|
||||
- samsung,exynos5433-pmu
|
||||
then:
|
||||
properties:
|
||||
mipi-phy: true
|
||||
else:
|
||||
properties:
|
||||
mipi-phy: false
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
@@ -144,11 +165,9 @@ allOf:
|
||||
then:
|
||||
properties:
|
||||
dp-phy: true
|
||||
mipi-phy: true
|
||||
else:
|
||||
properties:
|
||||
dp-phy: false
|
||||
mipi-phy: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
||||
@@ -26,6 +26,7 @@ properties:
|
||||
- qcom,sdm845-imem
|
||||
- qcom,sdx55-imem
|
||||
- qcom,sdx65-imem
|
||||
- qcom,sm6375-imem
|
||||
- qcom,sm8450-imem
|
||||
- const: syscon
|
||||
- const: simple-mfd
|
||||
|
||||
@@ -31,6 +31,7 @@ properties:
|
||||
- enum:
|
||||
- sifive,fu540-c000-clint
|
||||
- starfive,jh7100-clint
|
||||
- starfive,jh7110-clint
|
||||
- canaan,k210-clint
|
||||
- const: sifive,clint0
|
||||
- items:
|
||||
|
||||
@@ -240,6 +240,8 @@ patternProperties:
|
||||
description: CellWise Microelectronics Co., Ltd
|
||||
"^ceva,.*":
|
||||
description: Ceva, Inc.
|
||||
"^chargebyte,.*":
|
||||
description: chargebyte GmbH
|
||||
"^checkpoint,.*":
|
||||
description: Check Point Software Technologies Ltd.
|
||||
"^chefree,.*":
|
||||
@@ -516,6 +518,8 @@ patternProperties:
|
||||
description: GlobalTop Technology, Inc.
|
||||
"^gmt,.*":
|
||||
description: Global Mixed-mode Technology, Inc.
|
||||
"^goldelico,.*":
|
||||
description: Golden Delicious Computers GmbH & Co. KG
|
||||
"^goodix,.*":
|
||||
description: Shenzhen Huiding Technology Co., Ltd.
|
||||
"^google,.*":
|
||||
@@ -721,6 +725,8 @@ patternProperties:
|
||||
description: Lantiq Semiconductor
|
||||
"^lattice,.*":
|
||||
description: Lattice Semiconductor
|
||||
"^lctech,.*":
|
||||
description: Shenzen LC Technology Co., Ltd.
|
||||
"^leadtek,.*":
|
||||
description: Shenzhen Leadtek Technology Co., Ltd.
|
||||
"^leez,.*":
|
||||
@@ -977,6 +983,8 @@ patternProperties:
|
||||
description: OpenCores.org
|
||||
"^openembed,.*":
|
||||
description: OpenEmbed
|
||||
"^openpandora,.*":
|
||||
description: OpenPandora GmbH
|
||||
"^openrisc,.*":
|
||||
description: OpenRISC.io
|
||||
"^option,.*":
|
||||
@@ -1243,6 +1251,8 @@ patternProperties:
|
||||
description: Solomon Systech Limited
|
||||
"^sony,.*":
|
||||
description: Sony Corporation
|
||||
"^sourceparts,.*":
|
||||
description: Source Parts Inc.
|
||||
"^spansion,.*":
|
||||
description: Spansion Inc.
|
||||
"^sparkfun,.*":
|
||||
@@ -1528,6 +1538,8 @@ patternProperties:
|
||||
description: Yes Optoelectronics Co.,Ltd.
|
||||
"^yic,.*":
|
||||
description: YIC System Co., Ltd.
|
||||
"^yiming,.*":
|
||||
description: Henan Yiming Technology Co., Ltd.
|
||||
"^ylm,.*":
|
||||
description: Shenzhen Yangliming Electronic Technology Co., Ltd.
|
||||
"^yna,.*":
|
||||
|
||||
@@ -17,6 +17,7 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- apple,t8103-wdt
|
||||
- apple,t8112-wdt
|
||||
- apple,t6000-wdt
|
||||
- const: apple,wdt
|
||||
|
||||
|
||||
@@ -29,6 +29,7 @@ properties:
|
||||
- rockchip,rk3368-wdt
|
||||
- rockchip,rk3399-wdt
|
||||
- rockchip,rk3568-wdt
|
||||
- rockchip,rk3588-wdt
|
||||
- rockchip,rv1108-wdt
|
||||
- const: snps,dw-wdt
|
||||
|
||||
|
||||
@@ -214,6 +214,57 @@ call is done from the thread assisting the interrupt handler. This is a
|
||||
building block for OP-TEE OS in secure world to implement the top half and
|
||||
bottom half style of device drivers.
|
||||
|
||||
OPTEE_INSECURE_LOAD_IMAGE Kconfig option
|
||||
----------------------------------------
|
||||
|
||||
The OPTEE_INSECURE_LOAD_IMAGE Kconfig option enables the ability to load the
|
||||
BL32 OP-TEE image from the kernel after the kernel boots, rather than loading
|
||||
it from the firmware before the kernel boots. This also requires enabling the
|
||||
corresponding option in Trusted Firmware for Arm. The Trusted Firmware for Arm
|
||||
documentation [8] explains the security threat associated with enabling this as
|
||||
well as mitigations at the firmware and platform level.
|
||||
|
||||
There are additional attack vectors/mitigations for the kernel that should be
|
||||
addressed when using this option.
|
||||
|
||||
1. Boot chain security.
|
||||
|
||||
* Attack vector: Replace the OP-TEE OS image in the rootfs to gain control of
|
||||
the system.
|
||||
|
||||
* Mitigation: There must be boot chain security that verifies the kernel and
|
||||
rootfs, otherwise an attacker can modify the loaded OP-TEE binary by
|
||||
modifying it in the rootfs.
|
||||
|
||||
2. Alternate boot modes.
|
||||
|
||||
* Attack vector: Using an alternate boot mode (i.e. recovery mode), the
|
||||
OP-TEE driver isn't loaded, leaving the SMC hole open.
|
||||
|
||||
* Mitigation: If there are alternate methods of booting the device, such as a
|
||||
recovery mode, it should be ensured that the same mitigations are applied
|
||||
in that mode.
|
||||
|
||||
3. Attacks prior to SMC invocation.
|
||||
|
||||
* Attack vector: Code that is executed prior to issuing the SMC call to load
|
||||
OP-TEE can be exploited to then load an alternate OS image.
|
||||
|
||||
* Mitigation: The OP-TEE driver must be loaded before any potential attack
|
||||
vectors are opened up. This should include mounting of any modifiable
|
||||
filesystems, opening of network ports or communicating with external
|
||||
devices (e.g. USB).
|
||||
|
||||
4. Blocking SMC call to load OP-TEE.
|
||||
|
||||
* Attack vector: Prevent the driver from being probed, so the SMC call to
|
||||
load OP-TEE isn't executed when desired, leaving it open to being executed
|
||||
later and loading a modified OS.
|
||||
|
||||
* Mitigation: It is recommended to build the OP-TEE driver as builtin driver
|
||||
rather than as a module to prevent exploits that may cause the module to
|
||||
not be loaded.
|
||||
|
||||
AMD-TEE driver
|
||||
==============
|
||||
|
||||
@@ -309,3 +360,5 @@ References
|
||||
[6] include/linux/psp-tee.h
|
||||
|
||||
[7] drivers/tee/amdtee/amdtee_if.h
|
||||
|
||||
[8] https://trustedfirmware-a.readthedocs.io/en/latest/threat_model/threat_model.html
|
||||
|
||||
@@ -2604,6 +2604,12 @@ F: include/dt-bindings/*/qcom*
|
||||
F: include/linux/*/qcom*
|
||||
F: include/linux/soc/qcom/
|
||||
|
||||
ARM/QUALCOMM CHROMEBOOK SUPPORT
|
||||
R: cros-qcom-dts-watchers@chromium.org
|
||||
F: arch/arm64/boot/dts/qcom/sc7180*
|
||||
F: arch/arm64/boot/dts/qcom/sc7280*
|
||||
F: arch/arm64/boot/dts/qcom/sdm845-cheza*
|
||||
|
||||
ARM/RDA MICRO ARCHITECTURE
|
||||
M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
@@ -2654,6 +2660,7 @@ F: arch/arm64/boot/dts/renesas/
|
||||
F: arch/riscv/boot/dts/renesas/
|
||||
F: drivers/soc/renesas/
|
||||
F: include/linux/soc/renesas/
|
||||
K: \brenesas,
|
||||
|
||||
ARM/RISCPC ARCHITECTURE
|
||||
M: Russell King <linux@armlinux.org.uk>
|
||||
|
||||
@@ -27,6 +27,7 @@ config ALPHA
|
||||
select AUDIT_ARCH
|
||||
select GENERIC_CPU_VULNERABILITIES
|
||||
select GENERIC_SMP_IDLE_THREAD
|
||||
select HAS_IOPORT
|
||||
select HAVE_ARCH_AUDITSYSCALL
|
||||
select HAVE_MOD_ARCH_SPECIFIC
|
||||
select MODULES_USE_ELF_RELA
|
||||
|
||||
@@ -70,6 +70,7 @@ config ARM
|
||||
select GENERIC_SCHED_CLOCK
|
||||
select GENERIC_SMP_IDLE_THREAD
|
||||
select HARDIRQS_SW_RESEND
|
||||
select HAS_IOPORT
|
||||
select HAVE_ARCH_AUDITSYSCALL if AEABI && !OABI_COMPAT
|
||||
select HAVE_ARCH_BITREVERSE if (CPU_32v7M || CPU_32v7) && !CPU_32v6
|
||||
select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU
|
||||
|
||||
@@ -561,7 +561,9 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6dl-wandboard-revd1.dtb \
|
||||
imx6dl-yapp4-draco.dtb \
|
||||
imx6dl-yapp4-hydra.dtb \
|
||||
imx6dl-yapp4-lynx.dtb \
|
||||
imx6dl-yapp4-orion.dtb \
|
||||
imx6dl-yapp4-phoenix.dtb \
|
||||
imx6dl-yapp4-ursa.dtb \
|
||||
imx6q-apalis-eval.dtb \
|
||||
imx6q-apalis-ixora.dtb \
|
||||
@@ -668,6 +670,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6q-wandboard-revb1.dtb \
|
||||
imx6q-wandboard-revd1.dtb \
|
||||
imx6q-yapp4-crux.dtb \
|
||||
imx6q-yapp4-pegasus.dtb \
|
||||
imx6q-zii-rdu2.dtb \
|
||||
imx6qp-mba6b.dtb \
|
||||
imx6qp-nitrogen6_max.dtb \
|
||||
@@ -683,6 +686,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
|
||||
imx6qp-vicutp.dtb \
|
||||
imx6qp-wandboard-revd1.dtb \
|
||||
imx6qp-yapp4-crux-plus.dtb \
|
||||
imx6qp-yapp4-pegasus-plus.dtb \
|
||||
imx6qp-zii-rdu2.dtb \
|
||||
imx6s-dhcom-drc02.dtb
|
||||
dtb-$(CONFIG_SOC_IMX6SL) += \
|
||||
@@ -690,6 +694,7 @@ dtb-$(CONFIG_SOC_IMX6SL) += \
|
||||
imx6sl-kobo-aura2.dtb \
|
||||
imx6sl-tolino-shine2hd.dtb \
|
||||
imx6sl-tolino-shine3.dtb \
|
||||
imx6sl-tolino-vision.dtb \
|
||||
imx6sl-tolino-vision5.dtb \
|
||||
imx6sl-warp.dtb
|
||||
dtb-$(CONFIG_SOC_IMX6SLL) += \
|
||||
@@ -755,6 +760,10 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
|
||||
imx6ull-phytec-segin-lc-rdk-nand.dtb \
|
||||
imx6ull-phytec-tauri-emmc.dtb \
|
||||
imx6ull-phytec-tauri-nand.dtb \
|
||||
imx6ull-tarragon-master.dtb \
|
||||
imx6ull-tarragon-micro.dtb \
|
||||
imx6ull-tarragon-slave.dtb \
|
||||
imx6ull-tarragon-slavext.dtb \
|
||||
imx6ull-tqma6ull2-mba6ulx.dtb \
|
||||
imx6ull-tqma6ull2l-mba6ulx.dtb \
|
||||
imx6ulz-14x14-evk.dtb \
|
||||
@@ -994,16 +1003,24 @@ dtb-$(CONFIG_SOC_OMAP5) += \
|
||||
omap5-igep0050.dtb \
|
||||
omap5-sbc-t54.dtb \
|
||||
omap5-uevm.dtb
|
||||
am57xx-evm-dtbs := am57xx-beagle-x15.dtb am57xx-evm.dtbo
|
||||
am57xx-evm-reva3-dtbs := am57xx-beagle-x15-revc.dtb am57xx-evm.dtbo
|
||||
dtb-$(CONFIG_SOC_DRA7XX) += \
|
||||
am57xx-beagle-x15.dtb \
|
||||
am57xx-beagle-x15-revb1.dtb \
|
||||
am57xx-beagle-x15-revc.dtb \
|
||||
am57xx-evm.dtb \
|
||||
am57xx-evm-reva3.dtb \
|
||||
am5729-beagleboneai.dtb \
|
||||
am57xx-cl-som-am57x.dtb \
|
||||
am57xx-sbc-am57x.dtb \
|
||||
am572x-idk.dtb \
|
||||
am572x-idk-touchscreen.dtbo \
|
||||
am571x-idk.dtb \
|
||||
am571x-idk-touchscreen.dtbo \
|
||||
am574x-idk.dtb \
|
||||
am57xx-idk-lcd-osd101t2045.dtbo \
|
||||
am57xx-idk-lcd-osd101t2587.dtbo \
|
||||
dra7-evm.dtb \
|
||||
dra72-evm.dtb \
|
||||
dra72-evm-revc.dtb \
|
||||
@@ -1033,9 +1050,6 @@ dtb-$(CONFIG_ARCH_PXA) += \
|
||||
pxa300-raumfeld-speaker-m.dtb \
|
||||
pxa300-raumfeld-speaker-one.dtb \
|
||||
pxa300-raumfeld-speaker-s.dtb
|
||||
dtb-$(CONFIG_ARCH_OXNAS) += \
|
||||
ox810se-wd-mbwe.dtb \
|
||||
ox820-cloudengines-pogoplug-series-3.dtb
|
||||
dtb-$(CONFIG_ARCH_QCOM) += \
|
||||
qcom-apq8016-sbc.dtb \
|
||||
qcom-apq8026-asus-sparrow.dtb \
|
||||
@@ -1397,6 +1411,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
|
||||
sun8i-s3-elimo-initium.dtb \
|
||||
sun8i-s3-lichee-zero-plus.dtb \
|
||||
sun8i-s3-pinecube.dtb \
|
||||
sun8i-t113s-mangopi-mq-r-t113.dtb \
|
||||
sun8i-t3-cqa3t-bv3.dtb \
|
||||
sun8i-v3-sl631-imx179.dtb \
|
||||
sun8i-v3s-licheepi-zero.dtb \
|
||||
@@ -1406,7 +1421,9 @@ dtb-$(CONFIG_MACH_SUN9I) += \
|
||||
sun9i-a80-optimus.dtb \
|
||||
sun9i-a80-cubieboard4.dtb
|
||||
dtb-$(CONFIG_MACH_SUNIV) += \
|
||||
suniv-f1c100s-licheepi-nano.dtb
|
||||
suniv-f1c100s-licheepi-nano.dtb \
|
||||
suniv-f1c200s-lctech-pi.dtb \
|
||||
suniv-f1c200s-popstick-v1.1.dtb
|
||||
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
|
||||
tegra20-acer-a500-picasso.dtb \
|
||||
tegra20-asus-tf101.dtb \
|
||||
|
||||
@@ -29,25 +29,23 @@
|
||||
};
|
||||
|
||||
/* User IO */
|
||||
user_leds: user_leds {
|
||||
user_leds: user-leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&user_leds_pins>;
|
||||
|
||||
user-led0 {
|
||||
gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "gpio";
|
||||
default-state = "on";
|
||||
};
|
||||
|
||||
user-led1 {
|
||||
gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "gpio";
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
|
||||
user_buttons: user_buttons {
|
||||
user_buttons: user-buttons {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&user_buttons_pins>;
|
||||
@@ -70,14 +68,14 @@
|
||||
};
|
||||
|
||||
&am33xx_pinmux {
|
||||
user_buttons_pins: pinmux_user_buttons {
|
||||
user_buttons_pins: pinmux-user-buttons {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_EMU0, PIN_INPUT_PULLDOWN, MUX_MODE7) /* emu0.gpio3_7 */
|
||||
AM33XX_PADCONF(AM335X_PIN_EMU1, PIN_INPUT_PULLDOWN, MUX_MODE7) /* emu1.gpio3_8 */
|
||||
>;
|
||||
};
|
||||
|
||||
user_leds_pins: pinmux_user_leds {
|
||||
user_leds_pins: pinmux-user-leds {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_csn1.gpio1_30 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_csn2.gpio1_31 */
|
||||
@@ -87,7 +85,7 @@
|
||||
|
||||
/* CAN */
|
||||
&am33xx_pinmux {
|
||||
dcan1_pins: pinmux_dcan1 {
|
||||
dcan1_pins: pinmux-dcan1 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_OUTPUT_PULLUP, MUX_MODE2) /* uart1_rxd.dcan1_tx_mux2 */
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT_PULLUP, MUX_MODE2) /* uart1_txd.dcan1_rx_mux2 */
|
||||
@@ -144,7 +142,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cb_gpio_pins>;
|
||||
|
||||
cb_gpio_pins: pinmux_cb_gpio {
|
||||
cb_gpio_pins: pinmux-cb-gpio {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* uart0_ctsn.gpio1_8 */
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* uart0_rtsn.gpio1_9 */
|
||||
@@ -154,7 +152,7 @@
|
||||
|
||||
/* MMC */
|
||||
&am33xx_pinmux {
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
mmc1_pins: pinmux-mmc1-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
|
||||
@@ -178,14 +176,14 @@
|
||||
|
||||
/* UARTs */
|
||||
&am33xx_pinmux {
|
||||
uart0_pins: pinmux_uart0 {
|
||||
uart0_pins: pinmux-uart0 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
|
||||
uart1_pins: pinmux_uart1 {
|
||||
uart1_pins: pinmux-uart1 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
|
||||
@@ -194,14 +192,14 @@
|
||||
>;
|
||||
};
|
||||
|
||||
uart2_pins: pinmux_uart2 {
|
||||
uart2_pins: pinmux-uart2 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_tx_clk.uart2_rxd */
|
||||
AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_rx_clk.uart2_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: pinmux_uart3 {
|
||||
uart3_pins: pinmux-uart3 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_rxd3.uart3_rxd */
|
||||
AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_rxd2.uart3_txd */
|
||||
|
||||
@@ -14,6 +14,7 @@
|
||||
aliases {
|
||||
rtc0 = &i2c_rtc;
|
||||
rtc1 = &rtc;
|
||||
rtc2 = &tps;
|
||||
};
|
||||
|
||||
cpus {
|
||||
@@ -48,7 +49,7 @@
|
||||
|
||||
/* EMMC */
|
||||
&am33xx_pinmux {
|
||||
emmc_pins: pinmux_emmc_pins {
|
||||
emmc_pins: pinmux-emmc-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
|
||||
@@ -124,7 +125,7 @@
|
||||
|
||||
/* I2C Busses */
|
||||
&am33xx_pinmux {
|
||||
i2c0_pins: pinmux_i2c0 {
|
||||
i2c0_pins: pinmux-i2c0 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT, MUX_MODE0)
|
||||
@@ -164,7 +165,7 @@
|
||||
|
||||
/* NAND memory */
|
||||
&am33xx_pinmux {
|
||||
nandflash_pins: pinmux_nandflash {
|
||||
nandflash_pins: pinmux-nandflash {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE0)
|
||||
@@ -202,7 +203,6 @@
|
||||
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
|
||||
nand-bus-width = <8>;
|
||||
ti,nand-ecc-opt = "bch8";
|
||||
gpmc,device-nand = "true";
|
||||
gpmc,device-width = <1>;
|
||||
gpmc,sync-clk-ps = <0>;
|
||||
gpmc,cs-on-ns = <0>;
|
||||
@@ -316,7 +316,7 @@
|
||||
|
||||
/* SPI Busses */
|
||||
&am33xx_pinmux {
|
||||
spi0_pins: pinmux_spi0 {
|
||||
spi0_pins: pinmux-spi0 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLDOWN, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLDOWN, MUX_MODE0)
|
||||
|
||||
@@ -18,7 +18,7 @@
|
||||
};
|
||||
|
||||
/* User IO */
|
||||
user_leds: user_leds {
|
||||
user_leds: user-leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&user_leds_pins>;
|
||||
@@ -39,7 +39,7 @@
|
||||
|
||||
/* User Leds */
|
||||
&am33xx_pinmux {
|
||||
user_leds_pins: pinmux_user_leds {
|
||||
user_leds_pins: pinmux-user-leds {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2_22 */
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* mcasp0_fsx.gpio3_15 */
|
||||
@@ -49,7 +49,7 @@
|
||||
|
||||
/* CAN Busses */
|
||||
&am33xx_pinmux {
|
||||
dcan1_pins: pinmux_dcan1 {
|
||||
dcan1_pins: pinmux-dcan1 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT_PULLUP, MUX_MODE2) /* uart0_ctsn.d_can1_tx */
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE2) /* uart0_rtsn.d_can1_rx */
|
||||
@@ -65,7 +65,7 @@
|
||||
|
||||
/* Ethernet */
|
||||
&am33xx_pinmux {
|
||||
ethernet1_pins: pinmux_ethernet1 {
|
||||
ethernet1_pins: pinmux-ethernet1 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT, MUX_MODE1) /* gpmc_a0.mii2_txen */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a1.mii2_rxdv */
|
||||
@@ -108,7 +108,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&user_gpios_pins>;
|
||||
|
||||
user_gpios_pins: pinmux_user_gpios {
|
||||
user_gpios_pins: pinmux-user-gpios {
|
||||
pinctrl-single,pins = <
|
||||
/* DIGIN 1-4 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT, MUX_MODE7) /* gpmc_ad11.gpio0_27 */
|
||||
@@ -126,7 +126,7 @@
|
||||
|
||||
/* MMC */
|
||||
&am33xx_pinmux {
|
||||
mmc1_pins: pinmux_mmc1 {
|
||||
mmc1_pins: pinmux-mmc1 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
|
||||
@@ -155,14 +155,14 @@
|
||||
|
||||
/* UARTs */
|
||||
&am33xx_pinmux {
|
||||
uart0_pins: pinmux_uart0 {
|
||||
uart0_pins: pinmux-uart0 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
|
||||
uart2_pins: pinmux_uart2 {
|
||||
uart2_pins: pinmux-uart2 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_tx_clk.uart2_rxd */
|
||||
AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_rx_clk.uart2_txd */
|
||||
@@ -184,7 +184,7 @@
|
||||
|
||||
/* RS485 - UART1 */
|
||||
&am33xx_pinmux {
|
||||
uart1_rs485_pins: pinmux_uart1_rs485_pins {
|
||||
uart1_rs485_pins: pinmux-uart1-rs485-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
|
||||
|
||||
@@ -8,8 +8,34 @@
|
||||
model = "Phytec AM335x phyBOARD-WEGA";
|
||||
compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx";
|
||||
|
||||
sound: sound_iface {
|
||||
compatible = "ti,da830-evm-audio";
|
||||
sound: sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "snd-wega";
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,bitclock-master = <&sound_iface_main>;
|
||||
simple-audio-card,frame-master = <&sound_iface_main>;
|
||||
simple-audio-card,mclk-fs = <32>;
|
||||
simple-audio-card,widgets =
|
||||
"Line", "Line In",
|
||||
"Line", "Line Out",
|
||||
"Speaker", "Speaker";
|
||||
simple-audio-card,routing =
|
||||
"Line Out", "LLOUT",
|
||||
"Line Out", "RLOUT",
|
||||
"Speaker", "SPOP",
|
||||
"Speaker", "SPOM",
|
||||
"LINE1L", "Line In",
|
||||
"LINE1R", "Line In";
|
||||
|
||||
simple-audio-card,cpu {
|
||||
sound-dai = <&mcasp0>;
|
||||
};
|
||||
|
||||
sound_iface_main: simple-audio-card,codec {
|
||||
sound-dai = <&tlv320aic3007>;
|
||||
clocks = <&mcasp0_fck>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
vcc3v3: fixedregulator1 {
|
||||
@@ -23,7 +49,7 @@
|
||||
|
||||
/* Audio */
|
||||
&am33xx_pinmux {
|
||||
mcasp0_pins: pinmux_mcasp0 {
|
||||
mcasp0_pins: pinmux-mcasp0 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE0)
|
||||
@@ -36,6 +62,7 @@
|
||||
|
||||
&i2c0 {
|
||||
tlv320aic3007: tlv320aic3007@18 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "ti,tlv320aic3007";
|
||||
reg = <0x18>;
|
||||
AVDD-supply = <&vcc3v3>;
|
||||
@@ -47,6 +74,7 @@
|
||||
};
|
||||
|
||||
&mcasp0 {
|
||||
#sound-dai-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcasp0_pins>;
|
||||
op-mode = <0>; /* DAVINCI_MCASP_IIS_MODE */
|
||||
@@ -59,23 +87,10 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sound {
|
||||
ti,model = "AM335x-Wega";
|
||||
ti,audio-codec = <&tlv320aic3007>;
|
||||
ti,mcasp-controller = <&mcasp0>;
|
||||
ti,audio-routing =
|
||||
"Line Out", "LLOUT",
|
||||
"Line Out", "RLOUT",
|
||||
"LINE1L", "Line In",
|
||||
"LINE1R", "Line In";
|
||||
clocks = <&mcasp0_fck>;
|
||||
clock-names = "mclk";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* CAN Busses */
|
||||
&am33xx_pinmux {
|
||||
dcan1_pins: pinmux_dcan1 {
|
||||
dcan1_pins: pinmux-dcan1 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT_PULLUP, MUX_MODE2) /* uart0_ctsn.d_can1_tx */
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE2) /* uart0_rtsn.d_can1_rx */
|
||||
@@ -91,7 +106,7 @@
|
||||
|
||||
/* Ethernet */
|
||||
&am33xx_pinmux {
|
||||
ethernet1_pins: pinmux_ethernet1 {
|
||||
ethernet1_pins: pinmux-ethernet1 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT, MUX_MODE1) /* gpmc_a0.mii2_txen */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a1.mii2_rxdv */
|
||||
@@ -131,7 +146,7 @@
|
||||
|
||||
/* MMC */
|
||||
&am33xx_pinmux {
|
||||
mmc1_pins: pinmux_mmc1 {
|
||||
mmc1_pins: pinmux-mmc1 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
|
||||
@@ -161,14 +176,14 @@
|
||||
|
||||
/* UARTs */
|
||||
&am33xx_pinmux {
|
||||
uart0_pins: pinmux_uart0 {
|
||||
uart0_pins: pinmux-uart0 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
|
||||
>;
|
||||
};
|
||||
|
||||
uart1_pins: pinmux_uart1_pins {
|
||||
uart1_pins: pinmux-uart1 {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
|
||||
|
||||
@@ -0,0 +1,32 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (C) 2019-2022 Texas Instruments Incorporated - https://www.ti.com/
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
&i2c1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
touchscreen: edt-ft5506@38 {
|
||||
compatible = "edt,edt-ft5506", "edt,edt-ft5x06";
|
||||
|
||||
reg = <0x38>;
|
||||
|
||||
interrupt-parent = <&gpio5>;
|
||||
interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
/* GPIO line is inverted before going to touch panel */
|
||||
reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
|
||||
|
||||
touchscreen-size-x = <1920>;
|
||||
touchscreen-size-y = <1200>;
|
||||
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,32 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (C) 2019-2022 Texas Instruments Incorporated - https://www.ti.com/
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
&i2c1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
touchscreen: edt-ft5506@38 {
|
||||
compatible = "edt,edt-ft5506", "edt,edt-ft5x06";
|
||||
|
||||
reg = <0x38>;
|
||||
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <14 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
/* GPIO line is inverted before going to touch panel */
|
||||
reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
|
||||
|
||||
touchscreen-size-x = <1920>;
|
||||
touchscreen-size-y = <1200>;
|
||||
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,127 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* DT overlay for AM57xx GP EVM boards
|
||||
*
|
||||
* Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
&{/} {
|
||||
compatible = "ti,am5728-evm", "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
|
||||
model = "TI AM5728 EVM";
|
||||
|
||||
aliases {
|
||||
display0 = "/display";
|
||||
display1 = "/connector"; // Fixme: &lcd0 and &hdmi0 could be
|
||||
// resolved here correcly based on
|
||||
// information in the base dtb symbol
|
||||
// table with a fix in dtc
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
button-user1 {
|
||||
gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
|
||||
label = "USER1";
|
||||
linux,code = <BTN_1>;
|
||||
};
|
||||
|
||||
button-user2 {
|
||||
gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
|
||||
label = "USER2";
|
||||
linux,code = <BTN_2>;
|
||||
};
|
||||
|
||||
button-user3 {
|
||||
gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
|
||||
label = "USER3";
|
||||
linux,code = <BTN_3>;
|
||||
};
|
||||
|
||||
button-user4 {
|
||||
gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
|
||||
label = "USER4";
|
||||
linux,code = <BTN_4>;
|
||||
};
|
||||
|
||||
button-user5 {
|
||||
gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
|
||||
label = "USER5";
|
||||
linux,code = <BTN_5>;
|
||||
};
|
||||
};
|
||||
|
||||
lcd0: display {
|
||||
compatible = "osddisplays,osd070t1718-19ts", "panel-dpi";
|
||||
backlight = <&lcd_bl>;
|
||||
enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
|
||||
label = "lcd";
|
||||
|
||||
port {
|
||||
lcd_in: endpoint {
|
||||
remote-endpoint = <&dpi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
lcd_bl: backlight {
|
||||
compatible = "pwm-backlight";
|
||||
brightness-levels = <0 243 245 247 249 251 252 253 255>;
|
||||
default-brightness-level = <8>;
|
||||
pwms = <&ehrpwm1 0 50000 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&ehrpwm1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&epwmss1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c5 {
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
touchscreen@5c {
|
||||
compatible = "pixcir,pixcir_tangoc";
|
||||
attb-gpio = <&gpio2 4 GPIO_ACTIVE_HIGH>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
|
||||
reg = <0x5c>;
|
||||
reset-gpio = <&gpio2 6 GPIO_ACTIVE_HIGH>;
|
||||
touchscreen-size-x = <1024>;
|
||||
touchscreen-size-y = <600>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart8 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dss {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
dpi_out: endpoint {
|
||||
data-lines = <24>;
|
||||
remote-endpoint = <&lcd_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,63 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (C) 2019-2022 Texas Instruments Incorporated - https://www.ti.com/
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
&{/} {
|
||||
aliases {
|
||||
display0 = "/display";
|
||||
display1 = "/connector";
|
||||
};
|
||||
|
||||
lcd_bl: backlight {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&ecap0 0 50000 1>;
|
||||
brightness-levels = <0 51 53 56 62 75 101 152 255>;
|
||||
default-brightness-level = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_bridge {
|
||||
status = "okay";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
lcd: display {
|
||||
compatible = "osddisplays,osd101t2045-53ts";
|
||||
reg = <0>;
|
||||
|
||||
label = "lcd";
|
||||
|
||||
backlight = <&lcd_bl>;
|
||||
|
||||
port {
|
||||
lcd_in: endpoint {
|
||||
remote-endpoint = <&dsi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_bridge_ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
dsi_out: endpoint {
|
||||
remote-endpoint = <&lcd_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&epwmss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ecap0 {
|
||||
status = "okay";
|
||||
};
|
||||
@@ -0,0 +1,66 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (C) 2019-2022 Texas Instruments Incorporated - https://www.ti.com/
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
&{/} {
|
||||
aliases {
|
||||
display0 = "/display";
|
||||
display1 = "/connector";
|
||||
};
|
||||
|
||||
lcd_bl: backlight {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&ecap0 0 50000 1>;
|
||||
brightness-levels = <0 51 53 56 62 75 101 152 255>;
|
||||
default-brightness-level = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_bridge {
|
||||
status = "okay";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
lcd: display {
|
||||
compatible = "osddisplays,osd101t2587-53ts";
|
||||
reg = <0>;
|
||||
|
||||
label = "lcd";
|
||||
|
||||
backlight = <&lcd_bl>;
|
||||
|
||||
port {
|
||||
lcd_in: endpoint {
|
||||
remote-endpoint = <&dsi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_bridge_ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
dsi_out: endpoint {
|
||||
remote-endpoint = <&lcd_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&epwmss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ecap0 {
|
||||
status = "okay";
|
||||
};
|
||||
@@ -171,8 +171,8 @@
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "cpu";
|
||||
ethernet = <ð1>;
|
||||
phy-mode = "rgmii-id";
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
|
||||
@@ -148,7 +148,7 @@
|
||||
|
||||
port@0 {
|
||||
ethernet = <ð0>;
|
||||
label = "cpu";
|
||||
phy-mode = "rgmii";
|
||||
reg = <0>;
|
||||
|
||||
fixed-link {
|
||||
|
||||
@@ -68,8 +68,13 @@
|
||||
|
||||
port@10 {
|
||||
reg = <10>;
|
||||
label = "cpu";
|
||||
phy-mode = "2500base-x";
|
||||
|
||||
ethernet = <ð1>;
|
||||
fixed-link {
|
||||
speed = <2500>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
@@ -48,8 +48,13 @@
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "cpu";
|
||||
phy-mode = "2500base-x";
|
||||
ethernet = <ð1>;
|
||||
|
||||
fixed-link {
|
||||
speed = <2500>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
@@ -195,7 +195,7 @@
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "cpu";
|
||||
phy-mode = "sgmii";
|
||||
ethernet = <ð2>;
|
||||
|
||||
fixed-link {
|
||||
|
||||
@@ -479,7 +479,6 @@
|
||||
|
||||
ports@5 {
|
||||
reg = <5>;
|
||||
label = "cpu";
|
||||
ethernet = <ð1>;
|
||||
phy-mode = "rgmii-id";
|
||||
|
||||
@@ -491,7 +490,6 @@
|
||||
|
||||
ports@6 {
|
||||
reg = <6>;
|
||||
label = "cpu";
|
||||
ethernet = <ð0>;
|
||||
phy-mode = "rgmii-id";
|
||||
|
||||
|
||||
@@ -62,7 +62,7 @@
|
||||
};
|
||||
|
||||
usb@58000 {
|
||||
status = "ok"
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ethernet@70000 {
|
||||
|
||||
@@ -302,7 +302,7 @@
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "cpu";
|
||||
phy-mode = "rgmii-id";
|
||||
ethernet = <ð0>;
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user