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Merge 18032df5ef ("Merge tag 'soc-arm-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc") into android-mainline

Browse Source 
Steps on the way to 6.4-rc1

Change-Id: I8c448b8a69f26e774de2c3368bd22541ce434ffe
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Kroah-Hartman
2023-05-12 03:33:21 +00:00
parent 5353cbb84f 18032df5ef
commit 93c19faf38
39 changed files with 167 additions and 345 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/Kconfig
-2
View File
@@ -497,8 +497,6 @@ source "arch/arm/mach-omap2/Kconfig"
source "arch/arm/mach-orion5x/Kconfig"
source "arch/arm/mach-oxnas/Kconfig"
source "arch/arm/mach-pxa/Kconfig"
source "arch/arm/mach-qcom/Kconfig"
arch/arm/Makefile
-1
View File
@@ -203,7 +203,6 @@ machine-$(CONFIG_ARCH_MSTARV7) += mstar
machine-$(CONFIG_ARCH_NOMADIK) += nomadik
machine-$(CONFIG_ARCH_NPCM) += npcm
machine-$(CONFIG_ARCH_NSPIRE) += nspire
machine-$(CONFIG_ARCH_OXNAS) += oxnas
machine-$(CONFIG_ARCH_OMAP1) += omap1
machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2
machine-$(CONFIG_ARCH_ORION5X) += orion5x
arch/arm/common/locomo.c
+2 -4
View File
@@ -494,7 +494,7 @@ static int locomo_probe(struct platform_device *dev)
return __locomo_probe(&dev->dev, mem, irq);
}
static int locomo_remove(struct platform_device *dev)
static void locomo_remove(struct platform_device *dev)
{
struct locomo *lchip = platform_get_drvdata(dev);
@@ -502,8 +502,6 @@ static int locomo_remove(struct platform_device *dev)
__locomo_remove(lchip);
platform_set_drvdata(dev, NULL);
}
return 0;
}
/*
@@ -514,7 +512,7 @@ static int locomo_remove(struct platform_device *dev)
*/
static struct platform_driver locomo_device_driver = {
.probe = locomo_probe,
.remove = locomo_remove,
.remove_new = locomo_remove,
#ifdef CONFIG_PM
.suspend = locomo_suspend,
.resume = locomo_resume,
arch/arm/common/sa1111.c
+2 -4
View File
@@ -1123,7 +1123,7 @@ static int sa1111_probe(struct platform_device *pdev)
return __sa1111_probe(&pdev->dev, mem, irq);
}
static int sa1111_remove(struct platform_device *pdev)
static void sa1111_remove(struct platform_device *pdev)
{
struct sa1111 *sachip = platform_get_drvdata(pdev);
@@ -1135,8 +1135,6 @@ static int sa1111_remove(struct platform_device *pdev)
__sa1111_remove(sachip);
platform_set_drvdata(pdev, NULL);
}
return 0;
}
static struct dev_pm_ops sa1111_pm_ops = {
@@ -1155,7 +1153,7 @@ static struct dev_pm_ops sa1111_pm_ops = {
*/
static struct platform_driver sa1111_device_driver = {
.probe = sa1111_probe,
.remove = sa1111_remove,
.remove_new = sa1111_remove,
.driver = {
.name = "sa1111",
.pm = &sa1111_pm_ops,
arch/arm/common/scoop.c
+2 -4
View File
@@ -236,7 +236,7 @@ err_ioremap:
return ret;
}
static int scoop_remove(struct platform_device *pdev)
static void scoop_remove(struct platform_device *pdev)
{
struct scoop_dev *sdev = platform_get_drvdata(pdev);
@@ -246,13 +246,11 @@ static int scoop_remove(struct platform_device *pdev)
platform_set_drvdata(pdev, NULL);
iounmap(sdev->base);
kfree(sdev);
return 0;
}
static struct platform_driver scoop_driver = {
.probe = scoop_probe,
.remove = scoop_remove,
.remove_new = scoop_remove,
.suspend = scoop_suspend,
.resume = scoop_resume,
.driver = {
arch/arm/mach-bcm/bcm_kona_smc.c
+6 -17
View File
@@ -31,34 +31,23 @@ static const struct of_device_id bcm_kona_smc_ids[] __initconst = {
int __init bcm_kona_smc_init(void)
{
struct device_node *node;
const __be32 *prop_val;
u64 prop_size = 0;
unsigned long buffer_size;
u32 buffer_phys;
struct resource res;
int ret;
/* Read buffer addr and size from the device tree node */
node = of_find_matching_node(NULL, bcm_kona_smc_ids);
if (!node)
return -ENODEV;
prop_val = of_get_address(node, 0, &prop_size, NULL);
ret = of_address_to_resource(node, 0, &res);
of_node_put(node);
if (!prop_val)
if (ret)
return -EINVAL;
/* We assume space for four 32-bit arguments */
if (prop_size < 4 * sizeof(u32) || prop_size > (u64)ULONG_MAX)
return -EINVAL;
buffer_size = (unsigned long)prop_size;
buffer_phys = be32_to_cpup(prop_val);
if (!buffer_phys)
return -EINVAL;
bcm_smc_buffer = ioremap(buffer_phys, buffer_size);
bcm_smc_buffer = ioremap(res.start, resource_size(&res));
if (!bcm_smc_buffer)
return -ENOMEM;
bcm_smc_buffer_phys = buffer_phys;
bcm_smc_buffer_phys = res.start;
pr_info("Kona Secure API initialized\n");
arch/arm/mach-exynos/exynos.c
+5 -3
View File
@@ -50,11 +50,13 @@ void __init exynos_sysram_init(void)
struct device_node *node;
for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") {
struct resource res;
if (!of_device_is_available(node))
continue;
sysram_base_addr = of_iomap(node, 0);
sysram_base_phys = of_translate_address(node,
of_get_address(node, 0, NULL, NULL));
of_address_to_resource(node, 0, &res);
sysram_base_addr = ioremap(res.start, resource_size(&res));
sysram_base_phys = res.start;
of_node_put(node);
break;
}
arch/arm/mach-exynos/suspend.c
+1 -1
View File
@@ -667,7 +667,7 @@ void __init exynos_pm_init(void)
return;
}
if (WARN_ON(!of_find_property(np, "interrupt-controller", NULL))) {
if (WARN_ON(!of_property_read_bool(np, "interrupt-controller"))) {
pr_warn("Outdated DT detected, suspend/resume will NOT work\n");
of_node_put(np);
return;
arch/arm/mach-imx/gpc.c
+1 -1
View File
@@ -275,7 +275,7 @@ void __init imx_gpc_check_dt(void)
if (WARN_ON(!np))
return;
if (WARN_ON(!of_find_property(np, "interrupt-controller", NULL))) {
if (WARN_ON(!of_property_read_bool(np, "interrupt-controller"))) {
pr_warn("Outdated DT detected, suspend/resume will NOT work\n");
/* map GPC, so that at least CPUidle and WARs keep working */
arch/arm/mach-imx/mach-imx6q.c
+9 -1
View File
@@ -79,7 +79,7 @@ static void __init imx6q_enet_phy_init(void)
static void __init imx6q_1588_init(void)
{
struct device_node *np;
struct clk *ptp_clk;
struct clk *ptp_clk, *fec_enet_ref;
struct clk *enet_ref;
struct regmap *gpr;
u32 clksel;
@@ -90,6 +90,14 @@ static void __init imx6q_1588_init(void)
return;
}
/*
* If enet_clk_ref configured, we assume DT did it properly and .
* clk-imx6q.c will do needed configuration.
*/
fec_enet_ref = of_clk_get_by_name(np, "enet_clk_ref");
if (!IS_ERR(fec_enet_ref))
goto put_node;
ptp_clk = of_clk_get(np, 2);
if (IS_ERR(ptp_clk)) {
pr_warn("%s: failed to get ptp clock\n", __func__);
arch/arm/mach-imx/mach-imx6ul.c
-20
View File
@@ -4,8 +4,6 @@
*/
#include <linux/irqchip.h>
#include <linux/mfd/syscon.h>
#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
#include <linux/micrel_phy.h>
#include <linux/of_platform.h>
#include <linux/phy.h>
#include <linux/regmap.h>
@@ -16,30 +14,12 @@
#include "cpuidle.h"
#include "hardware.h"
static void __init imx6ul_enet_clk_init(void)
{
struct regmap *gpr;
gpr = syscon_regmap_lookup_by_compatible("fsl,imx6ul-iomuxc-gpr");
if (!IS_ERR(gpr))
regmap_update_bits(gpr, IOMUXC_GPR1, IMX6UL_GPR1_ENET_CLK_DIR,
IMX6UL_GPR1_ENET_CLK_OUTPUT);
else
pr_err("failed to find fsl,imx6ul-iomux-gpr regmap\n");
}
static inline void imx6ul_enet_init(void)
{
imx6ul_enet_clk_init();
}
static void __init imx6ul_init_machine(void)
{
imx_print_silicon_rev(cpu_is_imx6ull() ? "i.MX6ULL" : "i.MX6UL",
imx_get_soc_revision());
of_platform_default_populate(NULL, NULL, NULL);
imx6ul_enet_init();
imx_anatop_init();
imx6ul_pm_init();
}
arch/arm/mach-imx/mmdc.c
+2 -3
View File
@@ -456,7 +456,7 @@ static int mmdc_pmu_init(struct mmdc_pmu *pmu_mmdc,
return pmu_mmdc->id;
}
static int imx_mmdc_remove(struct platform_device *pdev)
static void imx_mmdc_remove(struct platform_device *pdev)
{
struct mmdc_pmu *pmu_mmdc = platform_get_drvdata(pdev);
@@ -466,7 +466,6 @@ static int imx_mmdc_remove(struct platform_device *pdev)
iounmap(pmu_mmdc->mmdc_base);
clk_disable_unprepare(pmu_mmdc->mmdc_ipg_clk);
kfree(pmu_mmdc);
return 0;
}
static int imx_mmdc_perf_init(struct platform_device *pdev, void __iomem *mmdc_base,
@@ -592,7 +591,7 @@ static struct platform_driver imx_mmdc_driver = {
.of_match_table = imx_mmdc_dt_ids,
},
.probe = imx_mmdc_probe,
.remove = imx_mmdc_remove,
.remove_new = imx_mmdc_remove,
};
static int __init imx_mmdc_init(void)
arch/arm/mach-mmp/Kconfig
-6
View File
@@ -76,10 +76,4 @@ config CPU_MMP2
help
Select code specific to MMP2. MMP2 is ARMv7 compatible.
config USB_EHCI_MV_U2O
bool "EHCI support for PXA USB OTG controller"
depends on USB_EHCI_MV
help
Enables support for OTG controller which can be switched to host mode.
endif
arch/arm/mach-mstar/Kconfig
-7
View File
@@ -20,11 +20,4 @@ config MACH_INFINITY
help
Support for MStar/Sigmastar infinity IP camera SoCs.
config MACH_MERCURY
bool "MStar/Sigmastar mercury SoC support"
default ARCH_MSTARV7
help
Support for MStar/Sigmastar mercury dash camera SoCs.
Note that older Mercury2 SoCs are ARM9 based and not supported.
endif
arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
+56 -26
View File
@@ -14,6 +14,9 @@
#include <linux/mv643xx_eth.h>
#include <linux/ethtool.h>
#include <linux/i2c.h>
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include "mv78xx0.h"
@@ -21,6 +24,11 @@
#include "mpp.h"
#define TSWXL_AUTO_SWITCH 15
#define TSWXL_USB_POWER1 30
#define TSWXL_USB_POWER2 31
/* This arch has 2 Giga Ethernet */
static struct mv643xx_eth_platform_data db78x00_ge00_data = {
@@ -39,7 +47,7 @@ static struct mv_sata_platform_data db78x00_sata_data = {
};
static struct i2c_board_info __initdata db78x00_i2c_rtc = {
I2C_BOARD_INFO("ds1338", 0x68),
I2C_BOARD_INFO("rs5c372a", 0x32),
};
@@ -57,9 +65,9 @@ static unsigned int wxl_mpp_config[] __initdata = {
MPP10_GE1_RXD2,
MPP11_GE1_RXD3,
MPP12_GPIO,
MPP13_SYSRST_OUTn,
MPP14_SATA1_ACTn,
MPP15_SATA0_ACTn,
MPP13_GPIO,
MPP14_GPIO,
MPP15_GPIO,
MPP16_GPIO,
MPP17_GPIO,
MPP18_GPIO,
@@ -73,7 +81,7 @@ static unsigned int wxl_mpp_config[] __initdata = {
MPP26_UA2_CTSn,
MPP27_UA2_RTSn,
MPP28_GPIO,
MPP29_SYSRST_OUTn,
MPP29_GPIO,
MPP30_GPIO,
MPP31_GPIO,
MPP32_GPIO,
@@ -84,19 +92,41 @@ static unsigned int wxl_mpp_config[] __initdata = {
MPP37_GPIO,
MPP38_GPIO,
MPP39_GPIO,
MPP40_UNUSED,
MPP41_UNUSED,
MPP42_UNUSED,
MPP43_UNUSED,
MPP44_UNUSED,
MPP45_UNUSED,
MPP46_UNUSED,
MPP47_UNUSED,
MPP48_SATA1_ACTn,
MPP49_SATA0_ACTn,
MPP40_GPIO,
MPP41_GPIO,
MPP42_GPIO,
MPP43_GPIO,
MPP44_GPIO,
MPP45_GPIO,
MPP46_GPIO,
MPP47_GPIO,
MPP48_GPIO,
MPP49_GPIO,
0
};
static struct gpio_keys_button tswxl_buttons[] = {
{
.code = KEY_OPTION,
.gpio = TSWXL_AUTO_SWITCH,
.desc = "Power-auto Switch",
.active_low = 1,
}
};
static struct gpio_keys_platform_data tswxl_button_data = {
.buttons = tswxl_buttons,
.nbuttons = ARRAY_SIZE(tswxl_buttons),
};
static struct platform_device tswxl_button_device = {
.name = "gpio-keys",
.id = -1,
.num_resources = 0,
.dev = {
.platform_data = &tswxl_button_data,
},
};
static void __init wxl_init(void)
{
@@ -111,7 +141,6 @@ static void __init wxl_init(void)
*/
mv78xx0_ehci0_init();
mv78xx0_ehci1_init();
mv78xx0_ehci2_init();
mv78xx0_ge00_init(&db78x00_ge00_data);
mv78xx0_ge01_init(&db78x00_ge01_data);
mv78xx0_sata_init(&db78x00_sata_data);
@@ -119,22 +148,23 @@ static void __init wxl_init(void)
mv78xx0_uart1_init();
mv78xx0_uart2_init();
mv78xx0_uart3_init();
mv78xx0_xor_init();
mv78xx0_crypto_init();
mv78xx0_i2c_init();
i2c_register_board_info(0, &db78x00_i2c_rtc, 1);
//enable both usb ports
gpio_direction_output(TSWXL_USB_POWER1, 1);
gpio_direction_output(TSWXL_USB_POWER2, 1);
//enable rear switch
platform_device_register(&tswxl_button_device);
}
static int __init wxl_pci_init(void)
{
if (machine_is_terastation_wxl()) {
/*
* Assign the x16 PCIe slot on the board to CPU core
* #0, and let CPU core #1 have the four x1 slots.
*/
if (mv78xx0_core_index() == 0)
mv78xx0_pcie_init(0, 1);
else
mv78xx0_pcie_init(1, 0);
}
if (machine_is_terastation_wxl() && mv78xx0_core_index() == 0)
mv78xx0_pcie_init(1, 1);
return 0;
}
arch/arm/mach-mv78xx0/common.c
+23
View File
@@ -342,6 +342,29 @@ void __ref mv78xx0_timer_init(void)
IRQ_MV78XX0_TIMER_1, get_tclk());
}
/****************************************************************************
* XOR engine
****************************************************************************/
void __init mv78xx0_xor_init(void)
{
orion_xor0_init(XOR_PHYS_BASE,
XOR_PHYS_BASE + 0x200,
IRQ_MV78XX0_XOR_0, IRQ_MV78XX0_XOR_1);
}
/****************************************************************************
* Cryptographic Engines and Security Accelerator (CESA)
****************************************************************************/
void __init mv78xx0_crypto_init(void)
{
mvebu_mbus_add_window_by_id(MV78XX0_MBUS_SRAM_TARGET,
MV78XX0_MBUS_SRAM_ATTR,
MV78XX0_SRAM_PHYS_BASE,
MV78XX0_SRAM_SIZE);
orion_crypto_init(CRYPTO_PHYS_BASE, MV78XX0_SRAM_PHYS_BASE,
SZ_8K, IRQ_MV78XX0_CRYPTO);
}
/*****************************************************************************
* General
arch/arm/mach-mv78xx0/common.h
+2
View File
@@ -43,6 +43,8 @@ void mv78xx0_uart0_init(void);
void mv78xx0_uart1_init(void);
void mv78xx0_uart2_init(void);
void mv78xx0_uart3_init(void);
void mv78xx0_xor_init(void);
void mv78xx0_crypto_init(void);
void mv78xx0_i2c_init(void);
void mv78xx0_restart(enum reboot_mode, const char *);
arch/arm/mach-mv78xx0/mv78xx0.h
+10
View File
@@ -49,9 +49,15 @@
#define MV78XX0_REGS_VIRT_BASE IOMEM(0xfec00000)
#define MV78XX0_REGS_SIZE SZ_1M
#define MV78XX0_SRAM_PHYS_BASE (0xf2200000)
#define MV78XX0_SRAM_SIZE SZ_8K
#define MV78XX0_PCIE_MEM_PHYS_BASE 0xc0000000
#define MV78XX0_PCIE_MEM_SIZE 0x30000000
#define MV78XX0_MBUS_SRAM_TARGET 0x09
#define MV78XX0_MBUS_SRAM_ATTR 0x00
/*
* Core-specific peripheral registers.
*/
@@ -98,6 +104,8 @@
#define USB1_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x51000)
#define USB2_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x52000)
#define XOR_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x60900)
#define GE00_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x70000)
#define GE01_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x74000)
@@ -106,6 +114,8 @@
#define PCIE12_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x88000)
#define PCIE13_VIRT_BASE (MV78XX0_REGS_VIRT_BASE + 0x8c000)
#define CRYPTO_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0x90000)
#define SATA_PHYS_BASE (MV78XX0_REGS_PHYS_BASE + 0xa0000)
/*
arch/arm/mach-mv78xx0/pcie.c
+1 -1
View File
@@ -42,7 +42,7 @@ void __init mv78xx0_pcie_id(u32 *dev, u32 *rev)
u32 pcie_port_size[8] = {
0,
0x30000000,
0x20000000,
0x10000000,
0x10000000,
0x08000000,
arch/arm/mach-mxs/mach-mxs.c
+1 -1
View File
@@ -174,7 +174,7 @@ static void __init update_fec_mac_prop(enum mac_oui oui)
from = np;
if (of_get_property(np, "local-mac-address", NULL))
if (of_property_present(np, "local-mac-address"))
continue;
newmac = kzalloc(sizeof(*newmac) + 6, GFP_KERNEL);
arch/arm/mach-omap1/Kconfig
+1 -1
View File
@@ -118,7 +118,7 @@ config MACH_OMAP_OSK
depends on ARCH_OMAP16XX
help
TI OMAP 5912 OSK (OMAP Starter Kit) board support. Say Y here
if you have such a board.
if you have such a board.
config MACH_OMAP_PALMTE
bool "Palm Tungsten E"
arch/arm/mach-omap1/board-ams-delta.c
+1 -5
View File
@@ -822,8 +822,6 @@ static int __init modem_nreset_init(void)
*/
static int __init ams_delta_modem_init(void)
{
int err;
if (!machine_is_ams_delta())
return -ENODEV;
@@ -832,9 +830,7 @@ static int __init ams_delta_modem_init(void)
/* Initialize the modem_nreset regulator consumer before use */
modem_priv.regulator = ERR_PTR(-ENODEV);
err = platform_device_register(&ams_delta_modem_device);
return err;
return platform_device_register(&ams_delta_modem_device);
}
arch_initcall_sync(ams_delta_modem_init);
arch/arm/mach-omap1/omap-dma.c
+2 -4
View File
@@ -833,7 +833,7 @@ exit_dma_irq_fail:
return ret;
}
static int omap_system_dma_remove(struct platform_device *pdev)
static void omap_system_dma_remove(struct platform_device *pdev)
{
int dma_irq, irq_rel = 0;
@@ -841,13 +841,11 @@ static int omap_system_dma_remove(struct platform_device *pdev)
dma_irq = platform_get_irq(pdev, irq_rel);
free_irq(dma_irq, (void *)(irq_rel + 1));
}
return 0;
}
static struct platform_driver omap_system_dma_driver = {
.probe = omap_system_dma_probe,
.remove = omap_system_dma_remove,
.remove_new = omap_system_dma_remove,
.driver = {
.name = "omap_dma_system"
},
arch/arm/mach-omap2/Kconfig
-11
View File
@@ -255,17 +255,6 @@ config MACH_NOKIA_N8X0
select MACH_NOKIA_N810
select MACH_NOKIA_N810_WIMAX
config OMAP3_SDRC_AC_TIMING
bool "Enable SDRC AC timing register changes"
depends on ARCH_OMAP3
help
If you know that none of your system initiators will attempt to
access SDRAM during CORE DVFS, select Y here. This should boost
SDRAM performance at lower CORE OPPs. There are relatively few
users who will wish to say yes at this point - almost everyone will
wish to say no. Selecting yes without understanding what is
going on could result in system crashes;
endmenu
endif
arch/arm/mach-omap2/cm33xx.c
+1 -1
View File
@@ -5,7 +5,7 @@
* Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/
* Vaibhav Hiremath <hvaibhav@ti.com>
*
* Reference taken from from OMAP4 cminst44xx.c
* Reference taken from OMAP4 cminst44xx.c
*/
#include <linux/kernel.h>
arch/arm/mach-omap2/omap_hwmod.c
+10 -13
View File
@@ -706,9 +706,7 @@ static const struct of_device_id ti_clkctrl_match_table[] __initconst = {
static int __init _setup_clkctrl_provider(struct device_node *np)
{
const __be32 *addrp;
struct clkctrl_provider *provider;
u64 size;
int i;
provider = memblock_alloc(sizeof(*provider), SMP_CACHE_BYTES);
@@ -717,8 +715,7 @@ static int __init _setup_clkctrl_provider(struct device_node *np)
provider->node = np;
provider->num_addrs =
of_property_count_elems_of_size(np, "reg", sizeof(u32)) / 2;
provider->num_addrs = of_address_count(np);
provider->addr =
memblock_alloc(sizeof(void *) * provider->num_addrs,
@@ -733,11 +730,11 @@ static int __init _setup_clkctrl_provider(struct device_node *np)
return -ENOMEM;
for (i = 0; i < provider->num_addrs; i++) {
addrp = of_get_address(np, i, &size, NULL);
provider->addr[i] = (u32)of_translate_address(np, addrp);
provider->size[i] = size;
pr_debug("%s: %pOF: %x...%x\n", __func__, np, provider->addr[i],
provider->addr[i] + provider->size[i]);
struct resource res;
of_address_to_resource(np, i, &res);
provider->addr[i] = res.start;
provider->size[i] = resource_size(&res);
pr_debug("%s: %pOF: %pR\n", __func__, np, &res);
}
list_add(&provider->link, &clkctrl_providers);
@@ -2322,11 +2319,11 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
static void __init parse_module_flags(struct omap_hwmod *oh,
struct device_node *np)
{
if (of_find_property(np, "ti,no-reset-on-init", NULL))
if (of_property_read_bool(np, "ti,no-reset-on-init"))
oh->flags |= HWMOD_INIT_NO_RESET;
if (of_find_property(np, "ti,no-idle-on-init", NULL))
if (of_property_read_bool(np, "ti,no-idle-on-init"))
oh->flags |= HWMOD_INIT_NO_IDLE;
if (of_find_property(np, "ti,no-idle", NULL))
if (of_property_read_bool(np, "ti,no-idle"))
oh->flags |= HWMOD_NO_IDLE;
}
@@ -3457,7 +3454,7 @@ static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
}
if (list_empty(&oh->slave_ports)) {
oi = kcalloc(1, sizeof(*oi), GFP_KERNEL);
oi = kzalloc(sizeof(*oi), GFP_KERNEL);
if (!oi)
goto out_free_class;
arch/arm/mach-omap2/pm33xx-core.c
+1 -5
View File
@@ -104,8 +104,6 @@ static int amx3_common_init(int (*idle)(u32 wfi_flags))
static int am33xx_suspend_init(int (*idle)(u32 wfi_flags))
{
int ret;
gfx_l4ls_clkdm = clkdm_lookup("gfx_l4ls_gfx_clkdm");
if (!gfx_l4ls_clkdm) {
@@ -113,9 +111,7 @@ static int am33xx_suspend_init(int (*idle)(u32 wfi_flags))
return -ENODEV;
}
ret = amx3_common_init(idle);
return ret;
return amx3_common_init(idle);
}
static int am43xx_suspend_init(int (*idle)(u32 wfi_flags))
arch/arm/mach-oxnas/Kconfig
-38
View File
@@ -1,38 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-only
menuconfig ARCH_OXNAS
bool "Oxford Semiconductor OXNAS Family SoCs"
depends on (ARCH_MULTI_V5 && CPU_LITTLE_ENDIAN) || ARCH_MULTI_V6
select ARCH_HAS_RESET_CONTROLLER
select COMMON_CLK_OXNAS
select GPIOLIB
select MFD_SYSCON
select OXNAS_RPS_TIMER
select PINCTRL_OXNAS
select RESET_CONTROLLER
select RESET_OXNAS
select VERSATILE_FPGA_IRQ
select PINCTRL
help
Support for OxNas SoC family developed by Oxford Semiconductor.
if ARCH_OXNAS
config MACH_OX810SE
bool "Support OX810SE Based Products"
depends on ARCH_MULTI_V5
select CPU_ARM926T
help
Include Support for the Oxford Semiconductor OX810SE SoC Based Products.
config MACH_OX820
bool "Support OX820 Based Products"
depends on ARCH_MULTI_V6
select ARM_GIC
select DMA_CACHE_RWFO if SMP
select HAVE_SMP
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP
help
Include Support for the Oxford Semiconductor OX820 SoC Based Products.
endif
arch/arm/mach-oxnas/Makefile
-2
View File
@@ -1,2 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-only
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
arch/arm/mach-oxnas/headsmp.S
-23
View File
@@ -1,23 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com>
* Copyright (c) 2003 ARM Limited
* All Rights Reserved
*/
#include <linux/linkage.h>
#include <linux/init.h>
__INIT
/*
* OX820 specific entry point for secondary CPUs.
*/
ENTRY(ox820_secondary_startup)
mov r4, #0
/* invalidate both caches and branch target cache */
mcr p15, 0, r4, c7, c7, 0
/*
* we've been released from the holding pen: secondary_stack
* should now contain the SVC stack for this core
*/
b secondary_startup
arch/arm/mach-oxnas/platsmp.c
-96
View File
@@ -1,96 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
* Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com>
* Copyright (C) 2002 ARM Ltd.
* All Rights Reserved
*/
#include <linux/io.h>
#include <linux/delay.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <asm/cacheflush.h>
#include <asm/cp15.h>
#include <asm/smp_plat.h>
#include <asm/smp_scu.h>
extern void ox820_secondary_startup(void);
static void __iomem *cpu_ctrl;
static void __iomem *gic_cpu_ctrl;
#define HOLDINGPEN_CPU_OFFSET 0xc8
#define HOLDINGPEN_LOCATION_OFFSET 0xc4
#define GIC_NCPU_OFFSET(cpu) (0x100 + (cpu)*0x100)
#define GIC_CPU_CTRL 0x00
#define GIC_CPU_CTRL_ENABLE 1
static int __init ox820_boot_secondary(unsigned int cpu,
struct task_struct *idle)
{
/*
* Write the address of secondary startup into the
* system-wide flags register. The BootMonitor waits
* until it receives a soft interrupt, and then the
* secondary CPU branches to this address.
*/
writel(virt_to_phys(ox820_secondary_startup),
cpu_ctrl + HOLDINGPEN_LOCATION_OFFSET);
writel(cpu, cpu_ctrl + HOLDINGPEN_CPU_OFFSET);
/*
* Enable GIC cpu interface in CPU Interface Control Register
*/
writel(GIC_CPU_CTRL_ENABLE,
gic_cpu_ctrl + GIC_NCPU_OFFSET(cpu) + GIC_CPU_CTRL);
/*
* Send the secondary CPU a soft interrupt, thereby causing
* the boot monitor to read the system wide flags register,
* and branch to the address found there.
*/
arch_send_wakeup_ipi_mask(cpumask_of(cpu));
return 0;
}
static void __init ox820_smp_prepare_cpus(unsigned int max_cpus)
{
struct device_node *np;
void __iomem *scu_base;
np = of_find_compatible_node(NULL, NULL, "arm,arm11mp-scu");
scu_base = of_iomap(np, 0);
of_node_put(np);
if (!scu_base)
return;
/* Remap CPU Interrupt Interface Registers */
np = of_find_compatible_node(NULL, NULL, "arm,arm11mp-gic");
gic_cpu_ctrl = of_iomap(np, 1);
of_node_put(np);
if (!gic_cpu_ctrl)
goto unmap_scu;
np = of_find_compatible_node(NULL, NULL, "oxsemi,ox820-sys-ctrl");
cpu_ctrl = of_iomap(np, 0);
of_node_put(np);
if (!cpu_ctrl)
goto unmap_scu;
scu_enable(scu_base);
flush_cache_all();
unmap_scu:
iounmap(scu_base);
}
static const struct smp_operations ox820_smp_ops __initconst = {
.smp_prepare_cpus = ox820_smp_prepare_cpus,
.smp_boot_secondary = ox820_boot_secondary,
};
CPU_METHOD_OF_DECLARE(ox820_smp, "oxsemi,ox820-smp", &ox820_smp_ops);
arch/arm/mach-pxa/irq.c
+1 -2
View File
@@ -257,8 +257,7 @@ void __init pxa_dt_irq_init(int (*fn)(struct irq_data *, unsigned int))
}
pxa_irq_base = io_p2v(res.start);
if (of_find_property(node, "marvell,intc-priority", NULL))
cpu_has_ipr = 1;
cpu_has_ipr = of_property_read_bool(node, "marvell,intc-priority");
ret = irq_alloc_descs(-1, 0, pxa_internal_irq_nr, 0);
if (ret < 0) {
arch/arm/mach-pxa/sharpsl_pm.c
+2 -4
View File
@@ -890,7 +890,7 @@ static int sharpsl_pm_probe(struct platform_device *pdev)
return 0;
}
static int sharpsl_pm_remove(struct platform_device *pdev)
static void sharpsl_pm_remove(struct platform_device *pdev)
{
suspend_set_ops(NULL);
@@ -917,13 +917,11 @@ static int sharpsl_pm_remove(struct platform_device *pdev)
del_timer_sync(&sharpsl_pm.chrg_full_timer);
del_timer_sync(&sharpsl_pm.ac_timer);
return 0;
}
static struct platform_driver sharpsl_pm_driver = {
.probe = sharpsl_pm_probe,
.remove = sharpsl_pm_remove,
.remove_new = sharpsl_pm_remove,
.suspend = sharpsl_pm_suspend,
.resume = sharpsl_pm_resume,
.driver = {
arch/arm/mach-sa1100/jornada720_ssp.c
+2 -3
View File
@@ -175,18 +175,17 @@ static int jornada_ssp_probe(struct platform_device *dev)
return 0;
};
static int jornada_ssp_remove(struct platform_device *dev)
static void jornada_ssp_remove(struct platform_device *dev)
{
/* Note that this doesn't actually remove the driver, since theres nothing to remove
* It just makes sure everything is turned off */
GPSR = GPIO_GPIO25;
ssp_exit();
return 0;
};
struct platform_driver jornadassp_driver = {
.probe = jornada_ssp_probe,
.remove = jornada_ssp_remove,
.remove_new = jornada_ssp_remove,
.driver = {
.name = "jornada_ssp",
},
arch/arm/mach-sa1100/neponset.c
+2 -4
View File
@@ -376,7 +376,7 @@ static int neponset_probe(struct platform_device *dev)
return ret;
}
static int neponset_remove(struct platform_device *dev)
static void neponset_remove(struct platform_device *dev)
{
struct neponset_drvdata *d = platform_get_drvdata(dev);
int irq = platform_get_irq(dev, 0);
@@ -395,8 +395,6 @@ static int neponset_remove(struct platform_device *dev)
nep = NULL;
iounmap(d->base);
kfree(d);
return 0;
}
#ifdef CONFIG_PM_SLEEP
@@ -425,7 +423,7 @@ static const struct dev_pm_ops neponset_pm_ops = {
static struct platform_driver neponset_device_driver = {
.probe = neponset_probe,
.remove = neponset_remove,
.remove_new = neponset_remove,
.driver = {
.name = "neponset",
.pm = PM_OPS,
arch/arm/mach-shmobile/platsmp-apmu.c
+16 -20
View File
@@ -10,6 +10,7 @@
#include <linux/init.h>
#include <linux/io.h>
#include <linux/ioport.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/smp.h>
#include <linux/suspend.h>
@@ -210,7 +211,6 @@ static void apmu_parse_dt(void (*fn)(struct resource *res, int cpu, int bit))
struct device_node *np_apmu, *np_cpu;
struct resource res;
int bit, index;
u32 id;
for_each_matching_node(np_apmu, apmu_ids) {
/* only enable the cluster that includes the boot CPU */
@@ -218,33 +218,29 @@ static void apmu_parse_dt(void (*fn)(struct resource *res, int cpu, int bit))
for (bit = 0; bit < CONFIG_NR_CPUS; bit++) {
np_cpu = of_parse_phandle(np_apmu, "cpus", bit);
if (np_cpu) {
if (!of_property_read_u32(np_cpu, "reg", &id)) {
if (id == cpu_logical_map(0)) {
is_allowed = true;
of_node_put(np_cpu);
break;
}
}
if (!np_cpu)
break;
if (of_cpu_node_to_id(np_cpu) == 0) {
is_allowed = true;
of_node_put(np_cpu);
break;
}
of_node_put(np_cpu);
}
if (!is_allowed)
continue;
for (bit = 0; bit < CONFIG_NR_CPUS; bit++) {
np_cpu = of_parse_phandle(np_apmu, "cpus", bit);
if (np_cpu) {
if (!of_property_read_u32(np_cpu, "reg", &id)) {
index = get_logical_index(id);
if ((index >= 0) &&
!of_address_to_resource(np_apmu,
0, &res))
fn(&res, index, bit);
}
of_node_put(np_cpu);
}
if (!np_cpu)
break;
index = of_cpu_node_to_id(np_cpu);
if ((index >= 0) &&
!of_address_to_resource(np_apmu, 0, &res))
fn(&res, index, bit);
of_node_put(np_cpu);
}
}
}
arch/arm/mach-spear/Kconfig
-6
View File
@@ -81,12 +81,6 @@ config ARCH_SPEAR6XX
help
Supports for ARM's SPEAR6XX family
config MACH_SPEAR600
def_bool y
depends on ARCH_SPEAR6XX
help
Supports ST SPEAr600 boards configured via the device-tree
config ARCH_SPEAR_AUTO
bool
depends on !ARCH_SPEAR13XX && !ARCH_SPEAR6XX
drivers/firmware/turris-mox-rwtm.c
+1 -1
View File
@@ -104,7 +104,7 @@ static void mox_kobj_release(struct kobject *kobj)
kfree(to_rwtm(kobj)->kobj);
}
static struct kobj_type mox_kobj_ktype = {
static const struct kobj_type mox_kobj_ktype = {
.release = mox_kobj_release,
.sysfs_ops = &kobj_sysfs_ops,
};
drivers/soc/fsl/qbman/dpaa_sys.c
+4 -4
View File
@@ -39,8 +39,7 @@ int qbman_init_private_mem(struct device *dev, int idx, dma_addr_t *addr,
{
struct device_node *mem_node;
struct reserved_mem *rmem;
struct property *prop;
int len, err;
int err;
__be32 *res_array;
mem_node = of_parse_phandle(dev->of_node, "memory-region", idx);
@@ -63,8 +62,9 @@ int qbman_init_private_mem(struct device *dev, int idx, dma_addr_t *addr,
* This is needed because QBMan HW does not allow the base address/
* size to be modified once set.
*/
prop = of_find_property(mem_node, "reg", &len);
if (!prop) {
if (!of_property_present(mem_node, "reg")) {
struct property *prop;
prop = devm_kzalloc(dev, sizeof(*prop), GFP_KERNEL);
if (!prop)
return -ENOMEM;