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arm64: dts: qcom: x1e80100: Resize GIC Redistributor register region

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BugLink: https://bugs.launchpad.net/bugs/2101915

[ Upstream commit 9ed1a2b8784262e85ec300792a1a37ebd8473be2 ]

Resize the GICR register region as it currently seeps into the CPU Control
Processor mailbox RX region.

Fixes: af16b00578 ("arm64: dts: qcom: Add base X1E80100 dtsi and the QCP dts")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Link: https://lore.kernel.org/r/20240612124056.39230-4-quic_sibis@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Signed-off-by: Koichiro Den <koichiro.den@canonical.com>
Signed-off-by: Stefan Bader <stefan.bader@canonical.com>
This commit is contained in:
Sibi Sankar
2025-03-11 08:51:19 +09:00
committed by Stefan Bader
parent 52649b46da
commit 9a41e64762
1 changed files with 1 additions and 1 deletions
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arch/arm64/boot/dts/qcom/x1e80100.dtsi
+1 -1
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@@ -3284,7 +3284,7 @@
intc: interrupt-controller@17000000 {
compatible = "arm,gic-v3";
reg = <0 0x17000000 0 0x10000>, /* GICD */
<0 0x17080000 0 0x480000>; /* GICR * 12 */
<0 0x17080000 0 0x300000>; /* GICR * 12 */
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;