NVIDIA: SAUCE: dt-bindings: dma: Add reg-names to nvidia,tegra210-adma

BugLink: https://bugs.launchpad.net/bugs/2080908

For Non-Hypervisor mode, Tegra ADMA driver requires the register
resource range to include both global and channel page in the reg
entry. For Hypervisor more, Tegra ADMA driver requires only the
channel page and global page range is not allowed for access.

Add reg-names DT binding for Hypervisor mode to help driver to
differentiate the config between Hypervisor and Non-Hypervisor
mode of execution.

http://nvbugs/4406418

Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Noah Wager <noah.wager@canonical.com>
Acked-by: Jacob Martin <jacob.martin@canonical.com>
Signed-off-by: Noah Wager <noah.wager@canonical.com>

Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml

@@ -29,8 +29,18 @@ properties:
           - const: nvidia,tegra186-adma
 
   reg:
+   description: |
+    For hypervisor mode, the address range should include a
+    ADMA channel page address range, for non-hypervisor mode
+    it starts with ADMA base address covering Global and Channel
+    page address range.
     maxItems: 1
 
+  reg-names:
+   description: only required for Hypervisor mode.
+    items:
+      - const: vm
+
   interrupts:
     description: |
       Should contain all of the per-channel DMA interrupts in