From 631d69d74eac6a72fb8ce1234e72212847a4c645 Mon Sep 17 00:00:00 2001 From: Mohan Kumar Date: Sun, 17 Mar 2024 20:14:34 +0530 Subject: [PATCH] NVIDIA: SAUCE: dt-bindings: dma: Add reg-names to nvidia,tegra210-adma BugLink: https://bugs.launchpad.net/bugs/2080908 For Non-Hypervisor mode, Tegra ADMA driver requires the register resource range to include both global and channel page in the reg entry. For Hypervisor more, Tegra ADMA driver requires only the channel page and global page range is not allowed for access. Add reg-names DT binding for Hypervisor mode to help driver to differentiate the config between Hypervisor and Non-Hypervisor mode of execution. http://nvbugs/4406418 Signed-off-by: Mohan Kumar Signed-off-by: Laxman Dewangan Acked-by: Noah Wager Acked-by: Jacob Martin Signed-off-by: Noah Wager --- .../devicetree/bindings/dma/nvidia,tegra210-adma.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml index 877147e95ecc..9fd86397adce 100644 --- a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml @@ -29,8 +29,18 @@ properties: - const: nvidia,tegra186-adma reg: + description: | + For hypervisor mode, the address range should include a + ADMA channel page address range, for non-hypervisor mode + it starts with ADMA base address covering Global and Channel + page address range. maxItems: 1 + reg-names: + description: only required for Hypervisor mode. + items: + - const: vm + interrupts: description: | Should contain all of the per-channel DMA interrupts in