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NVIDIA: SAUCE: arm64: config: Enable CONFIG_ARM64_SW_TTBR0_PAN

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BugLink: https://bugs.launchpad.net/bugs/2072591

This enable prevents the kernel from accessing user-space
memory directly by pointing TTBR0_EL1 to a reserved
zeroed area and reserved ASID.

http://nvbugs/3870276

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Signed-off-by: Satish Seelamsetti <sseelamsetti@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Jacob Martin <jacob.martin@canonical.com>
Acked-by: Noah Wager <noah.wager@canonical.com>
Signed-off-by: Noah Wager <noah.wager@canonical.com>
This commit is contained in:
Prathamesh Shete
2024-03-26 09:59:50 +00:00
committed by Noah Wager
parent dca3479d06
commit 595530f4ad
1 changed files with 1 additions and 0 deletions
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arch/arm64/configs/defconfig
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@@ -82,6 +82,7 @@ CONFIG_SCHED_MC=y
CONFIG_SCHED_SMT=y
CONFIG_NUMA=y
CONFIG_XEN=y
CONFIG_ARM64_SW_TTBR0_PAN=y
CONFIG_COMPAT=y
CONFIG_ARM64_PMEM=y
CONFIG_RANDOMIZE_BASE=y