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iio: imu: inv_icm42600: add register caching in the regmap

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BugLink: https://bugs.launchpad.net/bugs/2106770

Register caching is improving bus access a lot because of the register
window bank setting. Previously, bank register was set for every
register access. Now with caching, it happens only when changing bank
which is very infrequent.

Signed-off-by: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com>
Link: https://lore.kernel.org/r/20240607081039.789079-1-inv.git-commit@tdk.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
(cherry picked from commit 50cfe81b71e50d7a7f6afb84d5dbe084ed4ea174)
[diewald: prerequisite for c0f866de4ce4 iio: imu: inv_icm42600: fix spi
burst write not supported]
Signed-off-by: Manuel Diewald <manuel.diewald@canonical.com>
Signed-off-by: Mehmet Basaran <mehmet.basaran@canonical.com>
This commit is contained in:
Jean-Baptiste Maneyrol
2024-06-07 08:10:39 +00:00
committed by Mehmet Basaran
parent e7b641910c
commit 06f799fa03
1 changed files with 44 additions and 0 deletions
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drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
+44
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@@ -35,12 +35,56 @@ static const struct regmap_range_cfg inv_icm42600_regmap_ranges[] = {
},
};
static const struct regmap_range inv_icm42600_regmap_volatile_yes_ranges[] = {
/* Sensor data registers */
regmap_reg_range(0x001D, 0x002A),
/* INT status, FIFO, APEX data */
regmap_reg_range(0x002D, 0x0038),
/* Signal path reset */
regmap_reg_range(0x004B, 0x004B),
/* FIFO lost packets */
regmap_reg_range(0x006C, 0x006D),
/* Timestamp value */
regmap_reg_range(0x1062, 0x1064),
};
static const struct regmap_range inv_icm42600_regmap_volatile_no_ranges[] = {
regmap_reg_range(0x0000, 0x001C),
regmap_reg_range(0x006E, 0x1061),
regmap_reg_range(0x1065, 0x4FFF),
};
static const struct regmap_access_table inv_icm42600_regmap_volatile_accesses[] = {
{
.yes_ranges = inv_icm42600_regmap_volatile_yes_ranges,
.n_yes_ranges = ARRAY_SIZE(inv_icm42600_regmap_volatile_yes_ranges),
.no_ranges = inv_icm42600_regmap_volatile_no_ranges,
.n_no_ranges = ARRAY_SIZE(inv_icm42600_regmap_volatile_no_ranges),
},
};
static const struct regmap_range inv_icm42600_regmap_rd_noinc_no_ranges[] = {
regmap_reg_range(0x0000, INV_ICM42600_REG_FIFO_DATA - 1),
regmap_reg_range(INV_ICM42600_REG_FIFO_DATA + 1, 0x4FFF),
};
static const struct regmap_access_table inv_icm42600_regmap_rd_noinc_accesses[] = {
{
.no_ranges = inv_icm42600_regmap_rd_noinc_no_ranges,
.n_no_ranges = ARRAY_SIZE(inv_icm42600_regmap_rd_noinc_no_ranges),
},
};
const struct regmap_config inv_icm42600_regmap_config = {
.name = "inv_icm42600",
.reg_bits = 8,
.val_bits = 8,
.max_register = 0x4FFF,
.ranges = inv_icm42600_regmap_ranges,
.num_ranges = ARRAY_SIZE(inv_icm42600_regmap_ranges),
.volatile_table = inv_icm42600_regmap_volatile_accesses,
.rd_noinc_table = inv_icm42600_regmap_rd_noinc_accesses,
.cache_type = REGCACHE_RBTREE,
};
EXPORT_SYMBOL_NS_GPL(inv_icm42600_regmap_config, IIO_ICM42600);