NVIDIA: SAUCE: soc: tegra: cbb: update register offsets for NET10

CBB register offsets have changed in header files for NET10.
Update those as per the CL 71970723 used for NET10.

http://nvbugs/4136792

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Noah Wager <noah.wager@canonical.com>
Acked-by: Jacob Martin <jacob.martin@canonical.com>
Signed-off-by: Noah Wager <noah.wager@canonical.com>

drivers/soc/tegra/cbb/tegra234-cbb.c

@@ -1150,8 +1150,8 @@ static const struct tegra234_cbb_fabric tegra264_top0_cbb_fabric = {
 	.notifier_offset = 0x90000,
 	.off_mask_erd    = 0x4a004,
 	.firewall_base   = 0x3c0000,
-	.firewall_ctl    = 0x610,
-	.firewall_wr_ctl = 0x608,
+	.firewall_ctl    = 0x5b0,
+	.firewall_wr_ctl = 0x5a8,
 };
 
 /* To be filled later when address map is more stabilized */
@@ -1210,8 +1210,8 @@ static const struct tegra234_cbb_fabric tegra264_vision_cbb_fabric = {
 	.err_status_clr = 0x1ff007f,
 	.notifier_offset = 0x80000,
 	.firewall_base   = 0x290000,
-	.firewall_ctl    = 0x630,
-	.firewall_wr_ctl = 0x628,
+	.firewall_ctl    = 0x5d0,
+	.firewall_wr_ctl = 0x5c8,
 };
 
 static const struct of_device_id tegra234_cbb_dt_ids[] = {