Merge tag 'clk-microchip-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into clk-microchip
Pull Microchip clk driver updates from Claudiu Beznea: It contains support for parent_data, parent_hw in AT91 clock drivers used by SAMA7G5 SoC (e.g. main, master, generic, peripheral, programmable, system, utmi, slow clocks) and also the update of SAMA7G5 to use this new support. * tag 'clk-microchip-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: clk: at91: sama7g5: s/ep_chg_chg_id/ep_chg_id clk: at91: sama7g5: switch to parent_hw and parent_data clk: at91: sckc: switch to parent_data/parent_hw clk: at91: clk-sam9x60-pll: add support for parent_hw clk: at91: clk-utmi: add support for parent_hw clk: at91: clk-system: add support for parent_hw clk: at91: clk-programmable: add support for parent_hw clk: at91: clk-peripheral: add support for parent_hw clk: at91: clk-master: add support for parent_hw clk: at91: clk-generated: add support for parent_hw clk: at91: clk-main: add support for parent_data/parent_hw
This commit is contained in:
@@ -108,12 +108,12 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
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bypass = of_property_read_bool(np, "atmel,osc-bypass");
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hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name,
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hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
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bypass);
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if (IS_ERR(hw))
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goto err_free;
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hw = at91_clk_register_rm9200_main(regmap, "mainck", "main_osc");
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hw = at91_clk_register_rm9200_main(regmap, "mainck", "main_osc", NULL);
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if (IS_ERR(hw))
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goto err_free;
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@@ -140,7 +140,7 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
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parent_names[2] = "pllack";
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parent_names[3] = "pllbck";
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hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
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parent_names,
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parent_names, NULL,
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&at91rm9200_master_layout,
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&rm9200_mck_characteristics,
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&rm9200_mck_lock);
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@@ -148,7 +148,7 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
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goto err_free;
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hw = at91_clk_register_master_div(regmap, "masterck_div",
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"masterck_pres",
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"masterck_pres", NULL,
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&at91rm9200_master_layout,
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&rm9200_mck_characteristics,
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&rm9200_mck_lock, CLK_SET_RATE_GATE, 0);
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@@ -171,7 +171,7 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
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snprintf(name, sizeof(name), "prog%d", i);
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hw = at91_clk_register_programmable(regmap, name,
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parent_names, 4, i,
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parent_names, NULL, 4, i,
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&at91rm9200_programmable_layout,
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NULL);
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if (IS_ERR(hw))
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@@ -182,7 +182,7 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
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for (i = 0; i < ARRAY_SIZE(at91rm9200_systemck); i++) {
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hw = at91_clk_register_system(regmap, at91rm9200_systemck[i].n,
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at91rm9200_systemck[i].p,
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at91rm9200_systemck[i].p, NULL,
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at91rm9200_systemck[i].id, 0);
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if (IS_ERR(hw))
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goto err_free;
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@@ -193,7 +193,7 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
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for (i = 0; i < ARRAY_SIZE(at91rm9200_periphck); i++) {
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hw = at91_clk_register_peripheral(regmap,
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at91rm9200_periphck[i].n,
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"masterck_div",
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"masterck_div", NULL,
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at91rm9200_periphck[i].id);
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if (IS_ERR(hw))
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goto err_free;
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@@ -363,12 +363,12 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
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bypass = of_property_read_bool(np, "atmel,osc-bypass");
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hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name,
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hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
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bypass);
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if (IS_ERR(hw))
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goto err_free;
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hw = at91_clk_register_rm9200_main(regmap, "mainck", "main_osc");
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hw = at91_clk_register_rm9200_main(regmap, "mainck", "main_osc", NULL);
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if (IS_ERR(hw))
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goto err_free;
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@@ -416,7 +416,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
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parent_names[2] = "pllack";
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parent_names[3] = "pllbck";
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hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
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parent_names,
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parent_names, NULL,
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&at91rm9200_master_layout,
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data->mck_characteristics,
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&at91sam9260_mck_lock);
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@@ -424,7 +424,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
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goto err_free;
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hw = at91_clk_register_master_div(regmap, "masterck_div",
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"masterck_pres",
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"masterck_pres", NULL,
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&at91rm9200_master_layout,
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data->mck_characteristics,
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&at91sam9260_mck_lock,
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@@ -448,7 +448,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
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snprintf(name, sizeof(name), "prog%d", i);
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hw = at91_clk_register_programmable(regmap, name,
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parent_names, 4, i,
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parent_names, NULL, 4, i,
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&at91rm9200_programmable_layout,
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NULL);
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if (IS_ERR(hw))
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@@ -459,7 +459,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
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for (i = 0; i < data->num_sck; i++) {
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hw = at91_clk_register_system(regmap, data->sck[i].n,
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data->sck[i].p,
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data->sck[i].p, NULL,
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data->sck[i].id, 0);
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if (IS_ERR(hw))
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goto err_free;
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@@ -470,7 +470,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
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for (i = 0; i < data->num_pck; i++) {
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hw = at91_clk_register_peripheral(regmap,
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data->pck[i].n,
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"masterck_div",
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"masterck_div", NULL,
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data->pck[i].id);
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if (IS_ERR(hw))
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goto err_free;
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@@ -123,12 +123,12 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np)
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bypass = of_property_read_bool(np, "atmel,osc-bypass");
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hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name,
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hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
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bypass);
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if (IS_ERR(hw))
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goto err_free;
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hw = at91_clk_register_rm9200_main(regmap, "mainck", "main_osc");
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hw = at91_clk_register_rm9200_main(regmap, "mainck", "main_osc", NULL);
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if (IS_ERR(hw))
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goto err_free;
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@@ -145,7 +145,7 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np)
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at91sam9g45_pmc->chws[PMC_PLLACK] = hw;
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hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck");
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hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL);
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if (IS_ERR(hw))
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goto err_free;
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@@ -156,7 +156,7 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np)
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parent_names[2] = "plladivck";
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parent_names[3] = "utmick";
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hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
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parent_names,
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parent_names, NULL,
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&at91rm9200_master_layout,
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&mck_characteristics,
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&at91sam9g45_mck_lock);
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@@ -164,7 +164,7 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np)
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goto err_free;
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hw = at91_clk_register_master_div(regmap, "masterck_div",
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"masterck_pres",
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"masterck_pres", NULL,
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&at91rm9200_master_layout,
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&mck_characteristics,
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&at91sam9g45_mck_lock,
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@@ -191,7 +191,7 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np)
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snprintf(name, sizeof(name), "prog%d", i);
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hw = at91_clk_register_programmable(regmap, name,
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parent_names, 5, i,
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parent_names, NULL, 5, i,
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&at91sam9g45_programmable_layout,
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NULL);
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if (IS_ERR(hw))
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@@ -202,7 +202,7 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np)
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for (i = 0; i < ARRAY_SIZE(at91sam9g45_systemck); i++) {
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hw = at91_clk_register_system(regmap, at91sam9g45_systemck[i].n,
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at91sam9g45_systemck[i].p,
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at91sam9g45_systemck[i].p, NULL,
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at91sam9g45_systemck[i].id,
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at91sam9g45_systemck[i].flags);
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if (IS_ERR(hw))
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@@ -214,7 +214,7 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np)
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for (i = 0; i < ARRAY_SIZE(at91sam9g45_periphck); i++) {
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hw = at91_clk_register_peripheral(regmap,
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at91sam9g45_periphck[i].n,
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"masterck_div",
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"masterck_div", NULL,
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at91sam9g45_periphck[i].id);
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if (IS_ERR(hw))
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goto err_free;
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@@ -147,14 +147,14 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np)
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bypass = of_property_read_bool(np, "atmel,osc-bypass");
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hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name,
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hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
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bypass);
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if (IS_ERR(hw))
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goto err_free;
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parent_names[0] = "main_rc_osc";
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parent_names[1] = "main_osc";
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hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, 2);
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hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2);
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if (IS_ERR(hw))
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goto err_free;
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@@ -183,7 +183,7 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np)
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parent_names[2] = "plladivck";
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parent_names[3] = "pllbck";
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hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
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parent_names,
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parent_names, NULL,
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&at91sam9x5_master_layout,
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&mck_characteristics,
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&at91sam9n12_mck_lock);
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@@ -191,7 +191,7 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np)
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goto err_free;
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hw = at91_clk_register_master_div(regmap, "masterck_div",
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"masterck_pres",
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"masterck_pres", NULL,
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&at91sam9x5_master_layout,
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&mck_characteristics,
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&at91sam9n12_mck_lock,
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@@ -216,7 +216,7 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np)
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snprintf(name, sizeof(name), "prog%d", i);
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hw = at91_clk_register_programmable(regmap, name,
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parent_names, 5, i,
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parent_names, NULL, 5, i,
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&at91sam9x5_programmable_layout,
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NULL);
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if (IS_ERR(hw))
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@@ -227,7 +227,7 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np)
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for (i = 0; i < ARRAY_SIZE(at91sam9n12_systemck); i++) {
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hw = at91_clk_register_system(regmap, at91sam9n12_systemck[i].n,
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at91sam9n12_systemck[i].p,
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at91sam9n12_systemck[i].p, NULL,
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at91sam9n12_systemck[i].id,
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at91sam9n12_systemck[i].flags);
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if (IS_ERR(hw))
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@@ -240,7 +240,7 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np)
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hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
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&at91sam9n12_pcr_layout,
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at91sam9n12_periphck[i].n,
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"masterck_div",
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"masterck_div", NULL,
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at91sam9n12_periphck[i].id,
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&range, INT_MIN, 0);
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if (IS_ERR(hw))
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@@ -95,7 +95,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
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if (!at91sam9rl_pmc)
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return;
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hw = at91_clk_register_rm9200_main(regmap, "mainck", mainxtal_name);
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hw = at91_clk_register_rm9200_main(regmap, "mainck", mainxtal_name, NULL);
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if (IS_ERR(hw))
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goto err_free;
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@@ -109,7 +109,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
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at91sam9rl_pmc->chws[PMC_PLLACK] = hw;
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hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck");
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hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL);
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if (IS_ERR(hw))
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goto err_free;
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@@ -120,7 +120,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
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parent_names[2] = "pllack";
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parent_names[3] = "utmick";
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hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
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parent_names,
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parent_names, NULL,
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&at91rm9200_master_layout,
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&sam9rl_mck_characteristics,
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&sam9rl_mck_lock);
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@@ -128,7 +128,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
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goto err_free;
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hw = at91_clk_register_master_div(regmap, "masterck_div",
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"masterck_pres",
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"masterck_pres", NULL,
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&at91rm9200_master_layout,
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&sam9rl_mck_characteristics,
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&sam9rl_mck_lock, CLK_SET_RATE_GATE, 0);
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@@ -148,7 +148,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
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snprintf(name, sizeof(name), "prog%d", i);
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hw = at91_clk_register_programmable(regmap, name,
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parent_names, 5, i,
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parent_names, NULL, 5, i,
|
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&at91rm9200_programmable_layout,
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NULL);
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if (IS_ERR(hw))
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@@ -159,7 +159,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
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for (i = 0; i < ARRAY_SIZE(at91sam9rl_systemck); i++) {
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hw = at91_clk_register_system(regmap, at91sam9rl_systemck[i].n,
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at91sam9rl_systemck[i].p,
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at91sam9rl_systemck[i].p, NULL,
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at91sam9rl_systemck[i].id, 0);
|
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if (IS_ERR(hw))
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goto err_free;
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@@ -170,7 +170,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
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for (i = 0; i < ARRAY_SIZE(at91sam9rl_periphck); i++) {
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hw = at91_clk_register_peripheral(regmap,
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at91sam9rl_periphck[i].n,
|
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"masterck_div",
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"masterck_div", NULL,
|
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at91sam9rl_periphck[i].id);
|
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if (IS_ERR(hw))
|
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goto err_free;
|
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|
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@@ -169,14 +169,14 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
|
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|
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bypass = of_property_read_bool(np, "atmel,osc-bypass");
|
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|
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hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name,
|
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hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
|
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bypass);
|
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if (IS_ERR(hw))
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goto err_free;
|
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|
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parent_names[0] = "main_rc_osc";
|
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parent_names[1] = "main_osc";
|
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hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, 2);
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hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2);
|
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if (IS_ERR(hw))
|
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goto err_free;
|
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|
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@@ -193,7 +193,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
|
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|
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at91sam9x5_pmc->chws[PMC_PLLACK] = hw;
|
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|
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hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck");
|
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hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL);
|
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if (IS_ERR(hw))
|
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goto err_free;
|
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|
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@@ -204,14 +204,14 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
|
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parent_names[2] = "plladivck";
|
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parent_names[3] = "utmick";
|
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hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
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parent_names,
|
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parent_names, NULL,
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&at91sam9x5_master_layout,
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&mck_characteristics, &mck_lock);
|
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if (IS_ERR(hw))
|
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goto err_free;
|
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|
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hw = at91_clk_register_master_div(regmap, "masterck_div",
|
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"masterck_pres",
|
||||
"masterck_pres", NULL,
|
||||
&at91sam9x5_master_layout,
|
||||
&mck_characteristics, &mck_lock,
|
||||
CLK_SET_RATE_GATE, 0);
|
||||
@@ -241,7 +241,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
|
||||
snprintf(name, sizeof(name), "prog%d", i);
|
||||
|
||||
hw = at91_clk_register_programmable(regmap, name,
|
||||
parent_names, 5, i,
|
||||
parent_names, NULL, 5, i,
|
||||
&at91sam9x5_programmable_layout,
|
||||
NULL);
|
||||
if (IS_ERR(hw))
|
||||
@@ -252,7 +252,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(at91sam9x5_systemck); i++) {
|
||||
hw = at91_clk_register_system(regmap, at91sam9x5_systemck[i].n,
|
||||
at91sam9x5_systemck[i].p,
|
||||
at91sam9x5_systemck[i].p, NULL,
|
||||
at91sam9x5_systemck[i].id,
|
||||
at91sam9x5_systemck[i].flags);
|
||||
if (IS_ERR(hw))
|
||||
@@ -263,7 +263,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
|
||||
|
||||
if (has_lcdck) {
|
||||
hw = at91_clk_register_system(regmap, "lcdck", "masterck_div",
|
||||
3, 0);
|
||||
NULL, 3, 0);
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
|
||||
@@ -274,7 +274,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
|
||||
hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
|
||||
&at91sam9x5_pcr_layout,
|
||||
at91sam9x5_periphck[i].n,
|
||||
"masterck_div",
|
||||
"masterck_div", NULL,
|
||||
at91sam9x5_periphck[i].id,
|
||||
&range, INT_MIN, 0);
|
||||
if (IS_ERR(hw))
|
||||
@@ -287,7 +287,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
|
||||
hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
|
||||
&at91sam9x5_pcr_layout,
|
||||
extra_pcks[i].n,
|
||||
"masterck_div",
|
||||
"masterck_div", NULL,
|
||||
extra_pcks[i].id,
|
||||
&range, INT_MIN, 0);
|
||||
if (IS_ERR(hw))
|
||||
|
||||
@@ -319,22 +319,29 @@ struct clk_hw * __init
|
||||
at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock,
|
||||
const struct clk_pcr_layout *layout,
|
||||
const char *name, const char **parent_names,
|
||||
struct clk_hw **parent_hws,
|
||||
u32 *mux_table, u8 num_parents, u8 id,
|
||||
const struct clk_range *range,
|
||||
int chg_pid)
|
||||
{
|
||||
struct clk_generated *gck;
|
||||
struct clk_init_data init;
|
||||
struct clk_init_data init = {};
|
||||
struct clk_hw *hw;
|
||||
int ret;
|
||||
|
||||
if (!(parent_names || parent_hws))
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
gck = kzalloc(sizeof(*gck), GFP_KERNEL);
|
||||
if (!gck)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
init.name = name;
|
||||
init.ops = &generated_ops;
|
||||
init.parent_names = parent_names;
|
||||
if (parent_hws)
|
||||
init.parent_hws = (const struct clk_hw **)parent_hws;
|
||||
else
|
||||
init.parent_names = parent_names;
|
||||
init.num_parents = num_parents;
|
||||
init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
|
||||
if (chg_pid >= 0)
|
||||
|
||||
+22
-10
@@ -152,14 +152,15 @@ struct clk_hw * __init
|
||||
at91_clk_register_main_osc(struct regmap *regmap,
|
||||
const char *name,
|
||||
const char *parent_name,
|
||||
struct clk_parent_data *parent_data,
|
||||
bool bypass)
|
||||
{
|
||||
struct clk_main_osc *osc;
|
||||
struct clk_init_data init;
|
||||
struct clk_init_data init = {};
|
||||
struct clk_hw *hw;
|
||||
int ret;
|
||||
|
||||
if (!name || !parent_name)
|
||||
if (!name || !(parent_name || parent_data))
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
osc = kzalloc(sizeof(*osc), GFP_KERNEL);
|
||||
@@ -168,7 +169,10 @@ at91_clk_register_main_osc(struct regmap *regmap,
|
||||
|
||||
init.name = name;
|
||||
init.ops = &main_osc_ops;
|
||||
init.parent_names = &parent_name;
|
||||
if (parent_data)
|
||||
init.parent_data = (const struct clk_parent_data *)parent_data;
|
||||
else
|
||||
init.parent_names = &parent_name;
|
||||
init.num_parents = 1;
|
||||
init.flags = CLK_IGNORE_UNUSED;
|
||||
|
||||
@@ -397,17 +401,18 @@ static const struct clk_ops rm9200_main_ops = {
|
||||
struct clk_hw * __init
|
||||
at91_clk_register_rm9200_main(struct regmap *regmap,
|
||||
const char *name,
|
||||
const char *parent_name)
|
||||
const char *parent_name,
|
||||
struct clk_hw *parent_hw)
|
||||
{
|
||||
struct clk_rm9200_main *clkmain;
|
||||
struct clk_init_data init;
|
||||
struct clk_init_data init = {};
|
||||
struct clk_hw *hw;
|
||||
int ret;
|
||||
|
||||
if (!name)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
if (!parent_name)
|
||||
if (!(parent_name || parent_hw))
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
clkmain = kzalloc(sizeof(*clkmain), GFP_KERNEL);
|
||||
@@ -416,7 +421,10 @@ at91_clk_register_rm9200_main(struct regmap *regmap,
|
||||
|
||||
init.name = name;
|
||||
init.ops = &rm9200_main_ops;
|
||||
init.parent_names = &parent_name;
|
||||
if (parent_hw)
|
||||
init.parent_hws = (const struct clk_hw **)&parent_hw;
|
||||
else
|
||||
init.parent_names = &parent_name;
|
||||
init.num_parents = 1;
|
||||
init.flags = 0;
|
||||
|
||||
@@ -543,10 +551,11 @@ struct clk_hw * __init
|
||||
at91_clk_register_sam9x5_main(struct regmap *regmap,
|
||||
const char *name,
|
||||
const char **parent_names,
|
||||
struct clk_hw **parent_hws,
|
||||
int num_parents)
|
||||
{
|
||||
struct clk_sam9x5_main *clkmain;
|
||||
struct clk_init_data init;
|
||||
struct clk_init_data init = {};
|
||||
unsigned int status;
|
||||
struct clk_hw *hw;
|
||||
int ret;
|
||||
@@ -554,7 +563,7 @@ at91_clk_register_sam9x5_main(struct regmap *regmap,
|
||||
if (!name)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
if (!parent_names || !num_parents)
|
||||
if (!(parent_hws || parent_names) || !num_parents)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
clkmain = kzalloc(sizeof(*clkmain), GFP_KERNEL);
|
||||
@@ -563,7 +572,10 @@ at91_clk_register_sam9x5_main(struct regmap *regmap,
|
||||
|
||||
init.name = name;
|
||||
init.ops = &sam9x5_main_ops;
|
||||
init.parent_names = parent_names;
|
||||
if (parent_hws)
|
||||
init.parent_hws = (const struct clk_hw **)parent_hws;
|
||||
else
|
||||
init.parent_names = parent_names;
|
||||
init.num_parents = num_parents;
|
||||
init.flags = CLK_SET_PARENT_GATE;
|
||||
|
||||
|
||||
@@ -473,18 +473,19 @@ static struct clk_hw * __init
|
||||
at91_clk_register_master_internal(struct regmap *regmap,
|
||||
const char *name, int num_parents,
|
||||
const char **parent_names,
|
||||
struct clk_hw **parent_hws,
|
||||
const struct clk_master_layout *layout,
|
||||
const struct clk_master_characteristics *characteristics,
|
||||
const struct clk_ops *ops, spinlock_t *lock, u32 flags)
|
||||
{
|
||||
struct clk_master *master;
|
||||
struct clk_init_data init;
|
||||
struct clk_init_data init = {};
|
||||
struct clk_hw *hw;
|
||||
unsigned int mckr;
|
||||
unsigned long irqflags;
|
||||
int ret;
|
||||
|
||||
if (!name || !num_parents || !parent_names || !lock)
|
||||
if (!name || !num_parents || !(parent_names || parent_hws) || !lock)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
master = kzalloc(sizeof(*master), GFP_KERNEL);
|
||||
@@ -493,7 +494,10 @@ at91_clk_register_master_internal(struct regmap *regmap,
|
||||
|
||||
init.name = name;
|
||||
init.ops = ops;
|
||||
init.parent_names = parent_names;
|
||||
if (parent_hws)
|
||||
init.parent_hws = (const struct clk_hw **)parent_hws;
|
||||
else
|
||||
init.parent_names = parent_names;
|
||||
init.num_parents = num_parents;
|
||||
init.flags = flags;
|
||||
|
||||
@@ -527,12 +531,13 @@ struct clk_hw * __init
|
||||
at91_clk_register_master_pres(struct regmap *regmap,
|
||||
const char *name, int num_parents,
|
||||
const char **parent_names,
|
||||
struct clk_hw **parent_hws,
|
||||
const struct clk_master_layout *layout,
|
||||
const struct clk_master_characteristics *characteristics,
|
||||
spinlock_t *lock)
|
||||
{
|
||||
return at91_clk_register_master_internal(regmap, name, num_parents,
|
||||
parent_names, layout,
|
||||
parent_names, parent_hws, layout,
|
||||
characteristics,
|
||||
&master_pres_ops,
|
||||
lock, CLK_SET_RATE_GATE);
|
||||
@@ -541,7 +546,7 @@ at91_clk_register_master_pres(struct regmap *regmap,
|
||||
struct clk_hw * __init
|
||||
at91_clk_register_master_div(struct regmap *regmap,
|
||||
const char *name, const char *parent_name,
|
||||
const struct clk_master_layout *layout,
|
||||
struct clk_hw *parent_hw, const struct clk_master_layout *layout,
|
||||
const struct clk_master_characteristics *characteristics,
|
||||
spinlock_t *lock, u32 flags, u32 safe_div)
|
||||
{
|
||||
@@ -554,7 +559,8 @@ at91_clk_register_master_div(struct regmap *regmap,
|
||||
ops = &master_div_ops_chg;
|
||||
|
||||
hw = at91_clk_register_master_internal(regmap, name, 1,
|
||||
&parent_name, layout,
|
||||
parent_name ? &parent_name : NULL,
|
||||
parent_hw ? &parent_hw : NULL, layout,
|
||||
characteristics, ops,
|
||||
lock, flags);
|
||||
|
||||
@@ -806,18 +812,19 @@ struct clk_hw * __init
|
||||
at91_clk_sama7g5_register_master(struct regmap *regmap,
|
||||
const char *name, int num_parents,
|
||||
const char **parent_names,
|
||||
struct clk_hw **parent_hws,
|
||||
u32 *mux_table,
|
||||
spinlock_t *lock, u8 id,
|
||||
bool critical, int chg_pid)
|
||||
{
|
||||
struct clk_master *master;
|
||||
struct clk_hw *hw;
|
||||
struct clk_init_data init;
|
||||
struct clk_init_data init = {};
|
||||
unsigned long flags;
|
||||
unsigned int val;
|
||||
int ret;
|
||||
|
||||
if (!name || !num_parents || !parent_names || !mux_table ||
|
||||
if (!name || !num_parents || !(parent_names || parent_hws) || !mux_table ||
|
||||
!lock || id > MASTER_MAX_ID)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
@@ -827,7 +834,10 @@ at91_clk_sama7g5_register_master(struct regmap *regmap,
|
||||
|
||||
init.name = name;
|
||||
init.ops = &sama7g5_master_ops;
|
||||
init.parent_names = parent_names;
|
||||
if (parent_hws)
|
||||
init.parent_hws = (const struct clk_hw **)parent_hws;
|
||||
else
|
||||
init.parent_names = parent_names;
|
||||
init.num_parents = num_parents;
|
||||
init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
|
||||
if (chg_pid >= 0)
|
||||
|
||||
@@ -97,14 +97,15 @@ static const struct clk_ops peripheral_ops = {
|
||||
|
||||
struct clk_hw * __init
|
||||
at91_clk_register_peripheral(struct regmap *regmap, const char *name,
|
||||
const char *parent_name, u32 id)
|
||||
const char *parent_name, struct clk_hw *parent_hw,
|
||||
u32 id)
|
||||
{
|
||||
struct clk_peripheral *periph;
|
||||
struct clk_init_data init;
|
||||
struct clk_init_data init = {};
|
||||
struct clk_hw *hw;
|
||||
int ret;
|
||||
|
||||
if (!name || !parent_name || id > PERIPHERAL_ID_MAX)
|
||||
if (!name || !(parent_name || parent_hw) || id > PERIPHERAL_ID_MAX)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
periph = kzalloc(sizeof(*periph), GFP_KERNEL);
|
||||
@@ -113,7 +114,10 @@ at91_clk_register_peripheral(struct regmap *regmap, const char *name,
|
||||
|
||||
init.name = name;
|
||||
init.ops = &peripheral_ops;
|
||||
init.parent_names = &parent_name;
|
||||
if (parent_hw)
|
||||
init.parent_hws = (const struct clk_hw **)&parent_hw;
|
||||
else
|
||||
init.parent_names = &parent_name;
|
||||
init.num_parents = 1;
|
||||
init.flags = 0;
|
||||
|
||||
@@ -444,15 +448,16 @@ struct clk_hw * __init
|
||||
at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
|
||||
const struct clk_pcr_layout *layout,
|
||||
const char *name, const char *parent_name,
|
||||
struct clk_hw *parent_hw,
|
||||
u32 id, const struct clk_range *range,
|
||||
int chg_pid, unsigned long flags)
|
||||
{
|
||||
struct clk_sam9x5_peripheral *periph;
|
||||
struct clk_init_data init;
|
||||
struct clk_init_data init = {};
|
||||
struct clk_hw *hw;
|
||||
int ret;
|
||||
|
||||
if (!name || !parent_name)
|
||||
if (!name || !(parent_name || parent_hw))
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
periph = kzalloc(sizeof(*periph), GFP_KERNEL);
|
||||
@@ -460,7 +465,10 @@ at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
init.name = name;
|
||||
init.parent_names = &parent_name;
|
||||
if (parent_hw)
|
||||
init.parent_hws = (const struct clk_hw **)&parent_hw;
|
||||
else
|
||||
init.parent_names = &parent_name;
|
||||
init.num_parents = 1;
|
||||
init.flags = flags;
|
||||
if (chg_pid < 0) {
|
||||
|
||||
@@ -215,16 +215,16 @@ static const struct clk_ops programmable_ops = {
|
||||
struct clk_hw * __init
|
||||
at91_clk_register_programmable(struct regmap *regmap,
|
||||
const char *name, const char **parent_names,
|
||||
u8 num_parents, u8 id,
|
||||
struct clk_hw **parent_hws, u8 num_parents, u8 id,
|
||||
const struct clk_programmable_layout *layout,
|
||||
u32 *mux_table)
|
||||
{
|
||||
struct clk_programmable *prog;
|
||||
struct clk_hw *hw;
|
||||
struct clk_init_data init;
|
||||
struct clk_init_data init = {};
|
||||
int ret;
|
||||
|
||||
if (id > PROG_ID_MAX)
|
||||
if (id > PROG_ID_MAX || !(parent_names || parent_hws))
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
prog = kzalloc(sizeof(*prog), GFP_KERNEL);
|
||||
@@ -233,7 +233,10 @@ at91_clk_register_programmable(struct regmap *regmap,
|
||||
|
||||
init.name = name;
|
||||
init.ops = &programmable_ops;
|
||||
init.parent_names = parent_names;
|
||||
if (parent_hws)
|
||||
init.parent_hws = (const struct clk_hw **)parent_hws;
|
||||
else
|
||||
init.parent_names = parent_names;
|
||||
init.num_parents = num_parents;
|
||||
init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
|
||||
|
||||
|
||||
@@ -616,7 +616,7 @@ sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock,
|
||||
{
|
||||
struct sam9x60_frac *frac;
|
||||
struct clk_hw *hw;
|
||||
struct clk_init_data init;
|
||||
struct clk_init_data init = {};
|
||||
unsigned long parent_rate, irqflags;
|
||||
unsigned int val;
|
||||
int ret;
|
||||
@@ -629,7 +629,10 @@ sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock,
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
init.name = name;
|
||||
init.parent_names = &parent_name;
|
||||
if (parent_name)
|
||||
init.parent_names = &parent_name;
|
||||
else
|
||||
init.parent_hws = (const struct clk_hw **)&parent_hw;
|
||||
init.num_parents = 1;
|
||||
if (flags & CLK_SET_RATE_GATE)
|
||||
init.ops = &sam9x60_frac_pll_ops;
|
||||
@@ -692,14 +695,15 @@ free:
|
||||
|
||||
struct clk_hw * __init
|
||||
sam9x60_clk_register_div_pll(struct regmap *regmap, spinlock_t *lock,
|
||||
const char *name, const char *parent_name, u8 id,
|
||||
const char *name, const char *parent_name,
|
||||
struct clk_hw *parent_hw, u8 id,
|
||||
const struct clk_pll_characteristics *characteristics,
|
||||
const struct clk_pll_layout *layout, u32 flags,
|
||||
u32 safe_div)
|
||||
{
|
||||
struct sam9x60_div *div;
|
||||
struct clk_hw *hw;
|
||||
struct clk_init_data init;
|
||||
struct clk_init_data init = {};
|
||||
unsigned long irqflags;
|
||||
unsigned int val;
|
||||
int ret;
|
||||
@@ -716,7 +720,10 @@ sam9x60_clk_register_div_pll(struct regmap *regmap, spinlock_t *lock,
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
init.name = name;
|
||||
init.parent_names = &parent_name;
|
||||
if (parent_hw)
|
||||
init.parent_hws = (const struct clk_hw **)&parent_hw;
|
||||
else
|
||||
init.parent_names = &parent_name;
|
||||
init.num_parents = 1;
|
||||
if (flags & CLK_SET_RATE_GATE)
|
||||
init.ops = &sam9x60_div_pll_ops;
|
||||
|
||||
@@ -105,14 +105,15 @@ static const struct clk_ops system_ops = {
|
||||
|
||||
struct clk_hw * __init
|
||||
at91_clk_register_system(struct regmap *regmap, const char *name,
|
||||
const char *parent_name, u8 id, unsigned long flags)
|
||||
const char *parent_name, struct clk_hw *parent_hw, u8 id,
|
||||
unsigned long flags)
|
||||
{
|
||||
struct clk_system *sys;
|
||||
struct clk_hw *hw;
|
||||
struct clk_init_data init;
|
||||
struct clk_init_data init = {};
|
||||
int ret;
|
||||
|
||||
if (!parent_name || id > SYSTEM_MAX_ID)
|
||||
if (!(parent_name || parent_hw) || id > SYSTEM_MAX_ID)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
sys = kzalloc(sizeof(*sys), GFP_KERNEL);
|
||||
@@ -121,7 +122,10 @@ at91_clk_register_system(struct regmap *regmap, const char *name,
|
||||
|
||||
init.name = name;
|
||||
init.ops = &system_ops;
|
||||
init.parent_names = &parent_name;
|
||||
if (parent_hw)
|
||||
init.parent_hws = (const struct clk_hw **)&parent_hw;
|
||||
else
|
||||
init.parent_names = &parent_name;
|
||||
init.num_parents = 1;
|
||||
init.flags = CLK_SET_RATE_PARENT | flags;
|
||||
|
||||
|
||||
@@ -144,21 +144,30 @@ static struct clk_hw * __init
|
||||
at91_clk_register_utmi_internal(struct regmap *regmap_pmc,
|
||||
struct regmap *regmap_sfr,
|
||||
const char *name, const char *parent_name,
|
||||
struct clk_hw *parent_hw,
|
||||
const struct clk_ops *ops, unsigned long flags)
|
||||
{
|
||||
struct clk_utmi *utmi;
|
||||
struct clk_hw *hw;
|
||||
struct clk_init_data init;
|
||||
struct clk_init_data init = {};
|
||||
int ret;
|
||||
|
||||
if (!(parent_name || parent_hw))
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
utmi = kzalloc(sizeof(*utmi), GFP_KERNEL);
|
||||
if (!utmi)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
init.name = name;
|
||||
init.ops = ops;
|
||||
init.parent_names = parent_name ? &parent_name : NULL;
|
||||
init.num_parents = parent_name ? 1 : 0;
|
||||
if (parent_hw) {
|
||||
init.parent_hws = parent_hw ? (const struct clk_hw **)&parent_hw : NULL;
|
||||
init.num_parents = parent_hw ? 1 : 0;
|
||||
} else {
|
||||
init.parent_names = parent_name ? &parent_name : NULL;
|
||||
init.num_parents = parent_name ? 1 : 0;
|
||||
}
|
||||
init.flags = flags;
|
||||
|
||||
utmi->hw.init = &init;
|
||||
@@ -177,10 +186,11 @@ at91_clk_register_utmi_internal(struct regmap *regmap_pmc,
|
||||
|
||||
struct clk_hw * __init
|
||||
at91_clk_register_utmi(struct regmap *regmap_pmc, struct regmap *regmap_sfr,
|
||||
const char *name, const char *parent_name)
|
||||
const char *name, const char *parent_name,
|
||||
struct clk_hw *parent_hw)
|
||||
{
|
||||
return at91_clk_register_utmi_internal(regmap_pmc, regmap_sfr, name,
|
||||
parent_name, &utmi_ops, CLK_SET_RATE_GATE);
|
||||
parent_name, parent_hw, &utmi_ops, CLK_SET_RATE_GATE);
|
||||
}
|
||||
|
||||
static int clk_utmi_sama7g5_prepare(struct clk_hw *hw)
|
||||
@@ -279,8 +289,8 @@ static const struct clk_ops sama7g5_utmi_ops = {
|
||||
|
||||
struct clk_hw * __init
|
||||
at91_clk_sama7g5_register_utmi(struct regmap *regmap_pmc, const char *name,
|
||||
const char *parent_name)
|
||||
const char *parent_name, struct clk_hw *parent_hw)
|
||||
{
|
||||
return at91_clk_register_utmi_internal(regmap_pmc, NULL, name,
|
||||
parent_name, &sama7g5_utmi_ops, 0);
|
||||
parent_name, parent_hw, &sama7g5_utmi_ops, 0);
|
||||
}
|
||||
|
||||
@@ -171,7 +171,7 @@ static void __init of_sama5d2_clk_generated_setup(struct device_node *np)
|
||||
|
||||
hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,
|
||||
&dt_pcr_layout, name,
|
||||
parent_names, NULL,
|
||||
parent_names, NULL, NULL,
|
||||
num_parents, id, &range,
|
||||
chg_pid);
|
||||
if (IS_ERR(hw))
|
||||
@@ -269,7 +269,7 @@ static void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np)
|
||||
if (IS_ERR(regmap))
|
||||
return;
|
||||
|
||||
hw = at91_clk_register_main_osc(regmap, name, parent_name, bypass);
|
||||
hw = at91_clk_register_main_osc(regmap, name, parent_name, NULL, bypass);
|
||||
if (IS_ERR(hw))
|
||||
return;
|
||||
|
||||
@@ -323,7 +323,7 @@ static void __init of_at91rm9200_clk_main_setup(struct device_node *np)
|
||||
if (IS_ERR(regmap))
|
||||
return;
|
||||
|
||||
hw = at91_clk_register_rm9200_main(regmap, name, parent_name);
|
||||
hw = at91_clk_register_rm9200_main(regmap, name, parent_name, NULL);
|
||||
if (IS_ERR(hw))
|
||||
return;
|
||||
|
||||
@@ -354,7 +354,7 @@ static void __init of_at91sam9x5_clk_main_setup(struct device_node *np)
|
||||
|
||||
of_property_read_string(np, "clock-output-names", &name);
|
||||
|
||||
hw = at91_clk_register_sam9x5_main(regmap, name, parent_names,
|
||||
hw = at91_clk_register_sam9x5_main(regmap, name, parent_names, NULL,
|
||||
num_parents);
|
||||
if (IS_ERR(hw))
|
||||
return;
|
||||
@@ -420,12 +420,12 @@ of_at91_clk_master_setup(struct device_node *np,
|
||||
return;
|
||||
|
||||
hw = at91_clk_register_master_pres(regmap, "masterck_pres", num_parents,
|
||||
parent_names, layout,
|
||||
parent_names, NULL, layout,
|
||||
characteristics, &mck_lock);
|
||||
if (IS_ERR(hw))
|
||||
goto out_free_characteristics;
|
||||
|
||||
hw = at91_clk_register_master_div(regmap, name, "masterck_pres",
|
||||
hw = at91_clk_register_master_div(regmap, name, "masterck_pres", NULL,
|
||||
layout, characteristics,
|
||||
&mck_lock, CLK_SET_RATE_GATE, 0);
|
||||
if (IS_ERR(hw))
|
||||
@@ -490,7 +490,7 @@ of_at91_clk_periph_setup(struct device_node *np, u8 type)
|
||||
|
||||
if (type == PERIPHERAL_AT91RM9200) {
|
||||
hw = at91_clk_register_peripheral(regmap, name,
|
||||
parent_name, id);
|
||||
parent_name, NULL, id);
|
||||
} else {
|
||||
struct clk_range range = CLK_RANGE(0, 0);
|
||||
unsigned long flags = 0;
|
||||
@@ -512,6 +512,7 @@ of_at91_clk_periph_setup(struct device_node *np, u8 type)
|
||||
&dt_pcr_layout,
|
||||
name,
|
||||
parent_name,
|
||||
NULL,
|
||||
id, &range,
|
||||
INT_MIN,
|
||||
flags);
|
||||
@@ -769,7 +770,7 @@ of_at91_clk_prog_setup(struct device_node *np,
|
||||
name = progclknp->name;
|
||||
|
||||
hw = at91_clk_register_programmable(regmap, name,
|
||||
parent_names, num_parents,
|
||||
parent_names, NULL, num_parents,
|
||||
id, layout, mux_table);
|
||||
if (IS_ERR(hw))
|
||||
continue;
|
||||
@@ -907,8 +908,8 @@ static void __init of_at91rm9200_clk_sys_setup(struct device_node *np)
|
||||
if (!strcmp(sysclknp->name, "ddrck"))
|
||||
flags = CLK_IS_CRITICAL;
|
||||
|
||||
hw = at91_clk_register_system(regmap, name, parent_name, id,
|
||||
flags);
|
||||
hw = at91_clk_register_system(regmap, name, parent_name, NULL,
|
||||
id, flags);
|
||||
if (IS_ERR(hw))
|
||||
continue;
|
||||
|
||||
@@ -1054,7 +1055,7 @@ static void __init of_at91sam9x5_clk_utmi_setup(struct device_node *np)
|
||||
regmap_sfr = NULL;
|
||||
}
|
||||
|
||||
hw = at91_clk_register_utmi(regmap_pmc, regmap_sfr, name, parent_name);
|
||||
hw = at91_clk_register_utmi(regmap_pmc, regmap_sfr, name, parent_name, NULL);
|
||||
if (IS_ERR(hw))
|
||||
return;
|
||||
|
||||
|
||||
+24
-12
@@ -144,7 +144,8 @@ struct clk_hw * __init
|
||||
at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock,
|
||||
const struct clk_pcr_layout *layout,
|
||||
const char *name, const char **parent_names,
|
||||
u32 *mux_table, u8 num_parents, u8 id,
|
||||
struct clk_hw **parent_hws, u32 *mux_table,
|
||||
u8 num_parents, u8 id,
|
||||
const struct clk_range *range, int chg_pid);
|
||||
|
||||
struct clk_hw * __init
|
||||
@@ -161,25 +162,29 @@ at91_clk_register_main_rc_osc(struct regmap *regmap, const char *name,
|
||||
u32 frequency, u32 accuracy);
|
||||
struct clk_hw * __init
|
||||
at91_clk_register_main_osc(struct regmap *regmap, const char *name,
|
||||
const char *parent_name, bool bypass);
|
||||
const char *parent_name,
|
||||
struct clk_parent_data *parent_data, bool bypass);
|
||||
struct clk_hw * __init
|
||||
at91_clk_register_rm9200_main(struct regmap *regmap,
|
||||
const char *name,
|
||||
const char *parent_name);
|
||||
const char *parent_name,
|
||||
struct clk_hw *parent_hw);
|
||||
struct clk_hw * __init
|
||||
at91_clk_register_sam9x5_main(struct regmap *regmap, const char *name,
|
||||
const char **parent_names, int num_parents);
|
||||
const char **parent_names,
|
||||
struct clk_hw **parent_hws, int num_parents);
|
||||
|
||||
struct clk_hw * __init
|
||||
at91_clk_register_master_pres(struct regmap *regmap, const char *name,
|
||||
int num_parents, const char **parent_names,
|
||||
struct clk_hw **parent_hws,
|
||||
const struct clk_master_layout *layout,
|
||||
const struct clk_master_characteristics *characteristics,
|
||||
spinlock_t *lock);
|
||||
|
||||
struct clk_hw * __init
|
||||
at91_clk_register_master_div(struct regmap *regmap, const char *name,
|
||||
const char *parent_names,
|
||||
const char *parent_names, struct clk_hw *parent_hw,
|
||||
const struct clk_master_layout *layout,
|
||||
const struct clk_master_characteristics *characteristics,
|
||||
spinlock_t *lock, u32 flags, u32 safe_div);
|
||||
@@ -187,17 +192,20 @@ at91_clk_register_master_div(struct regmap *regmap, const char *name,
|
||||
struct clk_hw * __init
|
||||
at91_clk_sama7g5_register_master(struct regmap *regmap,
|
||||
const char *name, int num_parents,
|
||||
const char **parent_names, u32 *mux_table,
|
||||
const char **parent_names,
|
||||
struct clk_hw **parent_hws, u32 *mux_table,
|
||||
spinlock_t *lock, u8 id, bool critical,
|
||||
int chg_pid);
|
||||
|
||||
struct clk_hw * __init
|
||||
at91_clk_register_peripheral(struct regmap *regmap, const char *name,
|
||||
const char *parent_name, u32 id);
|
||||
const char *parent_name, struct clk_hw *parent_hw,
|
||||
u32 id);
|
||||
struct clk_hw * __init
|
||||
at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
|
||||
const struct clk_pcr_layout *layout,
|
||||
const char *name, const char *parent_name,
|
||||
struct clk_hw *parent_hw,
|
||||
u32 id, const struct clk_range *range,
|
||||
int chg_pid, unsigned long flags);
|
||||
|
||||
@@ -212,7 +220,8 @@ at91_clk_register_plldiv(struct regmap *regmap, const char *name,
|
||||
|
||||
struct clk_hw * __init
|
||||
sam9x60_clk_register_div_pll(struct regmap *regmap, spinlock_t *lock,
|
||||
const char *name, const char *parent_name, u8 id,
|
||||
const char *name, const char *parent_name,
|
||||
struct clk_hw *parent_hw, u8 id,
|
||||
const struct clk_pll_characteristics *characteristics,
|
||||
const struct clk_pll_layout *layout, u32 flags,
|
||||
u32 safe_div);
|
||||
@@ -226,7 +235,8 @@ sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock,
|
||||
|
||||
struct clk_hw * __init
|
||||
at91_clk_register_programmable(struct regmap *regmap, const char *name,
|
||||
const char **parent_names, u8 num_parents, u8 id,
|
||||
const char **parent_names, struct clk_hw **parent_hws,
|
||||
u8 num_parents, u8 id,
|
||||
const struct clk_programmable_layout *layout,
|
||||
u32 *mux_table);
|
||||
|
||||
@@ -242,7 +252,8 @@ at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name,
|
||||
|
||||
struct clk_hw * __init
|
||||
at91_clk_register_system(struct regmap *regmap, const char *name,
|
||||
const char *parent_name, u8 id, unsigned long flags);
|
||||
const char *parent_name, struct clk_hw *parent_hw,
|
||||
u8 id, unsigned long flags);
|
||||
|
||||
struct clk_hw * __init
|
||||
at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name,
|
||||
@@ -259,10 +270,11 @@ at91rm9200_clk_register_usb(struct regmap *regmap, const char *name,
|
||||
|
||||
struct clk_hw * __init
|
||||
at91_clk_register_utmi(struct regmap *regmap_pmc, struct regmap *regmap_sfr,
|
||||
const char *name, const char *parent_name);
|
||||
const char *name, const char *parent_name,
|
||||
struct clk_hw *parent_hw);
|
||||
|
||||
struct clk_hw * __init
|
||||
at91_clk_sama7g5_register_utmi(struct regmap *regmap, const char *name,
|
||||
const char *parent_name);
|
||||
const char *parent_name, struct clk_hw *parent_hw);
|
||||
|
||||
#endif /* __PMC_H_ */
|
||||
|
||||
+10
-10
@@ -219,14 +219,14 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
|
||||
hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, 0);
|
||||
hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, 0);
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
main_osc_hw = hw;
|
||||
|
||||
parent_names[0] = "main_rc_osc";
|
||||
parent_names[1] = "main_osc";
|
||||
hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, 2);
|
||||
hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2);
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
|
||||
@@ -246,7 +246,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
|
||||
goto err_free;
|
||||
|
||||
hw = sam9x60_clk_register_div_pll(regmap, &pmc_pll_lock, "pllack_divck",
|
||||
"pllack_fracck", 0, &plla_characteristics,
|
||||
"pllack_fracck", NULL, 0, &plla_characteristics,
|
||||
&pll_div_layout,
|
||||
/*
|
||||
* This feeds CPU. It should not
|
||||
@@ -266,7 +266,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
|
||||
goto err_free;
|
||||
|
||||
hw = sam9x60_clk_register_div_pll(regmap, &pmc_pll_lock, "upllck_divck",
|
||||
"upllck_fracck", 1, &upll_characteristics,
|
||||
"upllck_fracck", NULL, 1, &upll_characteristics,
|
||||
&pll_div_layout,
|
||||
CLK_SET_RATE_GATE |
|
||||
CLK_SET_PARENT_GATE |
|
||||
@@ -280,13 +280,13 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
|
||||
parent_names[1] = "mainck";
|
||||
parent_names[2] = "pllack_divck";
|
||||
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 3,
|
||||
parent_names, &sam9x60_master_layout,
|
||||
parent_names, NULL, &sam9x60_master_layout,
|
||||
&mck_characteristics, &mck_lock);
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
|
||||
hw = at91_clk_register_master_div(regmap, "masterck_div",
|
||||
"masterck_pres", &sam9x60_master_layout,
|
||||
"masterck_pres", NULL, &sam9x60_master_layout,
|
||||
&mck_characteristics, &mck_lock,
|
||||
CLK_SET_RATE_GATE, 0);
|
||||
if (IS_ERR(hw))
|
||||
@@ -313,7 +313,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
|
||||
snprintf(name, sizeof(name), "prog%d", i);
|
||||
|
||||
hw = at91_clk_register_programmable(regmap, name,
|
||||
parent_names, 6, i,
|
||||
parent_names, NULL, 6, i,
|
||||
&sam9x60_programmable_layout,
|
||||
NULL);
|
||||
if (IS_ERR(hw))
|
||||
@@ -324,7 +324,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(sam9x60_systemck); i++) {
|
||||
hw = at91_clk_register_system(regmap, sam9x60_systemck[i].n,
|
||||
sam9x60_systemck[i].p,
|
||||
sam9x60_systemck[i].p, NULL,
|
||||
sam9x60_systemck[i].id,
|
||||
sam9x60_systemck[i].flags);
|
||||
if (IS_ERR(hw))
|
||||
@@ -337,7 +337,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
|
||||
hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
|
||||
&sam9x60_pcr_layout,
|
||||
sam9x60_periphck[i].n,
|
||||
"masterck_div",
|
||||
"masterck_div", NULL,
|
||||
sam9x60_periphck[i].id,
|
||||
&range, INT_MIN,
|
||||
sam9x60_periphck[i].flags);
|
||||
@@ -351,7 +351,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
|
||||
hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,
|
||||
&sam9x60_pcr_layout,
|
||||
sam9x60_gck[i].n,
|
||||
parent_names, NULL, 6,
|
||||
parent_names, NULL, NULL, 6,
|
||||
sam9x60_gck[i].id,
|
||||
&sam9x60_gck[i].r, INT_MIN);
|
||||
if (IS_ERR(hw))
|
||||
|
||||
+10
-10
@@ -202,14 +202,14 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
|
||||
|
||||
bypass = of_property_read_bool(np, "atmel,osc-bypass");
|
||||
|
||||
hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name,
|
||||
hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
|
||||
bypass);
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
|
||||
parent_names[0] = "main_rc_osc";
|
||||
parent_names[1] = "main_osc";
|
||||
hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, 2);
|
||||
hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2);
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
|
||||
@@ -249,7 +249,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
|
||||
if (IS_ERR(regmap_sfr))
|
||||
regmap_sfr = NULL;
|
||||
|
||||
hw = at91_clk_register_utmi(regmap, regmap_sfr, "utmick", "mainck");
|
||||
hw = at91_clk_register_utmi(regmap, regmap_sfr, "utmick", "mainck", NULL);
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
|
||||
@@ -260,14 +260,14 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
|
||||
parent_names[2] = "plladivck";
|
||||
parent_names[3] = "utmick";
|
||||
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
|
||||
parent_names,
|
||||
parent_names, NULL,
|
||||
&at91sam9x5_master_layout,
|
||||
&mck_characteristics, &mck_lock);
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
|
||||
hw = at91_clk_register_master_div(regmap, "masterck_div",
|
||||
"masterck_pres",
|
||||
"masterck_pres", NULL,
|
||||
&at91sam9x5_master_layout,
|
||||
&mck_characteristics, &mck_lock,
|
||||
CLK_SET_RATE_GATE, 0);
|
||||
@@ -300,7 +300,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
|
||||
snprintf(name, sizeof(name), "prog%d", i);
|
||||
|
||||
hw = at91_clk_register_programmable(regmap, name,
|
||||
parent_names, 6, i,
|
||||
parent_names, NULL, 6, i,
|
||||
&sama5d2_programmable_layout,
|
||||
NULL);
|
||||
if (IS_ERR(hw))
|
||||
@@ -311,7 +311,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(sama5d2_systemck); i++) {
|
||||
hw = at91_clk_register_system(regmap, sama5d2_systemck[i].n,
|
||||
sama5d2_systemck[i].p,
|
||||
sama5d2_systemck[i].p, NULL,
|
||||
sama5d2_systemck[i].id,
|
||||
sama5d2_systemck[i].flags);
|
||||
if (IS_ERR(hw))
|
||||
@@ -324,7 +324,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
|
||||
hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
|
||||
&sama5d2_pcr_layout,
|
||||
sama5d2_periphck[i].n,
|
||||
"masterck_div",
|
||||
"masterck_div", NULL,
|
||||
sama5d2_periphck[i].id,
|
||||
&range, INT_MIN,
|
||||
sama5d2_periphck[i].flags);
|
||||
@@ -338,7 +338,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
|
||||
hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
|
||||
&sama5d2_pcr_layout,
|
||||
sama5d2_periph32ck[i].n,
|
||||
"h32mxck",
|
||||
"h32mxck", NULL,
|
||||
sama5d2_periph32ck[i].id,
|
||||
&sama5d2_periph32ck[i].r,
|
||||
INT_MIN, 0);
|
||||
@@ -358,7 +358,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
|
||||
hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,
|
||||
&sama5d2_pcr_layout,
|
||||
sama5d2_gck[i].n,
|
||||
parent_names, NULL, 6,
|
||||
parent_names, NULL, NULL, 6,
|
||||
sama5d2_gck[i].id,
|
||||
&sama5d2_gck[i].r,
|
||||
sama5d2_gck[i].chg_pid);
|
||||
|
||||
@@ -150,14 +150,14 @@ static void __init sama5d3_pmc_setup(struct device_node *np)
|
||||
|
||||
bypass = of_property_read_bool(np, "atmel,osc-bypass");
|
||||
|
||||
hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name,
|
||||
hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
|
||||
bypass);
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
|
||||
parent_names[0] = "main_rc_osc";
|
||||
parent_names[1] = "main_osc";
|
||||
hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, 2);
|
||||
hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2);
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
|
||||
@@ -172,7 +172,7 @@ static void __init sama5d3_pmc_setup(struct device_node *np)
|
||||
|
||||
sama5d3_pmc->chws[PMC_PLLACK] = hw;
|
||||
|
||||
hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck");
|
||||
hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL);
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
|
||||
@@ -183,14 +183,14 @@ static void __init sama5d3_pmc_setup(struct device_node *np)
|
||||
parent_names[2] = "plladivck";
|
||||
parent_names[3] = "utmick";
|
||||
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
|
||||
parent_names,
|
||||
parent_names, NULL,
|
||||
&at91sam9x5_master_layout,
|
||||
&mck_characteristics, &mck_lock);
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
|
||||
hw = at91_clk_register_master_div(regmap, "masterck_div",
|
||||
"masterck_pres",
|
||||
"masterck_pres", NULL,
|
||||
&at91sam9x5_master_layout,
|
||||
&mck_characteristics, &mck_lock,
|
||||
CLK_SET_RATE_GATE, 0);
|
||||
@@ -220,7 +220,7 @@ static void __init sama5d3_pmc_setup(struct device_node *np)
|
||||
snprintf(name, sizeof(name), "prog%d", i);
|
||||
|
||||
hw = at91_clk_register_programmable(regmap, name,
|
||||
parent_names, 5, i,
|
||||
parent_names, NULL, 5, i,
|
||||
&at91sam9x5_programmable_layout,
|
||||
NULL);
|
||||
if (IS_ERR(hw))
|
||||
@@ -231,7 +231,7 @@ static void __init sama5d3_pmc_setup(struct device_node *np)
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(sama5d3_systemck); i++) {
|
||||
hw = at91_clk_register_system(regmap, sama5d3_systemck[i].n,
|
||||
sama5d3_systemck[i].p,
|
||||
sama5d3_systemck[i].p, NULL,
|
||||
sama5d3_systemck[i].id,
|
||||
sama5d3_systemck[i].flags);
|
||||
if (IS_ERR(hw))
|
||||
@@ -244,7 +244,7 @@ static void __init sama5d3_pmc_setup(struct device_node *np)
|
||||
hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
|
||||
&sama5d3_pcr_layout,
|
||||
sama5d3_periphck[i].n,
|
||||
"masterck_div",
|
||||
"masterck_div", NULL,
|
||||
sama5d3_periphck[i].id,
|
||||
&sama5d3_periphck[i].r,
|
||||
INT_MIN,
|
||||
|
||||
@@ -165,14 +165,14 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
|
||||
|
||||
bypass = of_property_read_bool(np, "atmel,osc-bypass");
|
||||
|
||||
hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name,
|
||||
hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
|
||||
bypass);
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
|
||||
parent_names[0] = "main_rc_osc";
|
||||
parent_names[1] = "main_osc";
|
||||
hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, 2);
|
||||
hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2);
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
|
||||
@@ -187,7 +187,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
|
||||
|
||||
sama5d4_pmc->chws[PMC_PLLACK] = hw;
|
||||
|
||||
hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck");
|
||||
hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL);
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
|
||||
@@ -198,14 +198,14 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
|
||||
parent_names[2] = "plladivck";
|
||||
parent_names[3] = "utmick";
|
||||
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
|
||||
parent_names,
|
||||
parent_names, NULL,
|
||||
&at91sam9x5_master_layout,
|
||||
&mck_characteristics, &mck_lock);
|
||||
if (IS_ERR(hw))
|
||||
goto err_free;
|
||||
|
||||
hw = at91_clk_register_master_div(regmap, "masterck_div",
|
||||
"masterck_pres",
|
||||
"masterck_pres", NULL,
|
||||
&at91sam9x5_master_layout,
|
||||
&mck_characteristics, &mck_lock,
|
||||
CLK_SET_RATE_GATE, 0);
|
||||
@@ -243,7 +243,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
|
||||
snprintf(name, sizeof(name), "prog%d", i);
|
||||
|
||||
hw = at91_clk_register_programmable(regmap, name,
|
||||
parent_names, 5, i,
|
||||
parent_names, NULL, 5, i,
|
||||
&at91sam9x5_programmable_layout,
|
||||
NULL);
|
||||
if (IS_ERR(hw))
|
||||
@@ -254,7 +254,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(sama5d4_systemck); i++) {
|
||||
hw = at91_clk_register_system(regmap, sama5d4_systemck[i].n,
|
||||
sama5d4_systemck[i].p,
|
||||
sama5d4_systemck[i].p, NULL,
|
||||
sama5d4_systemck[i].id,
|
||||
sama5d4_systemck[i].flags);
|
||||
if (IS_ERR(hw))
|
||||
@@ -267,7 +267,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
|
||||
hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
|
||||
&sama5d4_pcr_layout,
|
||||
sama5d4_periphck[i].n,
|
||||
"masterck_div",
|
||||
"masterck_div", NULL,
|
||||
sama5d4_periphck[i].id,
|
||||
&range, INT_MIN,
|
||||
sama5d4_periphck[i].flags);
|
||||
@@ -281,7 +281,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
|
||||
hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
|
||||
&sama5d4_pcr_layout,
|
||||
sama5d4_periph32ck[i].n,
|
||||
"h32mxck",
|
||||
"h32mxck", NULL,
|
||||
sama5d4_periph32ck[i].id,
|
||||
&range, INT_MIN, 0);
|
||||
if (IS_ERR(hw))
|
||||
|
||||
+447
-335
File diff suppressed because it is too large
Load Diff
+48
-27
@@ -117,17 +117,17 @@ static const struct clk_ops slow_osc_ops = {
|
||||
static struct clk_hw * __init
|
||||
at91_clk_register_slow_osc(void __iomem *sckcr,
|
||||
const char *name,
|
||||
const char *parent_name,
|
||||
const struct clk_parent_data *parent_data,
|
||||
unsigned long startup,
|
||||
bool bypass,
|
||||
const struct clk_slow_bits *bits)
|
||||
{
|
||||
struct clk_slow_osc *osc;
|
||||
struct clk_hw *hw;
|
||||
struct clk_init_data init;
|
||||
struct clk_init_data init = {};
|
||||
int ret;
|
||||
|
||||
if (!sckcr || !name || !parent_name)
|
||||
if (!sckcr || !name || !parent_data)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
osc = kzalloc(sizeof(*osc), GFP_KERNEL);
|
||||
@@ -136,7 +136,7 @@ at91_clk_register_slow_osc(void __iomem *sckcr,
|
||||
|
||||
init.name = name;
|
||||
init.ops = &slow_osc_ops;
|
||||
init.parent_names = &parent_name;
|
||||
init.parent_data = parent_data;
|
||||
init.num_parents = 1;
|
||||
init.flags = CLK_IGNORE_UNUSED;
|
||||
|
||||
@@ -317,16 +317,16 @@ static const struct clk_ops sam9x5_slow_ops = {
|
||||
static struct clk_hw * __init
|
||||
at91_clk_register_sam9x5_slow(void __iomem *sckcr,
|
||||
const char *name,
|
||||
const char **parent_names,
|
||||
const struct clk_hw **parent_hws,
|
||||
int num_parents,
|
||||
const struct clk_slow_bits *bits)
|
||||
{
|
||||
struct clk_sam9x5_slow *slowck;
|
||||
struct clk_hw *hw;
|
||||
struct clk_init_data init;
|
||||
struct clk_init_data init = {};
|
||||
int ret;
|
||||
|
||||
if (!sckcr || !name || !parent_names || !num_parents)
|
||||
if (!sckcr || !name || !parent_hws || !num_parents)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
slowck = kzalloc(sizeof(*slowck), GFP_KERNEL);
|
||||
@@ -335,7 +335,7 @@ at91_clk_register_sam9x5_slow(void __iomem *sckcr,
|
||||
|
||||
init.name = name;
|
||||
init.ops = &sam9x5_slow_ops;
|
||||
init.parent_names = parent_names;
|
||||
init.parent_hws = parent_hws;
|
||||
init.num_parents = num_parents;
|
||||
init.flags = 0;
|
||||
|
||||
@@ -366,18 +366,21 @@ static void __init at91sam9x5_sckc_register(struct device_node *np,
|
||||
unsigned int rc_osc_startup_us,
|
||||
const struct clk_slow_bits *bits)
|
||||
{
|
||||
const char *parent_names[2] = { "slow_rc_osc", "slow_osc" };
|
||||
void __iomem *regbase = of_iomap(np, 0);
|
||||
struct device_node *child = NULL;
|
||||
const char *xtal_name;
|
||||
struct clk_hw *slow_rc, *slow_osc, *slowck;
|
||||
static struct clk_parent_data parent_data = {
|
||||
.name = "slow_xtal",
|
||||
};
|
||||
const struct clk_hw *parent_hws[2];
|
||||
bool bypass;
|
||||
int ret;
|
||||
|
||||
if (!regbase)
|
||||
return;
|
||||
|
||||
slow_rc = at91_clk_register_slow_rc_osc(regbase, parent_names[0],
|
||||
slow_rc = at91_clk_register_slow_rc_osc(regbase, "slow_rc_osc",
|
||||
32768, 50000000,
|
||||
rc_osc_startup_us, bits);
|
||||
if (IS_ERR(slow_rc))
|
||||
@@ -401,12 +404,16 @@ static void __init at91sam9x5_sckc_register(struct device_node *np,
|
||||
if (!xtal_name)
|
||||
goto unregister_slow_rc;
|
||||
|
||||
slow_osc = at91_clk_register_slow_osc(regbase, parent_names[1],
|
||||
xtal_name, 1200000, bypass, bits);
|
||||
parent_data.fw_name = xtal_name;
|
||||
|
||||
slow_osc = at91_clk_register_slow_osc(regbase, "slow_osc",
|
||||
&parent_data, 1200000, bypass, bits);
|
||||
if (IS_ERR(slow_osc))
|
||||
goto unregister_slow_rc;
|
||||
|
||||
slowck = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_names,
|
||||
parent_hws[0] = slow_rc;
|
||||
parent_hws[1] = slow_osc;
|
||||
slowck = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_hws,
|
||||
2, bits);
|
||||
if (IS_ERR(slowck))
|
||||
goto unregister_slow_osc;
|
||||
@@ -464,14 +471,17 @@ static void __init of_sam9x60_sckc_setup(struct device_node *np)
|
||||
struct clk_hw_onecell_data *clk_data;
|
||||
struct clk_hw *slow_rc, *slow_osc;
|
||||
const char *xtal_name;
|
||||
const char *parent_names[2] = { "slow_rc_osc", "slow_osc" };
|
||||
const struct clk_hw *parent_hws[2];
|
||||
static struct clk_parent_data parent_data = {
|
||||
.name = "slow_xtal",
|
||||
};
|
||||
bool bypass;
|
||||
int ret;
|
||||
|
||||
if (!regbase)
|
||||
return;
|
||||
|
||||
slow_rc = clk_hw_register_fixed_rate_with_accuracy(NULL, parent_names[0],
|
||||
slow_rc = clk_hw_register_fixed_rate_with_accuracy(NULL, "slow_rc_osc",
|
||||
NULL, 0, 32768,
|
||||
93750000);
|
||||
if (IS_ERR(slow_rc))
|
||||
@@ -481,9 +491,10 @@ static void __init of_sam9x60_sckc_setup(struct device_node *np)
|
||||
if (!xtal_name)
|
||||
goto unregister_slow_rc;
|
||||
|
||||
parent_data.fw_name = xtal_name;
|
||||
bypass = of_property_read_bool(np, "atmel,osc-bypass");
|
||||
slow_osc = at91_clk_register_slow_osc(regbase, parent_names[1],
|
||||
xtal_name, 5000000, bypass,
|
||||
slow_osc = at91_clk_register_slow_osc(regbase, "slow_osc",
|
||||
&parent_data, 5000000, bypass,
|
||||
&at91sam9x60_bits);
|
||||
if (IS_ERR(slow_osc))
|
||||
goto unregister_slow_rc;
|
||||
@@ -494,14 +505,16 @@ static void __init of_sam9x60_sckc_setup(struct device_node *np)
|
||||
|
||||
/* MD_SLCK and TD_SLCK. */
|
||||
clk_data->num = 2;
|
||||
clk_data->hws[0] = clk_hw_register_fixed_rate(NULL, "md_slck",
|
||||
parent_names[0],
|
||||
0, 32768);
|
||||
clk_data->hws[0] = clk_hw_register_fixed_rate_parent_hw(NULL, "md_slck",
|
||||
slow_rc,
|
||||
0, 32768);
|
||||
if (IS_ERR(clk_data->hws[0]))
|
||||
goto clk_data_free;
|
||||
|
||||
parent_hws[0] = slow_rc;
|
||||
parent_hws[1] = slow_osc;
|
||||
clk_data->hws[1] = at91_clk_register_sam9x5_slow(regbase, "td_slck",
|
||||
parent_names, 2,
|
||||
parent_hws, 2,
|
||||
&at91sam9x60_bits);
|
||||
if (IS_ERR(clk_data->hws[1]))
|
||||
goto unregister_md_slck;
|
||||
@@ -572,30 +585,36 @@ static void __init of_sama5d4_sckc_setup(struct device_node *np)
|
||||
void __iomem *regbase = of_iomap(np, 0);
|
||||
struct clk_hw *slow_rc, *slowck;
|
||||
struct clk_sama5d4_slow_osc *osc;
|
||||
struct clk_init_data init;
|
||||
struct clk_init_data init = {};
|
||||
const char *xtal_name;
|
||||
const char *parent_names[2] = { "slow_rc_osc", "slow_osc" };
|
||||
const struct clk_hw *parent_hws[2];
|
||||
static struct clk_parent_data parent_data = {
|
||||
.name = "slow_xtal",
|
||||
};
|
||||
int ret;
|
||||
|
||||
if (!regbase)
|
||||
return;
|
||||
|
||||
slow_rc = clk_hw_register_fixed_rate_with_accuracy(NULL,
|
||||
parent_names[0],
|
||||
"slow_rc_osc",
|
||||
NULL, 0, 32768,
|
||||
250000000);
|
||||
if (IS_ERR(slow_rc))
|
||||
return;
|
||||
|
||||
xtal_name = of_clk_get_parent_name(np, 0);
|
||||
if (!xtal_name)
|
||||
goto unregister_slow_rc;
|
||||
parent_data.fw_name = xtal_name;
|
||||
|
||||
osc = kzalloc(sizeof(*osc), GFP_KERNEL);
|
||||
if (!osc)
|
||||
goto unregister_slow_rc;
|
||||
|
||||
init.name = parent_names[1];
|
||||
init.name = "slow_osc";
|
||||
init.ops = &sama5d4_slow_osc_ops;
|
||||
init.parent_names = &xtal_name;
|
||||
init.parent_data = &parent_data;
|
||||
init.num_parents = 1;
|
||||
init.flags = CLK_IGNORE_UNUSED;
|
||||
|
||||
@@ -608,8 +627,10 @@ static void __init of_sama5d4_sckc_setup(struct device_node *np)
|
||||
if (ret)
|
||||
goto free_slow_osc_data;
|
||||
|
||||
parent_hws[0] = slow_rc;
|
||||
parent_hws[1] = &osc->hw;
|
||||
slowck = at91_clk_register_sam9x5_slow(regbase, "slowck",
|
||||
parent_names, 2,
|
||||
parent_hws, 2,
|
||||
&at91sama5d4_bits);
|
||||
if (IS_ERR(slowck))
|
||||
goto unregister_slow_osc;
|
||||
|
||||
Reference in New Issue
Block a user