Merge tag 'clk-microchip-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into clk-microchip
Pull Microchip clk driver updates from Claudiu Beznea: Polarfire: - new Kconfig symbol name (SOC_MICROCHIP_POLARFIRE) for Microchip FPGA clock drivers PIC32: - use of_property_read_bool() to read "microchip,pic32mzda-sosc" boolean DT property in clk-pic32mzda AT91: - convert clock dt-bindings to YAML * tag 'clk-microchip-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: dt-bindings: clocks: at91sam9x5-sckc: convert to yaml dt-bindings: clocks: atmel,at91rm9200-pmc: convert to yaml clk: microchip: Use of_property_read_bool() for boolean properties clk: microchip: convert SOC_MICROCHIP_POLARFIRE to ARCH_MICROCHIP_POLARFIRE
This commit is contained in:
Stephen Boyd
@@ -1,58 +0,0 @@
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Device Tree Clock bindings for arch-at91
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This binding uses the common clock binding[1].
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[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
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Slow Clock controller:
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Required properties:
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- compatible : shall be one of the following:
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"atmel,at91sam9x5-sckc",
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"atmel,sama5d3-sckc",
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"atmel,sama5d4-sckc" or
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"microchip,sam9x60-sckc":
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at91 SCKC (Slow Clock Controller)
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- #clock-cells : shall be 1 for "microchip,sam9x60-sckc" otherwise shall be 0.
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- clocks : shall be the input parent clock phandle for the clock.
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Optional properties:
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- atmel,osc-bypass : boolean property. Set this when a clock signal is directly
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provided on XIN.
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For example:
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sckc@fffffe50 {
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compatible = "atmel,at91sam9x5-sckc";
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reg = <0xfffffe50 0x4>;
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clocks = <&slow_xtal>;
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#clock-cells = <0>;
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};
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Power Management Controller (PMC):
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Required properties:
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- compatible : shall be "atmel,<chip>-pmc", "syscon" or
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"microchip,sam9x60-pmc"
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<chip> can be: at91rm9200, at91sam9260, at91sam9261,
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at91sam9263, at91sam9g45, at91sam9n12, at91sam9rl, at91sam9g15,
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at91sam9g25, at91sam9g35, at91sam9x25, at91sam9x35, at91sam9x5,
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sama5d2, sama5d3 or sama5d4.
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- #clock-cells : from common clock binding; shall be set to 2. The first entry
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is the type of the clock (core, system, peripheral or generated) and the
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second entry its index as provided by the datasheet
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- clocks : Must contain an entry for each entry in clock-names.
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- clock-names: Must include the following entries: "slow_clk", "main_xtal"
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Optional properties:
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- atmel,osc-bypass : boolean property. Set this when a clock signal is directly
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provided on XIN.
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For example:
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pmc: pmc@f0018000 {
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compatible = "atmel,sama5d4-pmc", "syscon";
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reg = <0xf0018000 0x120>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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#clock-cells = <2>;
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clocks = <&clk32k>, <&main_xtal>;
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clock-names = "slow_clk", "main_xtal";
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};
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@@ -0,0 +1,154 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/atmel,at91rm9200-pmc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Atmel Power Management Controller (PMC)
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maintainers:
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- Claudiu Beznea <claudiu.beznea@microchip.com>
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description:
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The power management controller optimizes power consumption by controlling all
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system and user peripheral clocks. The PMC enables/disables the clock inputs
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to many of the peripherals and to the processor.
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properties:
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compatible:
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oneOf:
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- items:
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- const: atmel,at91sam9g20-pmc
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- const: atmel,at91sam9260-pmc
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- const: syscon
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- items:
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- enum:
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- atmel,at91sam9g15-pmc
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- atmel,at91sam9g25-pmc
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- atmel,at91sam9g35-pmc
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- atmel,at91sam9x25-pmc
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- atmel,at91sam9x35-pmc
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- const: atmel,at91sam9x5-pmc
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- const: syscon
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- items:
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- enum:
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- atmel,at91rm9200-pmc
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- atmel,at91sam9260-pmc
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- atmel,at91sam9g45-pmc
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- atmel,at91sam9n12-pmc
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- atmel,at91sam9rl-pmc
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- atmel,at91sam9x5-pmc
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- atmel,sama5d2-pmc
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- atmel,sama5d3-pmc
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- atmel,sama5d4-pmc
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- microchip,sam9x60-pmc
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- microchip,sama7g5-pmc
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- const: syscon
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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"#clock-cells":
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description: |
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- 1st cell is the clock type, one of PMC_TYPE_CORE, PMC_TYPE_SYSTEM,
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PMC_TYPE_PERIPHERAL, PMC_TYPE_GCK, PMC_TYPE_PROGRAMMABLE (as defined
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in <dt-bindings/clock/at91.h>)
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- 2nd cell is the clock identifier as defined in <dt-bindings/clock/at91.h
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(for core clocks) or as defined in datasheet (for system, peripheral,
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gck and programmable clocks).
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const: 2
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clocks:
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minItems: 2
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maxItems: 3
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clock-names:
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minItems: 2
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maxItems: 3
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atmel,osc-bypass:
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description: set when a clock signal is directly provided on XIN
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type: boolean
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required:
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- compatible
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- reg
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- interrupts
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- "#clock-cells"
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- clocks
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- clock-names
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- microchip,sam9x60-pmc
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- microchip,sama7g5-pmc
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then:
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properties:
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clocks:
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minItems: 3
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maxItems: 3
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clock-names:
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items:
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- const: td_slck
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- const: md_slck
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- const: main_xtal
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- if:
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properties:
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compatible:
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contains:
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enum:
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- atmel,at91rm9200-pmc
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- atmel,at91sam9260-pmc
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- atmel,at91sam9g20-pmc
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then:
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properties:
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clocks:
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minItems: 2
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maxItems: 2
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clock-names:
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items:
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- const: slow_xtal
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- const: main_xtal
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- if:
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properties:
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compatible:
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contains:
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enum:
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- atmel,sama5d2-pmc
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- atmel,sama5d3-pmc
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- atmel,sama5d4-pmc
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then:
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properties:
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clocks:
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minItems: 2
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maxItems: 2
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clock-names:
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items:
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- const: slow_clk
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- const: main_xtal
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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pmc: clock-controller@f0018000 {
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compatible = "atmel,sama5d4-pmc", "syscon";
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reg = <0xf0018000 0x120>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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#clock-cells = <2>;
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clocks = <&clk32k>, <&main_xtal>;
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clock-names = "slow_clk", "main_xtal";
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};
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...
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@@ -0,0 +1,70 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/atmel,at91sam9x5-sckc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Atmel Slow Clock Controller (SCKC)
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maintainers:
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- Claudiu Beznea <claudiu.beznea@microchip.com>
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properties:
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compatible:
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oneOf:
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- enum:
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- atmel,at91sam9x5-sckc
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- atmel,sama5d3-sckc
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- atmel,sama5d4-sckc
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- microchip,sam9x60-sckc
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- items:
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- const: microchip,sama7g5-sckc
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- const: microchip,sam9x60-sckc
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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"#clock-cells":
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enum: [0, 1]
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atmel,osc-bypass:
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type: boolean
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description: set when a clock signal is directly provided on XIN
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required:
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- compatible
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- reg
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- clocks
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- "#clock-cells"
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- microchip,sam9x60-sckc
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then:
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properties:
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"#clock-cells":
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const: 1
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else:
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properties:
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"#clock-cells":
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const: 0
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additionalProperties: false
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examples:
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- |
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clk32k: clock-controller@fffffe50 {
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compatible = "microchip,sam9x60-sckc";
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reg = <0xfffffe50 0x4>;
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clocks = <&slow_xtal>;
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#clock-cells = <1>;
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};
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...
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@@ -5,8 +5,8 @@ config COMMON_CLK_PIC32
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config MCHP_CLK_MPFS
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bool "Clk driver for PolarFire SoC"
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depends on SOC_MICROCHIP_POLARFIRE || COMPILE_TEST
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default SOC_MICROCHIP_POLARFIRE
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depends on ARCH_MICROCHIP_POLARFIRE || COMPILE_TEST
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default ARCH_MICROCHIP_POLARFIRE
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select AUXILIARY_BUS
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help
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Supports Clock Configuration for PolarFire SoC
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@@ -184,7 +184,7 @@ static int pic32mzda_clk_probe(struct platform_device *pdev)
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clks[UPLLCLK] = clk_register_fixed_rate(&pdev->dev, "usbphy_clk", NULL,
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0, 24000000);
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/* fixed rate (optional) clock */
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if (of_find_property(np, "microchip,pic32mzda-sosc", NULL)) {
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if (of_property_read_bool(np, "microchip,pic32mzda-sosc")) {
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pr_info("pic32-clk: dt requests SOSC.\n");
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clks[SOSCCLK] = pic32_sosc_clk_register(&sosc_clk, core);
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}
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