Merge tag 'sunxi-dt-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt
Allwinner SoC device tree changes for 6.11 This includes a commit shared with the clk tree. This commit adds clock and reset indices to the device tree binding, and thus is needed for both the device tree and driver changes. ARM64 device tree and binding-only changes - Add LRADC (low resolution ADC for resistor network based keys) for H616 SoC - Add cache information for A64, H6, and H616 SoCs - Correct model names and descriptions for Pine64 boards - Add GPADC (general purpose ADC) for H616 SoC - Add ADC joysticks based on GPADC for anbernic-rg35xx-h board - Add additional CPU OPPs for the H700 on top of existing H616 ones - Enable DVFS for rg35xx boards - Add IOMMU for H616 SoC RISC-V device tree changes - Add system LDOs to D1s/T113 SoC - Add ClockworkPi and DevTerm device trees * tag 'sunxi-dt-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: riscv: dts: allwinner: Add ClockworkPi and DevTerm devicetrees riscv: dts: allwinner: d1s-t113: Add system LDOs arm64: dts: allwinner: h616: add IOMMU node arm64: dts: allwinner: rg35xx: Enable DVFS CPU frequency scaling arm64: dts: allwinner: h616: add additional CPU OPPs for the H700 arm64: dts: allwinner: anbernic-rg35xx-h: Add ADC joysticks arm64: dts: allwinner: h616: Add GPADC device node dt-bindings: clock: sun50i-h616-ccu: Add GPADC clocks ARM: dts: sunxi: remove duplicated entries in makefile arm64: dts: allwinner: Add cache information to the SoC dtsi for H616 arm64: dts: allwinner: Add cache information to the SoC dtsi for A64 arm64: dts: allwinner: Correct the model names for Pine64 boards dt-bindings: arm: sunxi: Correct the descriptions for Pine64 boards arm64: dts: allwinner: Add cache information to the SoC dtsi for H6 ARM: dts: sun50i: Add LRADC node dt-bindings: input: sun4i-lradc-keys: Add H616 compatible Link: https://lore.kernel.org/r/ZoQa8r1N8yi7FlPV@wens.tw Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
@@ -708,12 +708,12 @@ properties:
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- const: olimex,a64-teres-i
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- const: allwinner,sun50i-a64
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- description: Pine64
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- description: Pine64 PINE A64
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items:
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- const: pine64,pine64
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- const: allwinner,sun50i-a64
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- description: Pine64+
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- description: Pine64 PINE A64+
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items:
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- const: pine64,pine64-plus
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- const: allwinner,sun50i-a64
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@@ -724,17 +724,17 @@ properties:
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- const: sochip,s3
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- const: allwinner,sun8i-v3
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- description: Pine64 PineH64 model A
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- description: Pine64 PINE H64 Model A
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items:
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- const: pine64,pine-h64
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- const: allwinner,sun50i-h6
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- description: Pine64 PineH64 model B
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- description: Pine64 PINE H64 Model B
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items:
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- const: pine64,pine-h64-model-b
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- const: allwinner,sun50i-h6
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- description: Pine64 LTS
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- description: Pine64 PINE A64 LTS
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items:
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- const: pine64,pine64-lts
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- const: allwinner,sun50i-r18
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@@ -763,17 +763,17 @@ properties:
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- const: pine64,pinephone
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- const: allwinner,sun50i-a64
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- description: Pine64 PineTab, Development Sample
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- description: Pine64 PineTab Developer Sample
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items:
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- const: pine64,pinetab
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- const: allwinner,sun50i-a64
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- description: Pine64 PineTab, Early Adopter's batch (and maybe later ones)
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- description: Pine64 PineTab Early Adopter
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items:
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- const: pine64,pinetab-early-adopter
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- const: allwinner,sun50i-a64
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- description: Pine64 SoPine Baseboard
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- description: Pine64 SOPINE
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items:
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- const: pine64,sopine-baseboard
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- const: pine64,sopine
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@@ -22,7 +22,9 @@ properties:
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- const: allwinner,sun8i-a83t-r-lradc
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- const: allwinner,sun50i-r329-lradc
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- items:
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- const: allwinner,sun20i-d1-lradc
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- enum:
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- allwinner,sun50i-h616-lradc
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- allwinner,sun20i-d1-lradc
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- const: allwinner,sun50i-r329-lradc
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reg:
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@@ -261,68 +261,6 @@ dtb-$(CONFIG_MACH_SUN8I) += \
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sun8i-v3s-licheepi-zero.dtb \
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sun8i-v3s-licheepi-zero-dock.dtb \
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sun8i-v40-bananapi-m2-berry.dtb
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dtb-$(CONFIG_MACH_SUN8I) += \
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sun8i-a23-evb.dtb \
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sun8i-a23-gt90h-v4.dtb \
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sun8i-a23-inet86dz.dtb \
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sun8i-a23-ippo-q8h-v5.dtb \
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sun8i-a23-ippo-q8h-v1.2.dtb \
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sun8i-a23-polaroid-mid2407pxe03.dtb \
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sun8i-a23-polaroid-mid2809pxe04.dtb \
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sun8i-a23-q8-tablet.dtb \
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sun8i-a33-et-q8-v1.6.dtb \
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sun8i-a33-ga10h-v1.1.dtb \
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sun8i-a33-inet-d978-rev2.dtb \
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sun8i-a33-ippo-q8h-v1.2.dtb \
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sun8i-a33-olinuxino.dtb \
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sun8i-a33-q8-tablet.dtb \
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sun8i-a33-sinlinx-sina33.dtb \
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sun8i-a83t-allwinner-h8homlet-v2.dtb \
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sun8i-a83t-bananapi-m3.dtb \
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sun8i-a83t-cubietruck-plus.dtb \
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sun8i-a83t-tbs-a711.dtb \
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sun8i-h2-plus-bananapi-m2-zero.dtb \
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sun8i-h2-plus-libretech-all-h3-cc.dtb \
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sun8i-h2-plus-orangepi-r1.dtb \
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sun8i-h2-plus-orangepi-zero.dtb \
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sun8i-h3-bananapi-m2-plus.dtb \
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sun8i-h3-bananapi-m2-plus-v1.2.dtb \
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sun8i-h3-beelink-x2.dtb \
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sun8i-h3-libretech-all-h3-cc.dtb \
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sun8i-h3-mapleboard-mp130.dtb \
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sun8i-h3-nanopi-duo2.dtb \
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sun8i-h3-nanopi-m1.dtb\
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\
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sun8i-h3-nanopi-m1-plus.dtb \
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sun8i-h3-nanopi-neo.dtb \
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sun8i-h3-nanopi-neo-air.dtb \
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sun8i-h3-nanopi-r1.dtb \
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sun8i-h3-orangepi-2.dtb \
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sun8i-h3-orangepi-lite.dtb \
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sun8i-h3-orangepi-one.dtb \
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sun8i-h3-orangepi-pc.dtb \
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sun8i-h3-orangepi-pc-plus.dtb \
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sun8i-h3-orangepi-plus.dtb \
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sun8i-h3-orangepi-plus2e.dtb \
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sun8i-h3-orangepi-zero-plus2.dtb \
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sun8i-h3-rervision-dvk.dtb \
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sun8i-h3-zeropi.dtb \
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sun8i-h3-emlid-neutis-n5h3-devboard.dtb \
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sun8i-r16-bananapi-m2m.dtb \
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sun8i-r16-nintendo-nes-classic.dtb \
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sun8i-r16-nintendo-super-nes-classic.dtb \
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sun8i-r16-parrot.dtb \
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sun8i-r40-bananapi-m2-ultra.dtb \
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sun8i-r40-oka40i-c.dtb \
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sun8i-s3-elimo-initium.dtb \
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sun8i-s3-lichee-zero-plus.dtb \
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sun8i-s3-pinecube.dtb \
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sun8i-t113s-mangopi-mq-r-t113.dtb \
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sun8i-t3-cqa3t-bv3.dtb \
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sun8i-v3-sl631-imx179.dtb \
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sun8i-v3s-licheepi-zero.dtb \
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sun8i-v3s-licheepi-zero-dock.dtb \
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sun8i-v40-bananapi-m2-berry.dtb
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dtb-$(CONFIG_MACH_SUN9I) += \
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sun9i-a80-optimus.dtb \
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sun9i-a80-cubieboard4.dtb
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@@ -5,7 +5,7 @@
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#include "sun50i-a64-sopine-baseboard.dts"
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/ {
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model = "Pine64 LTS";
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model = "Pine64 PINE A64 LTS";
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compatible = "pine64,pine64-lts", "allwinner,sun50i-r18",
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"allwinner,sun50i-a64";
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@@ -4,7 +4,7 @@
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#include "sun50i-a64-pine64.dts"
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/ {
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model = "Pine64+";
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model = "Pine64 PINE A64+";
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compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
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/* TODO: Camera, touchscreen, etc. */
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@@ -9,7 +9,7 @@
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Pine64";
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model = "Pine64 PINE A64";
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compatible = "pine64,pine64", "allwinner,sun50i-a64";
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aliases {
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@@ -13,7 +13,7 @@
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#include <dt-bindings/pwm/pwm.h>
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/ {
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model = "Pinebook";
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model = "Pine64 Pinebook";
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compatible = "pine64,pinebook", "allwinner,sun50i-a64";
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chassis-type = "laptop";
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@@ -9,7 +9,7 @@
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#include "sun50i-a64-pinetab.dts"
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/ {
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model = "PineTab, Early Adopter's version";
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model = "Pine64 PineTab Early Adopter";
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compatible = "pine64,pinetab-early-adopter", "allwinner,sun50i-a64";
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};
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@@ -14,7 +14,7 @@
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#include <dt-bindings/pwm/pwm.h>
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/ {
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model = "PineTab, Development Sample";
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model = "Pine64 PineTab Developer Sample";
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compatible = "pine64,pinetab", "allwinner,sun50i-a64";
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chassis-type = "tablet";
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@@ -8,7 +8,7 @@
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#include "sun50i-a64-sopine.dtsi"
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/ {
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model = "SoPine with baseboard";
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model = "Pine64 SOPINE on Baseboard carrier board";
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compatible = "pine64,sopine-baseboard", "pine64,sopine",
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"allwinner,sun50i-a64";
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@@ -51,10 +51,16 @@
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device_type = "cpu";
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reg = <0>;
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enable-method = "psci";
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next-level-cache = <&L2>;
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clocks = <&ccu CLK_CPUX>;
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clock-names = "cpu";
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#cooling-cells = <2>;
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i-cache-size = <0x8000>;
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i-cache-line-size = <64>;
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i-cache-sets = <256>;
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d-cache-size = <0x8000>;
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d-cache-line-size = <64>;
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d-cache-sets = <128>;
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next-level-cache = <&l2_cache>;
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};
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cpu1: cpu@1 {
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@@ -62,10 +68,16 @@
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device_type = "cpu";
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reg = <1>;
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enable-method = "psci";
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next-level-cache = <&L2>;
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clocks = <&ccu CLK_CPUX>;
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clock-names = "cpu";
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#cooling-cells = <2>;
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i-cache-size = <0x8000>;
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i-cache-line-size = <64>;
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i-cache-sets = <256>;
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d-cache-size = <0x8000>;
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d-cache-line-size = <64>;
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d-cache-sets = <128>;
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next-level-cache = <&l2_cache>;
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};
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cpu2: cpu@2 {
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@@ -73,10 +85,16 @@
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device_type = "cpu";
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reg = <2>;
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enable-method = "psci";
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next-level-cache = <&L2>;
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clocks = <&ccu CLK_CPUX>;
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clock-names = "cpu";
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#cooling-cells = <2>;
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i-cache-size = <0x8000>;
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i-cache-line-size = <64>;
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i-cache-sets = <256>;
|
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d-cache-size = <0x8000>;
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d-cache-line-size = <64>;
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d-cache-sets = <128>;
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next-level-cache = <&l2_cache>;
|
||||
};
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||||
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cpu3: cpu@3 {
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@@ -84,16 +102,25 @@
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||||
device_type = "cpu";
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reg = <3>;
|
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enable-method = "psci";
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next-level-cache = <&L2>;
|
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clocks = <&ccu CLK_CPUX>;
|
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clock-names = "cpu";
|
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#cooling-cells = <2>;
|
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i-cache-size = <0x8000>;
|
||||
i-cache-line-size = <64>;
|
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i-cache-sets = <256>;
|
||||
d-cache-size = <0x8000>;
|
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d-cache-line-size = <64>;
|
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d-cache-sets = <128>;
|
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next-level-cache = <&l2_cache>;
|
||||
};
|
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|
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L2: l2-cache {
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l2_cache: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
cache-unified;
|
||||
cache-size = <0x80000>;
|
||||
cache-line-size = <64>;
|
||||
cache-sets = <512>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
/delete-node/ ®_gmac_3v3;
|
||||
|
||||
/ {
|
||||
model = "Pine H64 model B";
|
||||
model = "Pine64 PINE H64 Model B";
|
||||
compatible = "pine64,pine-h64-model-b", "allwinner,sun50i-h6";
|
||||
|
||||
wifi_pwrseq: pwrseq {
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/ {
|
||||
model = "Pine H64 model A";
|
||||
model = "Pine64 PINE H64 Model A";
|
||||
compatible = "pine64,pine-h64", "allwinner,sun50i-h6";
|
||||
|
||||
aliases {
|
||||
|
||||
@@ -29,6 +29,13 @@
|
||||
clocks = <&ccu CLK_CPUX>;
|
||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
#cooling-cells = <2>;
|
||||
i-cache-size = <0x8000>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
d-cache-size = <0x8000>;
|
||||
d-cache-line-size = <64>;
|
||||
d-cache-sets = <128>;
|
||||
next-level-cache = <&l2_cache>;
|
||||
};
|
||||
|
||||
cpu1: cpu@1 {
|
||||
@@ -39,6 +46,13 @@
|
||||
clocks = <&ccu CLK_CPUX>;
|
||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
#cooling-cells = <2>;
|
||||
i-cache-size = <0x8000>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
d-cache-size = <0x8000>;
|
||||
d-cache-line-size = <64>;
|
||||
d-cache-sets = <128>;
|
||||
next-level-cache = <&l2_cache>;
|
||||
};
|
||||
|
||||
cpu2: cpu@2 {
|
||||
@@ -49,6 +63,13 @@
|
||||
clocks = <&ccu CLK_CPUX>;
|
||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
#cooling-cells = <2>;
|
||||
i-cache-size = <0x8000>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
d-cache-size = <0x8000>;
|
||||
d-cache-line-size = <64>;
|
||||
d-cache-sets = <128>;
|
||||
next-level-cache = <&l2_cache>;
|
||||
};
|
||||
|
||||
cpu3: cpu@3 {
|
||||
@@ -59,6 +80,22 @@
|
||||
clocks = <&ccu CLK_CPUX>;
|
||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
#cooling-cells = <2>;
|
||||
i-cache-size = <0x8000>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
d-cache-size = <0x8000>;
|
||||
d-cache-line-size = <64>;
|
||||
d-cache-sets = <128>;
|
||||
next-level-cache = <&l2_cache>;
|
||||
};
|
||||
|
||||
l2_cache: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
cache-unified;
|
||||
cache-size = <0x80000>;
|
||||
cache-line-size = <64>;
|
||||
cache-sets = <512>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
opp-hz = /bits/ 64 <480000000>;
|
||||
opp-microvolt = <900000>;
|
||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
opp-supported-hw = <0x1f>;
|
||||
opp-supported-hw = <0x3f>;
|
||||
};
|
||||
|
||||
opp-600000000 {
|
||||
@@ -25,7 +25,7 @@
|
||||
opp-hz = /bits/ 64 <720000000>;
|
||||
opp-microvolt = <900000>;
|
||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
opp-supported-hw = <0x0d>;
|
||||
opp-supported-hw = <0x2d>;
|
||||
};
|
||||
|
||||
opp-792000000 {
|
||||
@@ -50,8 +50,16 @@
|
||||
opp-microvolt-speed2 = <950000>;
|
||||
opp-microvolt-speed3 = <950000>;
|
||||
opp-microvolt-speed4 = <1020000>;
|
||||
opp-microvolt-speed5 = <900000>;
|
||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
opp-supported-hw = <0x1f>;
|
||||
opp-supported-hw = <0x3f>;
|
||||
};
|
||||
|
||||
opp-1032000000 {
|
||||
opp-hz = /bits/ 64 <1032000000>;
|
||||
opp-microvolt = <900000>;
|
||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
opp-supported-hw = <0x20>;
|
||||
};
|
||||
|
||||
opp-1104000000 {
|
||||
@@ -59,8 +67,9 @@
|
||||
opp-microvolt-speed0 = <1000000>;
|
||||
opp-microvolt-speed2 = <1000000>;
|
||||
opp-microvolt-speed3 = <1000000>;
|
||||
opp-microvolt-speed5 = <950000>;
|
||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
opp-supported-hw = <0x0d>;
|
||||
opp-supported-hw = <0x2d>;
|
||||
};
|
||||
|
||||
opp-1200000000 {
|
||||
@@ -70,8 +79,9 @@
|
||||
opp-microvolt-speed2 = <1050000>;
|
||||
opp-microvolt-speed3 = <1050000>;
|
||||
opp-microvolt-speed4 = <1100000>;
|
||||
opp-microvolt-speed5 = <1020000>;
|
||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
opp-supported-hw = <0x1f>;
|
||||
opp-supported-hw = <0x3f>;
|
||||
};
|
||||
|
||||
opp-1320000000 {
|
||||
@@ -85,15 +95,16 @@
|
||||
opp-hz = /bits/ 64 <1416000000>;
|
||||
opp-microvolt = <1100000>;
|
||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
opp-supported-hw = <0x0d>;
|
||||
opp-supported-hw = <0x2d>;
|
||||
};
|
||||
|
||||
opp-1512000000 {
|
||||
opp-hz = /bits/ 64 <1512000000>;
|
||||
opp-microvolt-speed1 = <1100000>;
|
||||
opp-microvolt-speed3 = <1100000>;
|
||||
opp-microvolt-speed5 = <1160000>;
|
||||
clock-latency-ns = <244144>; /* 8 32k periods */
|
||||
opp-supported-hw = <0x0a>;
|
||||
opp-supported-hw = <0x2a>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -27,6 +27,13 @@
|
||||
enable-method = "psci";
|
||||
clocks = <&ccu CLK_CPUX>;
|
||||
#cooling-cells = <2>;
|
||||
i-cache-size = <0x8000>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
d-cache-size = <0x8000>;
|
||||
d-cache-line-size = <64>;
|
||||
d-cache-sets = <128>;
|
||||
next-level-cache = <&l2_cache>;
|
||||
};
|
||||
|
||||
cpu1: cpu@1 {
|
||||
@@ -36,6 +43,13 @@
|
||||
enable-method = "psci";
|
||||
clocks = <&ccu CLK_CPUX>;
|
||||
#cooling-cells = <2>;
|
||||
i-cache-size = <0x8000>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
d-cache-size = <0x8000>;
|
||||
d-cache-line-size = <64>;
|
||||
d-cache-sets = <128>;
|
||||
next-level-cache = <&l2_cache>;
|
||||
};
|
||||
|
||||
cpu2: cpu@2 {
|
||||
@@ -45,6 +59,13 @@
|
||||
enable-method = "psci";
|
||||
clocks = <&ccu CLK_CPUX>;
|
||||
#cooling-cells = <2>;
|
||||
i-cache-size = <0x8000>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
d-cache-size = <0x8000>;
|
||||
d-cache-line-size = <64>;
|
||||
d-cache-sets = <128>;
|
||||
next-level-cache = <&l2_cache>;
|
||||
};
|
||||
|
||||
cpu3: cpu@3 {
|
||||
@@ -54,6 +75,22 @@
|
||||
enable-method = "psci";
|
||||
clocks = <&ccu CLK_CPUX>;
|
||||
#cooling-cells = <2>;
|
||||
i-cache-size = <0x8000>;
|
||||
i-cache-line-size = <64>;
|
||||
i-cache-sets = <256>;
|
||||
d-cache-size = <0x8000>;
|
||||
d-cache-line-size = <64>;
|
||||
d-cache-sets = <128>;
|
||||
next-level-cache = <&l2_cache>;
|
||||
};
|
||||
|
||||
l2_cache: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
cache-unified;
|
||||
cache-size = <0x40000>;
|
||||
cache-line-size = <64>;
|
||||
cache-sets = <256>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -306,6 +343,15 @@
|
||||
#interrupt-cells = <3>;
|
||||
};
|
||||
|
||||
iommu: iommu@30f0000 {
|
||||
compatible = "allwinner,sun50i-h616-iommu";
|
||||
reg = <0x030f0000 0x10000>;
|
||||
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&ccu CLK_BUS_IOMMU>;
|
||||
resets = <&ccu RST_BUS_IOMMU>;
|
||||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
mmc0: mmc@4020000 {
|
||||
compatible = "allwinner,sun50i-h616-mmc",
|
||||
"allwinner,sun50i-a100-mmc";
|
||||
@@ -589,6 +635,17 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpadc: adc@5070000 {
|
||||
compatible = "allwinner,sun50i-h616-gpadc",
|
||||
"allwinner,sun20i-d1-gpadc";
|
||||
reg = <0x05070000 0x400>;
|
||||
clocks = <&ccu CLK_BUS_GPADC>;
|
||||
resets = <&ccu RST_BUS_GPADC>;
|
||||
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
#io-channel-cells = <1>;
|
||||
};
|
||||
|
||||
ths: thermal-sensor@5070400 {
|
||||
compatible = "allwinner,sun50i-h616-ths";
|
||||
reg = <0x05070400 0x400>;
|
||||
@@ -602,6 +659,16 @@
|
||||
#thermal-sensor-cells = <1>;
|
||||
};
|
||||
|
||||
lradc: lradc@5070800 {
|
||||
compatible = "allwinner,sun50i-h616-lradc",
|
||||
"allwinner,sun50i-r329-lradc";
|
||||
reg = <0x05070800 0x400>;
|
||||
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&ccu CLK_BUS_KEYADC>;
|
||||
resets = <&ccu RST_BUS_KEYADC>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbotg: usb@5100000 {
|
||||
compatible = "allwinner,sun50i-h616-musb",
|
||||
"allwinner,sun8i-h3-musb";
|
||||
|
||||
@@ -6,7 +6,7 @@
|
||||
/dts-v1/;
|
||||
|
||||
#include "sun50i-h616.dtsi"
|
||||
|
||||
#include "sun50i-h616-cpu-opp.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
@@ -221,7 +221,7 @@
|
||||
reg_dcdc1: dcdc1 {
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1160000>;
|
||||
regulator-name = "vdd-cpu";
|
||||
};
|
||||
|
||||
|
||||
@@ -9,6 +9,78 @@
|
||||
/ {
|
||||
model = "Anbernic RG35XX H";
|
||||
compatible = "anbernic,rg35xx-h", "allwinner,sun50i-h700";
|
||||
|
||||
adc-joystick {
|
||||
compatible = "adc-joystick";
|
||||
io-channels = <&adc_mux 0>,
|
||||
<&adc_mux 1>,
|
||||
<&adc_mux 2>,
|
||||
<&adc_mux 3>;
|
||||
pinctrl-0 = <&joy_mux_pin>;
|
||||
pinctrl-names = "default";
|
||||
poll-interval = <60>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
axis@0 {
|
||||
reg = <0>;
|
||||
abs-flat = <32>;
|
||||
abs-fuzz = <32>;
|
||||
abs-range = <4096 0>;
|
||||
linux,code = <ABS_X>;
|
||||
};
|
||||
|
||||
axis@1 {
|
||||
reg = <1>;
|
||||
abs-flat = <32>;
|
||||
abs-fuzz = <32>;
|
||||
abs-range = <0 4096>;
|
||||
linux,code = <ABS_Y>;
|
||||
};
|
||||
|
||||
axis@2 {
|
||||
reg = <2>;
|
||||
abs-flat = <32>;
|
||||
abs-fuzz = <32>;
|
||||
abs-range = <0 4096>;
|
||||
linux,code = <ABS_RX>;
|
||||
};
|
||||
|
||||
axis@3 {
|
||||
reg = <3>;
|
||||
abs-flat = <32>;
|
||||
abs-fuzz = <32>;
|
||||
abs-range = <4096 0>;
|
||||
linux,code = <ABS_RY>;
|
||||
};
|
||||
};
|
||||
|
||||
adc_mux: adc-mux {
|
||||
compatible = "io-channel-mux";
|
||||
channels = "left_x", "left_y", "right_x", "right_y";
|
||||
#io-channel-cells = <1>;
|
||||
io-channels = <&gpadc 0>;
|
||||
io-channel-names = "parent";
|
||||
mux-controls = <&gpio_mux>;
|
||||
settle-time-us = <100>;
|
||||
};
|
||||
|
||||
gpio_mux: mux-controller {
|
||||
compatible = "gpio-mux";
|
||||
mux-gpios = <&pio 8 1 GPIO_ACTIVE_LOW>,
|
||||
<&pio 8 2 GPIO_ACTIVE_LOW>;
|
||||
#mux-control-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpadc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
channel@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio_keys_gamepad {
|
||||
@@ -34,3 +106,10 @@
|
||||
&ohci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pio {
|
||||
joy_mux_pin: joy-mux-pin {
|
||||
pins = "PI0";
|
||||
function = "gpio_out";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1,4 +1,6 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-clockworkpi-v3.14.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-devterm-v3.14.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-dongshan-nezha-stu.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-86-panel-480p.dtb
|
||||
dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-86-panel-720p.dtb
|
||||
|
||||
@@ -0,0 +1,252 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
|
||||
// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "sun20i-d1.dtsi"
|
||||
#include "sun20i-common-regulators.dtsi"
|
||||
|
||||
/ {
|
||||
model = "ClockworkPi v3.14 (R-01)";
|
||||
compatible = "clockwork,r-01-clockworkpi-v3.14", "allwinner,sun20i-d1";
|
||||
|
||||
aliases {
|
||||
ethernet0 = &ap6256;
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
/*
|
||||
* This regulator is PWM-controlled, but the PWM controller is not
|
||||
* yet supported, so fix the regulator to its default voltage.
|
||||
*/
|
||||
reg_vdd_cpu: vdd-cpu {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd-cpu";
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
vin-supply = <®_vcc>;
|
||||
};
|
||||
|
||||
wifi_pwrseq: wifi-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&pio 6 11 GPIO_ACTIVE_LOW>; /* PG11/GPIO3 */
|
||||
};
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu-supply = <®_vdd_cpu>;
|
||||
};
|
||||
|
||||
&dcxo {
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
|
||||
&ehci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-0 = <&i2c0_pb10_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
axp221: pmic@34 {
|
||||
compatible = "x-powers,axp228", "x-powers,axp221";
|
||||
reg = <0x34>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <4 9 IRQ_TYPE_LEVEL_LOW>; /* PE9/GPIO2 */
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
ac_power_supply: ac-power {
|
||||
compatible = "x-powers,axp221-ac-power-supply";
|
||||
};
|
||||
|
||||
axp_adc: adc {
|
||||
compatible = "x-powers,axp221-adc";
|
||||
#io-channel-cells = <1>;
|
||||
};
|
||||
|
||||
battery_power_supply: battery-power {
|
||||
compatible = "x-powers,axp221-battery-power-supply";
|
||||
};
|
||||
|
||||
axp_gpio: gpio {
|
||||
compatible = "x-powers,axp221-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
regulators {
|
||||
x-powers,dcdc-freq = <3000>;
|
||||
|
||||
reg_dcdc1: dcdc1 {
|
||||
regulator-name = "sys-3v3";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
reg_dcdc3: dcdc3 {
|
||||
regulator-name = "sys-1v8";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
reg_aldo1: aldo1 {
|
||||
regulator-name = "aud-3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
reg_aldo2: aldo2 {
|
||||
regulator-name = "disp-3v3";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
reg_aldo3: aldo3 {
|
||||
regulator-name = "vdd-wifi";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
/* DLDO1 and ELDO1-3 are connected in parallel. */
|
||||
reg_dldo1: dldo1 {
|
||||
regulator-name = "vbat-wifi-a";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
/* DLDO2-DLDO4 are connected in parallel. */
|
||||
reg_dldo2: dldo2 {
|
||||
regulator-name = "vcc-3v3-ext-a";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
reg_dldo3: dldo3 {
|
||||
regulator-name = "vcc-3v3-ext-b";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
reg_dldo4: dldo4 {
|
||||
regulator-name = "vcc-3v3-ext-c";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
reg_eldo1: eldo1 {
|
||||
regulator-name = "vbat-wifi-b";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
reg_eldo2: eldo2 {
|
||||
regulator-name = "vbat-wifi-c";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
reg_eldo3: eldo3 {
|
||||
regulator-name = "vbat-wifi-d";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
usb_power_supply: usb-power {
|
||||
compatible = "x-powers,axp221-usb-power-supply";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mmc0 {
|
||||
broken-cd;
|
||||
bus-width = <4>;
|
||||
disable-wp;
|
||||
vmmc-supply = <®_dcdc1>;
|
||||
vqmmc-supply = <®_vcc_3v3>;
|
||||
pinctrl-0 = <&mmc0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
bus-width = <4>;
|
||||
mmc-pwrseq = <&wifi_pwrseq>;
|
||||
non-removable;
|
||||
vmmc-supply = <®_dldo1>;
|
||||
vqmmc-supply = <®_aldo3>;
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
ap6256: wifi@1 {
|
||||
compatible = "brcm,bcm43456-fmac", "brcm,bcm4329-fmac";
|
||||
reg = <1>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10/GPIO4 */
|
||||
interrupt-names = "host-wake";
|
||||
};
|
||||
};
|
||||
|
||||
&ohci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pio {
|
||||
vcc-pg-supply = <®_ldoa>;
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-0 = <&uart0_pb8_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
uart-has-rtscts;
|
||||
pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "brcm,bcm4345c5";
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <6 17 IRQ_TYPE_LEVEL_HIGH>; /* PG17/GPIO6 */
|
||||
device-wakeup-gpios = <&pio 6 16 GPIO_ACTIVE_HIGH>; /* PG16/GPIO7 */
|
||||
shutdown-gpios = <&pio 6 18 GPIO_ACTIVE_HIGH>; /* PG18/GPIO5 */
|
||||
max-speed = <1500000>;
|
||||
vbat-supply = <®_dldo1>;
|
||||
vddio-supply = <®_aldo3>;
|
||||
};
|
||||
};
|
||||
|
||||
&usb_otg {
|
||||
dr_mode = "peripheral";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphy {
|
||||
usb0_vbus_power-supply = <&ac_power_supply>;
|
||||
usb1_vbus-supply = <®_vcc>;
|
||||
status = "okay";
|
||||
};
|
||||
@@ -0,0 +1,36 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
|
||||
// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
|
||||
|
||||
#include "sun20i-d1-clockworkpi-v3.14.dts"
|
||||
|
||||
/ {
|
||||
model = "Clockwork DevTerm (R-01)";
|
||||
compatible = "clockwork,r-01-devterm-v3.14",
|
||||
"clockwork,r-01-clockworkpi-v3.14",
|
||||
"allwinner,sun20i-d1";
|
||||
|
||||
fan {
|
||||
compatible = "gpio-fan";
|
||||
gpios = <&pio 3 10 GPIO_ACTIVE_HIGH>; /* PD10/GPIO41 */
|
||||
gpio-fan,speed-map = <0 0>,
|
||||
<6000 1>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
i2c-gpio-0 {
|
||||
compatible = "i2c-gpio";
|
||||
sda-gpios = <&pio 3 14 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; /* PD14/GPIO44 */
|
||||
scl-gpios = <&pio 3 15 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; /* PD15/GPIO45 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc@54 {
|
||||
compatible = "ti,adc101c";
|
||||
reg = <0x54>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <4 12 IRQ_TYPE_LEVEL_LOW>; /* PE12/GPIO35 */
|
||||
vref-supply = <®_dldo2>;
|
||||
#io-channel-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -396,6 +396,17 @@
|
||||
ranges;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
regulators@3000150 {
|
||||
compatible = "allwinner,sun20i-d1-system-ldos";
|
||||
reg = <0x3000150 0x4>;
|
||||
|
||||
reg_ldoa: ldoa {
|
||||
};
|
||||
|
||||
reg_ldob: ldob {
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
dma: dma-controller@3002000 {
|
||||
|
||||
@@ -112,5 +112,6 @@
|
||||
#define CLK_HDCP 126
|
||||
#define CLK_BUS_HDCP 127
|
||||
#define CLK_PLL_SYSTEM_32K 128
|
||||
#define CLK_BUS_GPADC 129
|
||||
|
||||
#endif /* _DT_BINDINGS_CLK_SUN50I_H616_H_ */
|
||||
|
||||
@@ -66,5 +66,6 @@
|
||||
#define RST_BUS_TVE0 57
|
||||
#define RST_BUS_HDCP 58
|
||||
#define RST_BUS_KEYADC 59
|
||||
#define RST_BUS_GPADC 60
|
||||
|
||||
#endif /* _DT_BINDINGS_RESET_SUN50I_H616_H_ */
|
||||
|
||||
Reference in New Issue
Block a user