wifi: rtw89: mac: update RTS threshold according to chip gen
When TX size or time of packet over RTS threshold set by this register, hardware will use RTS protection automatically. Since WiFi 6 and 7 chips have different register address for this, separate the address according to chip gen. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20231012021455.19816-2-pkshih@realtek.com
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committed by
Kalle Valo
parent
4619088252
commit
fbd1829d29
@@ -4840,6 +4840,7 @@ void rtw89_mac_update_rts_threshold(struct rtw89_dev *rtwdev, u8 mac_idx)
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#define MAC_AX_LEN_TH_MAX 255
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#define MAC_AX_TIME_TH_DEF 88
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#define MAC_AX_LEN_TH_DEF 4080
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const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
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struct ieee80211_hw *hw = rtwdev->hw;
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u32 rts_threshold = hw->wiphy->rts_threshold;
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u32 time_th, len_th;
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@@ -4856,7 +4857,7 @@ void rtw89_mac_update_rts_threshold(struct rtw89_dev *rtwdev, u8 mac_idx)
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time_th = min_t(u32, time_th >> MAC_AX_TIME_TH_SH, MAC_AX_TIME_TH_MAX);
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len_th = min_t(u32, len_th >> MAC_AX_LEN_TH_SH, MAC_AX_LEN_TH_MAX);
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reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_AGG_LEN_HT_0, mac_idx);
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reg = rtw89_mac_reg_by_idx(rtwdev, mac->agg_len_ht, mac_idx);
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rtw89_write16_mask(rtwdev, reg, B_AX_RTS_TXTIME_TH_MASK, time_th);
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rtw89_write16_mask(rtwdev, reg, B_AX_RTS_LEN_TH_MASK, len_th);
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}
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@@ -5751,6 +5752,7 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_ax = {
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.mem_base_addrs = rtw89_mac_mem_base_addrs_ax,
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.rx_fltr = R_AX_RX_FLTR_OPT,
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.port_base = &rtw89_port_base_ax,
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.agg_len_ht = R_AX_AGG_LEN_HT_0,
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.disable_cpu = rtw89_mac_disable_cpu_ax,
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.fwdl_enable_wcpu = rtw89_mac_enable_cpu_ax,
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@@ -859,6 +859,7 @@ struct rtw89_mac_gen_def {
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const u32 *mem_base_addrs;
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u32 rx_fltr;
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const struct rtw89_port_reg *port_base;
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u32 agg_len_ht;
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void (*disable_cpu)(struct rtw89_dev *rtwdev);
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int (*fwdl_enable_wcpu)(struct rtw89_dev *rtwdev, u8 boot_reason,
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@@ -250,6 +250,7 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_be = {
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.mem_base_addrs = rtw89_mac_mem_base_addrs_be,
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.rx_fltr = R_BE_RX_FLTR_OPT,
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.port_base = &rtw89_port_base_be,
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.agg_len_ht = R_BE_AGG_LEN_HT_0,
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.disable_cpu = rtw89_mac_disable_cpu_be,
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.fwdl_enable_wcpu = rtw89_mac_fwdl_enable_wcpu_be,
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@@ -3894,6 +3894,12 @@
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#define R_BE_PORT_HGQ_WINDOW_CFG 0x105A0
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#define R_BE_PORT_HGQ_WINDOW_CFG_C1 0x145A0
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#define R_BE_AGG_LEN_HT_0 0x10814
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#define R_BE_AGG_LEN_HT_0_C1 0x14814
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#define B_BE_AMPDU_MAX_LEN_HT_MASK GENMASK(31, 16)
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#define B_BE_RTS_TXTIME_TH_MASK GENMASK(15, 8)
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#define B_BE_RTS_LEN_TH_MASK GENMASK(7, 0)
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#define R_BE_MBSSID_DROP_0 0x1083C
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#define R_BE_MBSSID_DROP_0_C1 0x1483C
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#define B_BE_GI_LTF_FB_SEL BIT(30)
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