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arm64: dts: amlogic: setup hdmi system clock

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BugLink: https://bugs.launchpad.net/bugs/2083196

[ Upstream commit 1443b6ea806dfcdcee6c894784332c9c947ac319 ]

HDMI Tx needs the system clock set on the xtal rate.
This clock is managed by the main clock controller of the related SoCs.

Currently 2 part of the display drivers race to setup the HDMI system
clock by directly poking the controller register. The clock API should
be used to setup the rate instead.

Use assigned-clock to setup the HDMI system clock.

Fixes: 6939db7e0d ("ARM64: dts: meson-gx: Add support for HDMI output")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20240626152733.1350376-3-jbrunet@baylibre.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Signed-off-by: Portia Stephens <portia.stephens@canonical.com>
Signed-off-by: Roxana Nicolescu <roxana.nicolescu@canonical.com>
This commit is contained in:
Jerome Brunet
2024-06-26 17:27:31 +02:00
committed by Mehmet Basaran
parent 1e33886d86
commit f457eebd08
3 changed files with 15 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+5
View File
@@ -215,6 +215,11 @@
#sound-dai-cells = <0>;
status = "disabled";
assigned-clocks = <&clkc CLKID_HDMI_SEL>,
<&clkc CLKID_HDMI>;
assigned-clock-parents = <&xtal>, <0>;
assigned-clock-rates = <0>, <24000000>;
/* VPU VENC Input */
hdmi_tx_venc_port: port@0 {
reg = <0>;
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+5
View File
@@ -316,6 +316,11 @@
<&clkc CLKID_GCLK_VENCI_INT0>;
clock-names = "isfr", "iahb", "venci";
power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
assigned-clocks = <&clkc CLKID_HDMI_SEL>,
<&clkc CLKID_HDMI>;
assigned-clock-parents = <&xtal>, <0>;
assigned-clock-rates = <0>, <24000000>;
};
&sysctrl {
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
+5
View File
@@ -328,6 +328,11 @@
<&clkc CLKID_GCLK_VENCI_INT0>;
clock-names = "isfr", "iahb", "venci";
power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
assigned-clocks = <&clkc CLKID_HDMI_SEL>,
<&clkc CLKID_HDMI>;
assigned-clock-parents = <&xtal>, <0>;
assigned-clock-rates = <0>, <24000000>;
};
&sysctrl {