clocksource/drivers/timer-tegra186: Remove unused bits

The intention to keep the unsed if(0) block is gone now. Remove
them for clean codes.

Signed-off-by: robelin <robelin@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20250507044311.3751033-4-robelin@nvidia.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
(cherry picked from commit 39b27ddf4d680fc908b2fc788039406e2e1c4601)

Bug 5391604

Change-Id: I5af38e4cf2ac8d1a3cadffca2176408a4b61bfc5
Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/3rdparty/canonical/linux-noble/+/3422018
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
robelin
2025-05-07 12:43:11 +08:00
committed by mobile promotions
parent 843d04edc8
commit e2e1186972
-9
View File
@@ -174,15 +174,6 @@ static void tegra186_wdt_enable(struct tegra186_wdt *wdt)
value &= ~WDTCR_PERIOD_MASK;
value |= WDTCR_PERIOD(1);
/* enable local FIQ and remote interrupt for debug dump */
if (0)
value |= WDTCR_REMOTE_INT_ENABLE |
WDTCR_LOCAL_FIQ_ENABLE;
/* enable system debug reset (doesn't properly reboot) */
if (0)
value |= WDTCR_SYSTEM_DEBUG_RESET_ENABLE;
/* enable system POR reset */
value |= WDTCR_SYSTEM_POR_RESET_ENABLE;