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drivers/perf: riscv: Align errno for unsupported perf event

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BugLink: https://bugs.launchpad.net/bugs/2089884

commit c625154993d0d24a962b1830cd5ed92adda2cf86 upstream.

RISC-V perf driver does not yet support PERF_TYPE_BREAKPOINT. It would
be more appropriate to return -EOPNOTSUPP or -ENOENT for this type in
pmu_sbi_event_map. Considering that other implementations return -ENOENT
for unsupported perf types, let's synchronize this behavior. Due to this
reason, a riscv bpf testcases perf_skip fail. Meanwhile, align that
behavior to the rest of proper place.

Signed-off-by: Pu Lehui <pulehui@huawei.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Fixes: 9b3e150e31 ("RISC-V: Add a simple platform driver for RISC-V legacy perf")
Fixes: 16d3b1af0944 ("perf: RISC-V: Check standard event availability")
Fixes: e999143459 ("RISC-V: Add perf platform driver based on SBI PMU extension")
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20240831071520.1630360-1-pulehui@huaweicloud.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[koichiroden: dropped a hunk for pmu_sbi_check_event() since one Fixes
target commit 16d3b1af0944 ("perf: RISC-V: Check standard event
availability") is missing, while others are present, making this worth
backporting]
Signed-off-by: Koichiro Den <koichiro.den@canonical.com>
Signed-off-by: Roxana Nicolescu <roxana.nicolescu@canonical.com>
This commit is contained in:
Pu Lehui
2024-08-31 07:15:20 +00:00
committed by Mehmet Basaran
parent 1806a94958
commit d93bfbc251
2 changed files with 3 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/perf/riscv_pmu_legacy.c
+2 -2
View File
@@ -22,13 +22,13 @@ static int pmu_legacy_ctr_get_idx(struct perf_event *event)
struct perf_event_attr *attr = &event->attr;
if (event->attr.type != PERF_TYPE_HARDWARE)
return -EOPNOTSUPP;
return -ENOENT;
if (attr->config == PERF_COUNT_HW_CPU_CYCLES)
return RISCV_PMU_LEGACY_CYCLE;
else if (attr->config == PERF_COUNT_HW_INSTRUCTIONS)
return RISCV_PMU_LEGACY_INSTRET;
else
return -EOPNOTSUPP;
return -ENOENT;
}
/* For legacy config & counter index are same */
drivers/perf/riscv_pmu_sbi.c
+1 -1
View File
@@ -476,7 +476,7 @@ static int pmu_sbi_event_map(struct perf_event *event, u64 *econfig)
}
break;
default:
ret = -EINVAL;
ret = -ENOENT;
break;
}