NVIDIA: SAUCE: gpio: tegra186: enable interrupt for all routemap registers
BugLink: https://bugs.launchpad.net/bugs/2072591 Configure IRQ parent for all interrupts listed in GPIO DT Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Jacob Martin <jacob.martin@canonical.com> Acked-by: Noah Wager <noah.wager@canonical.com> Signed-off-by: Noah Wager <noah.wager@canonical.com>
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Noah Wager
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cfd5dd4c85
@@ -939,27 +939,8 @@ static int tegra186_gpio_probe(struct platform_device *pdev)
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irq->parent_handler_data = gpio;
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irq->num_parents = gpio->num_irq;
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/*
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* To simplify things, use a single interrupt per bank for now. Some
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* chips support up to 8 interrupts per bank, which can be useful to
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* distribute the load and decrease the processing latency for GPIOs
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* but it also requires a more complicated interrupt routing than we
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* currently program.
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*/
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if (gpio->num_irqs_per_bank > 1) {
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irq->parents = devm_kcalloc(&pdev->dev, gpio->num_banks,
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sizeof(*irq->parents), GFP_KERNEL);
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if (!irq->parents)
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return -ENOMEM;
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for (i = 0; i < gpio->num_banks; i++)
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irq->parents[i] = gpio->irq[i * gpio->num_irqs_per_bank];
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irq->num_parents = gpio->num_banks;
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} else {
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irq->num_parents = gpio->num_irq;
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irq->parents = gpio->irq;
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}
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irq->num_parents = gpio->num_irq;
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irq->parents = gpio->irq;
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if (gpio->soc->num_irqs_per_bank > 1)
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tegra186_gpio_init_route_mapping(gpio);
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