NVIDIA: SAUCE: gpio: tegra186: enable interrupt for all routemap registers

BugLink: https://bugs.launchpad.net/bugs/2072591

Configure IRQ parent for all interrupts listed in GPIO DT

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Jacob Martin <jacob.martin@canonical.com>
Acked-by: Noah Wager <noah.wager@canonical.com>
Signed-off-by: Noah Wager <noah.wager@canonical.com>
This commit is contained in:
Prathamesh Shete
2022-11-11 10:58:35 +00:00
committed by Noah Wager
parent 3ab5527fac
commit cfd5dd4c85
+2 -21
View File
@@ -939,27 +939,8 @@ static int tegra186_gpio_probe(struct platform_device *pdev)
irq->parent_handler_data = gpio;
irq->num_parents = gpio->num_irq;
/*
* To simplify things, use a single interrupt per bank for now. Some
* chips support up to 8 interrupts per bank, which can be useful to
* distribute the load and decrease the processing latency for GPIOs
* but it also requires a more complicated interrupt routing than we
* currently program.
*/
if (gpio->num_irqs_per_bank > 1) {
irq->parents = devm_kcalloc(&pdev->dev, gpio->num_banks,
sizeof(*irq->parents), GFP_KERNEL);
if (!irq->parents)
return -ENOMEM;
for (i = 0; i < gpio->num_banks; i++)
irq->parents[i] = gpio->irq[i * gpio->num_irqs_per_bank];
irq->num_parents = gpio->num_banks;
} else {
irq->num_parents = gpio->num_irq;
irq->parents = gpio->irq;
}
irq->num_parents = gpio->num_irq;
irq->parents = gpio->irq;
if (gpio->soc->num_irqs_per_bank > 1)
tegra186_gpio_init_route_mapping(gpio);