drm/amdgpu/swsmu: fix ordering for setting workload_mask
BugLink: https://bugs.launchpad.net/bugs/2099996 commit b932d5ad9257f262a0bfd1bd7146120b0adc11a7 upstream. No change in functionality for the current code, but we need to set the index properly before changing it if we ever use a non-0 index. Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Koichiro Den <koichiro.den@canonical.com> Signed-off-by: Stefan Bader <stefan.bader@canonical.com>
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Stefan Bader
parent
42dd800126
commit
cbd7d5d000
@@ -1215,7 +1215,6 @@ static int smu_sw_init(void *handle)
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atomic_set(&smu->smu_power.power_gate.vpe_gated, 1);
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atomic_set(&smu->smu_power.power_gate.umsch_mm_gated, 1);
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smu->workload_mask = 1 << smu->workload_prority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT];
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smu->workload_prority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT] = 0;
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smu->workload_prority[PP_SMC_POWER_PROFILE_FULLSCREEN3D] = 1;
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smu->workload_prority[PP_SMC_POWER_PROFILE_POWERSAVING] = 2;
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@@ -1223,6 +1222,7 @@ static int smu_sw_init(void *handle)
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smu->workload_prority[PP_SMC_POWER_PROFILE_VR] = 4;
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smu->workload_prority[PP_SMC_POWER_PROFILE_COMPUTE] = 5;
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smu->workload_prority[PP_SMC_POWER_PROFILE_CUSTOM] = 6;
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smu->workload_mask = 1 << smu->workload_prority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT];
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smu->workload_setting[0] = PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT;
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smu->workload_setting[1] = PP_SMC_POWER_PROFILE_FULLSCREEN3D;
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