drm/amd/display: Change some variable name of psr
BugLink: https://bugs.launchpad.net/bugs/2101042 commit b8d9d5fef4915a383b4ce4d0f418352aa4701a87 upstream. Panel Replay feature may also use the same variable with PSR. Change the variable name and make it not specify for PSR. Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit c7fafb7a46b38a11a19342d153f505749bf56f3e) Cc: stable@vger.kernel.org # 6.11+ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Manuel Diewald <manuel.diewald@canonical.com> Signed-off-by: Stefan Bader <stefan.bader@canonical.com>
This commit is contained in:
@@ -6345,7 +6345,7 @@ create_stream_for_sink(struct drm_connector *connector,
|
||||
if (stream->out_transfer_func->tf == TRANSFER_FUNCTION_GAMMA22)
|
||||
tf = TRANSFER_FUNC_GAMMA_22;
|
||||
mod_build_vsc_infopacket(stream, &stream->vsc_infopacket, stream->output_color_space, tf);
|
||||
aconnector->psr_skip_count = AMDGPU_DM_PSR_ENTRY_DELAY;
|
||||
aconnector->sr_skip_count = AMDGPU_DM_PSR_ENTRY_DELAY;
|
||||
|
||||
}
|
||||
finish:
|
||||
@@ -8509,7 +8509,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
|
||||
* during the PSR-SU was disabled.
|
||||
*/
|
||||
if (acrtc_state->stream->link->psr_settings.psr_version >= DC_PSR_VERSION_SU_1 &&
|
||||
acrtc_attach->dm_irq_params.allow_psr_entry &&
|
||||
acrtc_attach->dm_irq_params.allow_sr_entry &&
|
||||
#ifdef CONFIG_DRM_AMD_SECURE_DISPLAY
|
||||
!amdgpu_dm_crc_window_is_activated(acrtc_state->base.crtc) &&
|
||||
#endif
|
||||
@@ -8731,27 +8731,27 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
|
||||
!acrtc_state->stream->link->psr_settings.psr_feature_enabled)
|
||||
amdgpu_dm_link_setup_psr(acrtc_state->stream);
|
||||
|
||||
/* Decrement skip count when PSR is enabled and we're doing fast updates. */
|
||||
/* Decrement skip count when SR is enabled and we're doing fast updates. */
|
||||
if (acrtc_state->update_type == UPDATE_TYPE_FAST &&
|
||||
acrtc_state->stream->link->psr_settings.psr_feature_enabled) {
|
||||
struct amdgpu_dm_connector *aconn =
|
||||
(struct amdgpu_dm_connector *)acrtc_state->stream->dm_stream_context;
|
||||
|
||||
if (aconn->psr_skip_count > 0)
|
||||
aconn->psr_skip_count--;
|
||||
if (aconn->sr_skip_count > 0)
|
||||
aconn->sr_skip_count--;
|
||||
|
||||
/* Allow PSR when skip count is 0. */
|
||||
acrtc_attach->dm_irq_params.allow_psr_entry = !aconn->psr_skip_count;
|
||||
/* Allow SR when skip count is 0. */
|
||||
acrtc_attach->dm_irq_params.allow_sr_entry = !aconn->sr_skip_count;
|
||||
|
||||
/*
|
||||
* If sink supports PSR SU, there is no need to rely on
|
||||
* a vblank event disable request to enable PSR. PSR SU
|
||||
* If sink supports PSR SU/Panel Replay, there is no need to rely on
|
||||
* a vblank event disable request to enable PSR/RP. PSR SU/RP
|
||||
* can be enabled immediately once OS demonstrates an
|
||||
* adequate number of fast atomic commits to notify KMD
|
||||
* of update events. See `vblank_control_worker()`.
|
||||
*/
|
||||
if (acrtc_state->stream->link->psr_settings.psr_version >= DC_PSR_VERSION_SU_1 &&
|
||||
acrtc_attach->dm_irq_params.allow_psr_entry &&
|
||||
acrtc_attach->dm_irq_params.allow_sr_entry &&
|
||||
#ifdef CONFIG_DRM_AMD_SECURE_DISPLAY
|
||||
!amdgpu_dm_crc_window_is_activated(acrtc_state->base.crtc) &&
|
||||
#endif
|
||||
@@ -8761,7 +8761,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
|
||||
500000000)
|
||||
amdgpu_dm_psr_enable(acrtc_state->stream);
|
||||
} else {
|
||||
acrtc_attach->dm_irq_params.allow_psr_entry = false;
|
||||
acrtc_attach->dm_irq_params.allow_sr_entry = false;
|
||||
}
|
||||
|
||||
mutex_unlock(&dm->dc_lock);
|
||||
|
||||
@@ -692,7 +692,7 @@ struct amdgpu_dm_connector {
|
||||
/* Cached display modes */
|
||||
struct drm_display_mode freesync_vid_base;
|
||||
|
||||
int psr_skip_count;
|
||||
int sr_skip_count;
|
||||
|
||||
/* Record progress status of mst*/
|
||||
uint8_t mst_status;
|
||||
|
||||
@@ -133,7 +133,7 @@ static void amdgpu_dm_crtc_vblank_control_worker(struct work_struct *work)
|
||||
#ifdef CONFIG_DRM_AMD_SECURE_DISPLAY
|
||||
!amdgpu_dm_crc_window_is_activated(&vblank_work->acrtc->base) &&
|
||||
#endif
|
||||
vblank_work->acrtc->dm_irq_params.allow_psr_entry) {
|
||||
vblank_work->acrtc->dm_irq_params.allow_sr_entry) {
|
||||
amdgpu_dm_psr_enable(vblank_work->stream);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -33,7 +33,7 @@ struct dm_irq_params {
|
||||
struct mod_vrr_params vrr_params;
|
||||
struct dc_stream_state *stream;
|
||||
int active_planes;
|
||||
bool allow_psr_entry;
|
||||
bool allow_sr_entry;
|
||||
struct mod_freesync_config freesync_config;
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
|
||||
Reference in New Issue
Block a user