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platform/chrome: cros_typec_switch: Add Pin D support

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The ChromeOS EC's mux interface allows us to specify whether the port
should be configured for Pin Assignment D in DisplayPort alternate mode
(i.e 2 lanes USB + 2 lanes DP). Update the function that determines mux
state to account for Pin Assignment D and return the appropriate mux
setting.

Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Prashant Malani <pmalani@chromium.org>
Acked-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Link: https://lore.kernel.org/r/20230508183428.1893357-1-pmalani@chromium.org
This commit is contained in:
Prashant Malani
2023-05-08 18:34:27 +00:00
parent ac9a78681b
commit c9f9c6c875
1 changed files with 8 additions and 3 deletions
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drivers/platform/chrome/cros_typec_switch.c
+8 -3
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@@ -51,13 +51,18 @@ static int cros_typec_cmd_mux_set(struct cros_typec_switch_data *sdata, int port
static int cros_typec_get_mux_state(unsigned long mode, struct typec_altmode *alt)
{
int ret = -EOPNOTSUPP;
u8 pin_assign;
if (mode == TYPEC_STATE_SAFE)
if (mode == TYPEC_STATE_SAFE) {
ret = USB_PD_MUX_SAFE_MODE;
else if (mode == TYPEC_STATE_USB)
} else if (mode == TYPEC_STATE_USB) {
ret = USB_PD_MUX_USB_ENABLED;
else if (alt && alt->svid == USB_TYPEC_DP_SID)
} else if (alt && alt->svid == USB_TYPEC_DP_SID) {
ret = USB_PD_MUX_DP_ENABLED;
pin_assign = mode - TYPEC_STATE_MODAL;
if (pin_assign & DP_PIN_ASSIGN_D)
ret |= USB_PD_MUX_USB_ENABLED;
}
return ret;
}