clocksource/drivers/timer-riscv: Clear timer interrupt on timer initialization

BugLink: https://bugs.launchpad.net/bugs/2060531

[ Upstream commit 8248ca30ef89f9cc74ace62ae1b9a22b5f16736c ]

In the RISC-V specification, the stimecmp register doesn't have a default
value. To prevent the timer interrupt from being triggered during timer
initialization, clear the timer interrupt by writing stimecmp with a
maximum value.

Fixes: 9f7a8ff639 ("RISC-V: Prefer sstc extension if available")
Cc: <stable@vger.kernel.org>
Signed-off-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Tested-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20240306172330.255844-1-leyfoon.tan@starfivetech.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
Signed-off-by: Paolo Pisati <paolo.pisati@canonical.com>

This commit is contained in:

Ley Foon Tan

2024-03-07 01:23:30 +08:00

committed by

Roxana Nicolescu

parent 6ec170b405

commit abb536cdad

1 changed files with 3 additions and 0 deletions

									
										drivers/clocksource/timer-riscv.c
									
		+3
		
												View File
												
				@@ -108,6 +108,9 @@ static int riscv_timer_starting_cpu(unsigned int cpu)

				{

					struct clock_event_device *ce = per_cpu_ptr(&riscv_clock_event, cpu);

					/* Clear timer interrupt */

					riscv_clock_event_stop();

					ce->cpumask = cpumask_of(cpu);

					ce->irq = riscv_clock_event_irq;

					if (riscv_timer_cannot_wake_cpu)