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NVIDIA: SAUCE: net: phy: aqr113c: Read WOL status register.

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BugLink: https://bugs.launchpad.net/bugs/2072591

Issue: In case of WOL disable, WOL status
is being shown as 'g' instead of 'd'.

Fix: Read proper WOL status register to set
status of WOL in ethtool output.

http://nvbugs/3789538

Signed-off-by: Revanth Kumar Uppala <ruppala@nvidia.com>
Tested-by: Abhilash G <abhilashg@nvidia.com>
Reviewed-by: Abhilash G <abhilashg@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Jacob Martin <jacob.martin@canonical.com>
Acked-by: Noah Wager <noah.wager@canonical.com>
Signed-off-by: Noah Wager <noah.wager@canonical.com>
This commit is contained in:
Revanth Kumar Uppala
2022-09-20 12:33:12 +05:30
committed by Noah Wager
parent 947c81e623
commit a78c16b94d
1 changed files with 4 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/net/phy/aquantia/aquantia_main.c
+4 -2
View File
@@ -45,6 +45,8 @@
#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_OCSGMII 10
#define MDIO_PHYXS_VEND_IF_STATUS_TX_READY BIT(12)
#define MDIO_AN_RSVD_VEND_STATUS3 0xc812
#define MDIO_AN_VEND_PROV 0xc400
#define MDIO_AN_VEND_PROV_1000BASET_FULL BIT(15)
#define MDIO_AN_VEND_PROV_1000BASET_HALF BIT(14)
@@ -1172,13 +1174,13 @@ static void aqr113c_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *w
{
u16 val;
val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, MDIO_C22EXT_GBE_PHY_RSI1_CTRL7);
val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RSVD_VEND_STATUS3);
if (val < 0)
return;
wol->supported = WAKE_MAGIC;
if (val & 0x1) {
wol->wolopts = WAKE_MAGIC;
wol->supported = WAKE_MAGIC;
}
}