NVIDIA: SAUCE: of/irq: Adjust of_pci_irq parsing for multiple interrupts
BugLink: https://bugs.launchpad.net/bugs/2080908 Currently we are considering the first irq as the PCI interrupt pin, but a PCI device may have multiple interrupts(e.g. PCIe WAKE# pin). Only parse the PCI interrupt pin when the irq is unnamed or named as "pci". http://nvbugs/4478230 Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> (cherry-picked from https://patchwork.ozlabs.org/project/linux-pci/ patch/20230208111645.3863534-3-mmaddireddy@nvidia.com) Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Noah Wager <noah.wager@canonical.com> Acked-by: Jacob Martin <jacob.martin@canonical.com> Signed-off-by: Noah Wager <noah.wager@canonical.com>
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@@ -470,9 +470,17 @@ static int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *
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*/
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dn = pci_device_to_OF_node(pdev);
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if (dn) {
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rc = of_irq_parse_one(dn, 0, out_irq);
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if (!rc)
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return rc;
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int index;
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index = of_property_match_string(dn, "interrupt-names", "pci");
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if (index == -EINVAL) /* Property doesn't exist */
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index = 0;
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if (index >= 0) {
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rc = of_irq_parse_one(dn, index, out_irq);
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if (!rc)
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return rc;
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}
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}
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/*
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