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NVIDIA: SAUCE: ASoC: tegra: ASRC: Update ARAM address

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Update ARAM address for tegra264.
As it is chip specific, added as soc_data to keep it
backward compatible.

http://nvbugs/4141301

Signed-off-by: Sheetal <sheetal@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Noah Wager <noah.wager@canonical.com>
Acked-by: Jacob Martin <jacob.martin@canonical.com>
Signed-off-by: Noah Wager <noah.wager@canonical.com>
This commit is contained in:
Sheetal
2023-06-02 05:36:26 +00:00
committed by Noah Wager
parent d9d0e0ee94
commit 69db3ab266
2 changed files with 20 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files
sound/soc/tegra/tegra186_asrc.c
+13 -2
View File
@@ -98,7 +98,7 @@ static int __maybe_unused tegra186_asrc_runtime_resume(struct device *dev)
* sync is done after this to restore other settings.
*/
regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_SCRATCH_ADDR,
TEGRA186_ASRC_ARAM_START_ADDR);
asrc->soc_data->aram_start_addr);
regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_ENB,
TEGRA186_ASRC_GLOBAL_EN);
@@ -1009,8 +1009,17 @@ static const struct regmap_config tegra186_asrc_regmap_config = {
.cache_type = REGCACHE_FLAT,
};
static const struct tegra_asrc_soc_data soc_data_tegra186 = {
.aram_start_addr = TEGRA186_ASRC_ARAM_START_ADDR,
};
static const struct tegra_asrc_soc_data soc_data_tegra264 = {
.aram_start_addr = TEGRA264_ASRC_ARAM_START_ADDR,
};
static const struct of_device_id tegra186_asrc_of_match[] = {
{ .compatible = "nvidia,tegra186-asrc" },
{ .compatible = "nvidia,tegra186-asrc", .data = &soc_data_tegra186 },
{ .compatible = "nvidia,tegra264-asrc", .data = &soc_data_tegra264 },
{},
};
MODULE_DEVICE_TABLE(of, tegra186_asrc_of_match);
@@ -1040,6 +1049,8 @@ static int tegra186_asrc_platform_probe(struct platform_device *pdev)
return PTR_ERR(asrc->regmap);
}
asrc->soc_data = of_device_get_match_data(&pdev->dev);
regcache_cache_only(asrc->regmap, true);
regmap_write(asrc->regmap, TEGRA186_ASRC_GLOBAL_CFG,
sound/soc/tegra/tegra186_asrc.h
+7 -1
View File
@@ -2,7 +2,7 @@
/*
* tegra186_asrc.h - Definitions for Tegra186 ASRC driver
*
* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2022-2023, NVIDIA CORPORATION. All rights reserved.
*
*/
@@ -94,6 +94,7 @@
#define TEGRA186_ASRC_RATIO_SOURCE_SW 0x1
#define TEGRA186_ASRC_ARAM_START_ADDR 0x3f800000
#define TEGRA264_ASRC_ARAM_START_ADDR 0x8a080000
struct tegra186_asrc_lane {
unsigned int int_part;
@@ -104,7 +105,12 @@ struct tegra186_asrc_lane {
unsigned int output_thresh;
};
struct tegra_asrc_soc_data {
unsigned int aram_start_addr;
};
struct tegra186_asrc {
const struct tegra_asrc_soc_data *soc_data;
struct tegra186_asrc_lane lane[TEGRA186_ASRC_STREAM_MAX];
struct regmap *regmap;
};