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accel/ivpu: Increase DMA address range

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BugLink: https://bugs.launchpad.net/bugs/2098972

Increase DMA address range to:
 * 128 GB on 37xx (due to MMU limitations)
 * 256 GB on other generations
Merge User and DMA ranges on 40xx and above as it is possible
to access whole 256 GBs from both FW and DMA.

Increase User range on 37xx from 255MB to 511MB
to allow loading very large models.

Do not set global_alias_pio_base/size on other generations than 37xx
as it's only used on 37xx anyway.

Signed-off-by: Karol Wachowski <karol.wachowski@intel.com>
Signed-off-by: Andrzej Kacprowski <Andrzej.Kacprowski@intel.com>
Reviewed-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com>
Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241017145817.121590-11-jacek.lawrynowicz@linux.intel.com
(backported from commit 83b6fa5844b53fe25417229e44c460e4f84da432)
[thibf: driver only target the 37xx which remove some cases as
we don't have 'accel/ivpu: Split IP and buttress code']
Signed-off-by: Thibault Ferrante <thibault.ferrante@canonical.com>
Acked-by: Stewart Hore <stewart.hore@canonical.com>
Acked-by: Koichiro Den <koichiro.den@canonical.com>
Signed-off-by: Koichiro Den <koichiro.den@canonical.com>
This commit is contained in:
Karol Wachowski
2025-02-20 17:17:40 +01:00
committed by Stefan Bader
parent f0f7b49e56
commit 62d505a4aa
4 changed files with 11 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/accel/ivpu/ivpu_fw.c
+4 -2
View File
@@ -523,8 +523,10 @@ void ivpu_fw_boot_params_setup(struct ivpu_device *vdev, struct vpu_boot_params
boot_params->ipc_payload_area_start = ipc_mem_rx->vpu_addr + ivpu_bo_size(ipc_mem_rx) / 2;
boot_params->ipc_payload_area_size = ivpu_bo_size(ipc_mem_rx) / 2;
boot_params->global_aliased_pio_base = vdev->hw->ranges.user.start;
boot_params->global_aliased_pio_size = ivpu_hw_range_size(&vdev->hw->ranges.user);
if (ivpu_hw_gen(vdev) == IVPU_HW_37XX) {
boot_params->global_aliased_pio_base = vdev->hw->ranges.user.start;
boot_params->global_aliased_pio_size = ivpu_hw_range_size(&vdev->hw->ranges.user);
}
/* Allow configuration for L2C_PAGE_TABLE with boot param value */
boot_params->autoconfig = 1;
drivers/accel/ivpu/ivpu_hw_37xx.c
+2 -2
View File
@@ -593,9 +593,9 @@ static int ivpu_hw_37xx_info_init(struct ivpu_device *vdev)
ivpu_pll_init_frequency_ratios(vdev);
ivpu_hw_init_range(&hw->ranges.global, 0x80000000, SZ_512M);
ivpu_hw_init_range(&hw->ranges.user, 0xc0000000, 255 * SZ_1M);
ivpu_hw_init_range(&hw->ranges.user, 0x88000000, 511 * SZ_1M);
ivpu_hw_init_range(&hw->ranges.shave, 0x180000000, SZ_2G);
ivpu_hw_init_range(&hw->ranges.dma, 0x200000000, SZ_8G);
ivpu_hw_init_range(&hw->ranges.dma, 0x200000000, SZ_128G);
vdev->platform = IVPU_PLATFORM_SILICON;
ivpu_hw_wa_init(vdev);
drivers/accel/ivpu/ivpu_hw_40xx.c
+3 -3
View File
@@ -730,9 +730,9 @@ static int ivpu_hw_40xx_info_init(struct ivpu_device *vdev)
ivpu_pll_init_frequency_ratios(vdev);
ivpu_hw_init_range(&vdev->hw->ranges.global, 0x80000000, SZ_512M);
ivpu_hw_init_range(&vdev->hw->ranges.user, 0x80000000, SZ_256M);
ivpu_hw_init_range(&vdev->hw->ranges.shave, 0x80000000 + SZ_256M, SZ_2G - SZ_256M);
ivpu_hw_init_range(&vdev->hw->ranges.dma, 0x200000000, SZ_8G);
ivpu_hw_init_range(&vdev->hw->ranges.shave, 0x80000000, SZ_2G);
ivpu_hw_init_range(&vdev->hw->ranges.user, 0x100000000, SZ_256G);
vdev->hw->ranges.dma = vdev->hw->ranges.user;
ivpu_hw_read_platform(vdev);
ivpu_hw_wa_init(vdev);
drivers/accel/ivpu/ivpu_mmu_context.c
+2 -2
View File
@@ -461,8 +461,8 @@ ivpu_mmu_context_init(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx, u3
start = vdev->hw->ranges.global.start;
end = vdev->hw->ranges.shave.end;
} else {
start = vdev->hw->ranges.user.start;
end = vdev->hw->ranges.dma.end;
start = min_t(u64, vdev->hw->ranges.user.start, vdev->hw->ranges.shave.start);
end = max_t(u64, vdev->hw->ranges.user.end, vdev->hw->ranges.dma.end);
}
drm_mm_init(&ctx->mm, start, end - start);