drm/i915/gt: Do not generate the command streamer for all the CCS
BugLink: https://bugs.launchpad.net/bugs/2065400
commit ea315f98e5d6d3191b74beb0c3e5fc16081d517c upstream.
We want a fixed load CCS balancing consisting in all slices
sharing one single user engine. For this reason do not create the
intel_engine_cs structure with its dedicated command streamer for
CCS slices beyond the first.
Fixes: d2eae8e98d ("drm/i915/dg2: Drop force_probe requirement")
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Cc: Chris Wilson <chris.p.wilson@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: <stable@vger.kernel.org> # v6.2+
Acked-by: Michal Mrozek <michal.mrozek@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240328073409.674098-3-andi.shyti@linux.intel.com
(cherry picked from commit c7a5aa4e57f88470313a8277eb299b221b86e3b1)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Manuel Diewald <manuel.diewald@canonical.com>
Signed-off-by: Roxana Nicolescu <roxana.nicolescu@canonical.com>
This commit is contained in:
@@ -908,6 +908,23 @@ static intel_engine_mask_t init_engine_mask(struct intel_gt *gt)
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info->engine_mask &= ~BIT(GSC0);
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}
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/*
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* Do not create the command streamer for CCS slices beyond the first.
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* All the workload submitted to the first engine will be shared among
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* all the slices.
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*
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* Once the user will be allowed to customize the CCS mode, then this
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* check needs to be removed.
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*/
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if (IS_DG2(gt->i915)) {
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u8 first_ccs = __ffs(CCS_MASK(gt));
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/* Mask off all the CCS engine */
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info->engine_mask &= ~GENMASK(CCS3, CCS0);
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/* Put back in the first CCS engine */
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info->engine_mask |= BIT(_CCS(first_ccs));
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}
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return info->engine_mask;
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}
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