NVIDIA: SAUCE: hsierrrptinj: Update I2C instances
Update the number of I2C instances to support error reporting. Bug 4771468 Bug 5421820 Change-Id: I20de21c578489b476118440497ec7f716492775f Signed-off-by: Prasun Kumar <prasunk@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/3rdparty/canonical/linux-noble/+/3424477 GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: svcacv <svcacv@nvidia.com> Tested-by: Akhil R <akhilrajeev@nvidia.com> Reviewed-by: Akhil R <akhilrajeev@nvidia.com>
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@@ -1,5 +1,5 @@
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// SPDX-License-Identifier: GPL-2.0
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// SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION. All rights reserved.
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// SPDX-FileCopyrightText: Copyright (c) 2021-2025 NVIDIA CORPORATION. All rights reserved.
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/**
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* @file tegra-hsierrrptinj.c
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@@ -35,7 +35,7 @@
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#define WRITE_USER 0200 /* S_IWUSR */
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/* Max instance of any registred IP */
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#define MAX_INSTANCE 11U
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#define MAX_INSTANCE 20U
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/* Timeout in millisec */
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#define TIMEOUT 1000
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@@ -68,7 +68,7 @@ struct hsm_error_report_frame {
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* MGBE - 20
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* PCIE - 11
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* PSC - 1
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* I2C = 10
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* I2C = 17
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* QSPI - 2
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* SDMMC - 9
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* TSEC - 1
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@@ -76,7 +76,7 @@ struct hsm_error_report_frame {
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* SMMU - 1
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* DLA - 2
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*/
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static unsigned int ip_instances[NUM_IPS] = {1, 1, 5, 20, 11, 1, 10, 2, 9, 1, 1, 1, 2};
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static unsigned int ip_instances[NUM_IPS] = {1, 1, 5, 20, 11, 1, 17, 2, 9, 1, 1, 1, 2};
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/* This directory entry will point to `/sys/kernel/debug/tegra_hsierrrptinj`. */
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static struct dentry *hsierrrptinj_debugfs_root;
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