- The BH1730FVC on the Erista and OLED boards reports visible and
infrared light over I2C
- Expose an illuminance channel in lux plus raw visible and infrared
counts, adjusting the gain automatically, so Android can drive auto
brightness from it
- Control brightness over DCS (11-bit) through a backlight device on
panels without a PWM backlight, such as the OLED
- Send display off when the panel is disabled and in the OLED suspend
list, and display on at the end of its init list, so it no longer
flashes gray when the screen turns off
- Read the power mode after setting the initial brightness, which waits
for the panel to take the command before video starts; without it the
boot animation stayed dark
- Read the 3 byte display ID properly, and treat machines compatible with
nintendo,aula as the OLED panel
- Use named DCS opcodes and end every command list with a terminator
- Log the display ID once instead of on every screen on
- The panels use a 1 line vsync with a 10 line front porch and 9 line back
porch
- vsync_end used a 2 line pulse while vtotal assumed 1, which shrank the
back porch to 8 lines
- When the video stream is active, queue DCS packets as video-mode command
packets sent during blanking instead of using host mode, which would
stall the display
- Wait two frame ends before restoring the registers, so the panel has
received and applied the command
- Lets the OLED panel change brightness and switch off without stopping
the display first
- Always flush the host FIFO before sending a packet instead of only after
the status register reports an underflow or overflow
- With the reset limited to error cases the OLED flashed gray when the
screen turned off; resetting before every transfer stops it
- Register a syscore suspend hook on Tegra210 that sends the BPMP its
enable-suspend request (MRQ 17) as the last step before deep sleep
- Split the atomic transfer into an inner helper so the hook can send the
request from syscore context, where interrupts are already off
- Without the request the BPMP never arms SC7, so deep sleep cannot work
- Write the Tegra210B01 per-lane UPHY settings into UPHY_MISC_PAD_PX_CTL8
for every lane used as USB3
- Skip the Tegra210 PLL calibration and DCO values on B01, which has its
own PLL table and was having it overwritten
- USB3 device mode now links at SuperSpeed on Mariko units instead of
falling back to USB2
- Remember if this port turned its VBUS regulator on
- Switching to host mode twice no longer enables it a second time, and
switching to none no longer disables a regulator it never enabled
- Fixes the unbalanced regulator warnings on USB-C role changes
- kstrtouint() returns 0 on success, but the cmd and usbhub_dp_sleep
writers treated anything other than 1 as a syntax error
- Every valid command was rejected, so the debugfs controls never worked
- The handler masks the IRQ and queues the event work, and the work unmasks
it only once the controller status has been read
- Without this, a fast USB-C replug re-entered the state machine while it
was still processing the previous event, so hotplug got stuck
- Unmask right away if the work was already queued, so no alert is lost
Some Tegra124 and Tegra21x boards have open-source
bootloaders injected via RCM rather than onboard. These
boards need special reboot handling, which we call
`Reboot2Payload`.
Co-developed-by: Thomas Makin <halorocker89@gmail.com>
Co-developed-by: Ezekiel Bethel <zek@9net.org>
input: misc: Max77620 ON/OFF Block change to button press to key_sleep for linux.
input: misc: max77620-onoff: Ignore button release interrupt if the accompanying press was reported to userspace
Caused some userspaces to shutdown after wakeup from lp0 sleep if the
button was pressed during sleep and not released till after waking.
max77620-onoff: Refactor driver
- Add `maxim,onoff-keycode` under `onoff` child node to select custom ON/OFF button key code.
- Fix button stack at resume.
max77620-onoff: Correct regmap
max77620-onoff: correct irq priority and names
max77620-onoff: clear pending irq on probe
Change-Id: I033bd7a26a4e59b2508e90b4d9e42d2d52e5c17e
The FTS support SLPI and AP mode, introduce mode-switch GPIO to switch
between those two. Currently we can handle only full power AP mode, so we
just keep the AP on.
Useful for devices like Pixel 3 (blueline), Pixel 4a (sunfish),
Xiaomi Mi 8 (dipper), and many others.
Based on work of Petr Hodina <petr.hodina@protonmail.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
The touchscreen-size-{x,y} is exact number, the -1 deduction is done on
driver side.
Example now use interrupts-extended and size obviously not deducted by
one.
Signed-off-by: David Heidelberg <david@ixit.cz>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
After releasing the reset line stmfts_reset() sleeps a fixed 50 ms and
stmfts_power_on() another 50 ms before the first I2C access. That is
enough for a warm reset, but when both supplies were really cut during
system suspend the controller boots from cold and can need longer. If
it does, the first read fails, stmfts_resume() returns an error and the
touchscreen is left powered off with its interrupt disabled.
The controller posts a controller ready event once it has booted, and
the event parser already completes cmd_done on it. Enable the interrupt
right after releasing reset and wait for that event instead of sleeping,
giving the controller 300 ms, the total budget the vendor driver allows.
Boards without a reset line keep the old timing.
Usually phones such as Pixel 4a and Xiaomi Mi 8 needs longer delay, so
without this change touchscreen stops working.
Fixes: 8a1f9de80e45 ("Input: stmfts - add optional reset GPIO support")
Cc: stable@vger.kernel.org
Co-developed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
While being less compact, using named initializers allows to more easily
see which members of the structs are assigned which value without having
to lookup the declaration of the struct. And it's also more robust
against changes to the struct definition.
The mentioned robustness is relevant for a planned change to struct
i2c_device_id that replaces .driver_data by an anonymous union.
This patch doesn't modify the compiled arrays, only their representation
in source form benefits. The former was confirmed with x86 and arm64
builds.
Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com>
Link: https://patch.msgid.link/20260515164848.497608-2-u.kleine-koenig@baylibre.com
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Replace the bogus "GPL v2" with "GPL" as MODULE_LICNSE() string. The
value does not declare the module's exact license, but only lets the
module loader test whether the module is Free Software or not.
See commit bf7fbeeae6 ("module: Cure the MODULE_LICENSE "GPL" vs.
"GPL v2" bogosity") in the details of the issue. The fix is to use
"GPL" for all modules under any variant of the GPL.
Signed-off-by: David Heidelberg <david@ixit.cz>
Link: https://patch.msgid.link/20260409-stmfts5-v4-1-64fe62027db5@ixit.cz
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
There was some confusion on the use of the tune values. They were
defined in 2 different structs, but only initialzed in one of them.
Remove most of the references in struct tegra_dfll_soc_data and adjust
the code accordingly. Only tune_high_min_millivolts is left, because
this can be adjusted using debugfs. Hence copy the initial value from
the cvb table at boot.
Apply regulator alignment when using Vmin to determine the lowest possible
rate generated by the DFLL.
Change-Id: I169528614871733e4a7568f3ec740079b0e9d097
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1584439
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Other platforms allow dsi across multiple heads, but some have
one or more heads disabled. This results in a mismatch between
possible_crtcs and the real crtc mask. Apply the same
`tegra_output_find_possible_crtcs` function to DSI to properly
detect.
Added DFLL tune high margin voltage entry in CVB table. This allows to
replace current fixed margin defined as number of DFLL voltage steps
with per-table/per-chip margin in millivolts, and convert it to steps
during DFLL initialization.
Bug 1967884
Change-Id: I56268ae2faf9cc633b9f988cacbfd0ea3ba77ff3
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1576307
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This patch is heavily based on the DFLL driver which is
written by Paul Walmsley and used by Tegra124 Chrome
projects currently.
The DFLL output can be fine tuned by the tuning parameters
depending on the voltage threshold. Both of the tuning
parameters and voltage threshold are specified by the
chip characterization. This patch introduces a tuning
timer which controls/monitors the tuning status. When
the DFLL is in open loop, only the tune low parameter
can be used. Once the DFLL enters the close loop, we
can switch to the tune high state if the output voltage
goes higher than the predefined threshold.
Added support for PWM regulator based DFLL.
Bug 200262988
Change-Id: I5ed51fbbf4b18cbd8cced5ab27848817201d8b39
Signed-off-by: Vince Hsu <vinceh@nvidia.com>
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1565464
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Timo Alho <talho@nvidia.com>
SylveonDeko
tmakin
CTCaer
Billy Laws
Petr Hodina
David Heidelberg
Uwe Kleine-König (The Capable Hub)
Dmitry Torokhov
Bibhay Ranjan
Peter De Schrijver
Alex Frid
Vince Hsu