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Merge tag 'mediatek-drm-next-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-next

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Mediatek DRM Next for Linux 6.3

1. Reduce the time of dsi from LP11 to sending cmd
2. Remove dependency on GEM DMA helper
3. Drop unbalanced obj unref
4. Fix the fallback for mediatek,mt8186-disp-ccorr
5. Fixup for error path.

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230130125811.2567-1-chunkuang.hu@kernel.org
This commit is contained in:
Dave Airlie
2023-02-02 18:17:16 +10:00
parent 820ba9aa33 137272ef1b
commit e9b71eb1b2
23 changed files with 71 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml
+1
View File
@@ -31,6 +31,7 @@ properties:
- items:
- enum:
- mediatek,mt8186-disp-aal
- mediatek,mt8188-disp-aal
- mediatek,mt8192-disp-aal
- mediatek,mt8195-disp-aal
- const: mediatek,mt8183-disp-aal
Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
+2 -1
View File
@@ -27,12 +27,13 @@ properties:
- const: mediatek,mt8192-disp-ccorr
- items:
- enum:
- mediatek,mt8188-disp-ccorr
- mediatek,mt8195-disp-ccorr
- const: mediatek,mt8192-disp-ccorr
- items:
- enum:
- mediatek,mt8186-disp-ccorr
- const: mediatek,mt8183-disp-ccorr
- const: mediatek,mt8192-disp-ccorr
reg:
maxItems: 1
Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml
+1
View File
@@ -37,6 +37,7 @@ properties:
- enum:
- mediatek,mt8183-disp-color
- mediatek,mt8186-disp-color
- mediatek,mt8188-disp-color
- mediatek,mt8192-disp-color
- mediatek,mt8195-disp-color
- const: mediatek,mt8173-disp-color
Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml
+1
View File
@@ -27,6 +27,7 @@ properties:
- items:
- enum:
- mediatek,mt8186-disp-dither
- mediatek,mt8188-disp-dither
- mediatek,mt8192-disp-dither
- mediatek,mt8195-disp-dither
- const: mediatek,mt8183-disp-dither
Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml
+1
View File
@@ -28,6 +28,7 @@ properties:
- items:
- enum:
- mediatek,mt8186-disp-gamma
- mediatek,mt8188-disp-gamma
- mediatek,mt8192-disp-gamma
- mediatek,mt8195-disp-gamma
- const: mediatek,mt8183-disp-gamma
Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml
+1
View File
@@ -36,6 +36,7 @@ properties:
- const: mediatek,mt2701-disp-ovl
- items:
- enum:
- mediatek,mt8188-disp-ovl
- mediatek,mt8195-disp-ovl
- const: mediatek,mt8183-disp-ovl
- items:
Documentation/devicetree/bindings/display/mediatek/mediatek,postmask.yaml
+1
View File
@@ -26,6 +26,7 @@ properties:
- items:
- enum:
- mediatek,mt8186-disp-postmask
- mediatek,mt8188-disp-postmask
- const: mediatek,mt8192-disp-postmask
reg:
Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml
+4
View File
@@ -31,6 +31,10 @@ properties:
- const: mediatek,mt8183-disp-rdma
- items:
- const: mediatek,mt8195-disp-rdma
- items:
- enum:
- mediatek,mt8188-disp-rdma
- const: mediatek,mt8195-disp-rdma
- items:
- enum:
- mediatek,mt7623-disp-rdma
drivers/gpu/drm/mediatek/Kconfig
-1
View File
@@ -7,7 +7,6 @@ config DRM_MEDIATEK
depends on HAVE_ARM_SMCCC
depends on OF
depends on MTK_MMSYS
select DRM_GEM_DMA_HELPER
select DRM_KMS_HELPER
select DRM_MIPI_DSI
select DRM_PANEL
drivers/gpu/drm/mediatek/mtk_cec.c
+2
View File
@@ -12,6 +12,8 @@
#include <linux/platform_device.h>
#include "mtk_cec.h"
#include "mtk_hdmi.h"
#include "mtk_drm_drv.h"
#define TR_CONFIG 0x00
#define CLEAR_CEC_IRQ BIT(15)
drivers/gpu/drm/mediatek/mtk_disp_aal.c
+1
View File
@@ -14,6 +14,7 @@
#include "mtk_disp_drv.h"
#include "mtk_drm_crtc.h"
#include "mtk_drm_ddp_comp.h"
#include "mtk_drm_drv.h"
#define DISP_AAL_EN 0x0000
#define AAL_EN BIT(0)
drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
+1
View File
@@ -14,6 +14,7 @@
#include "mtk_disp_drv.h"
#include "mtk_drm_crtc.h"
#include "mtk_drm_ddp_comp.h"
#include "mtk_drm_drv.h"
#define DISP_CCORR_EN 0x0000
#define CCORR_EN BIT(0)
drivers/gpu/drm/mediatek/mtk_disp_color.c
+1
View File
@@ -14,6 +14,7 @@
#include "mtk_disp_drv.h"
#include "mtk_drm_crtc.h"
#include "mtk_drm_ddp_comp.h"
#include "mtk_drm_drv.h"
#define DISP_COLOR_CFG_MAIN 0x0400
#define DISP_COLOR_START_MT2701 0x0f00
drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+1
View File
@@ -14,6 +14,7 @@
#include "mtk_disp_drv.h"
#include "mtk_drm_crtc.h"
#include "mtk_drm_ddp_comp.h"
#include "mtk_drm_drv.h"
#define DISP_GAMMA_EN 0x0000
#define GAMMA_EN BIT(0)
drivers/gpu/drm/mediatek/mtk_disp_ovl.c
+1
View File
@@ -19,6 +19,7 @@
#include "mtk_disp_drv.h"
#include "mtk_drm_crtc.h"
#include "mtk_drm_ddp_comp.h"
#include "mtk_drm_drv.h"
#define DISP_REG_OVL_INTEN 0x0004
#define OVL_FME_CPL_INT BIT(1)
drivers/gpu/drm/mediatek/mtk_disp_rdma.c
+1
View File
@@ -17,6 +17,7 @@
#include "mtk_disp_drv.h"
#include "mtk_drm_crtc.h"
#include "mtk_drm_ddp_comp.h"
#include "mtk_drm_drv.h"
#define DISP_REG_RDMA_INT_ENABLE 0x0000
#define DISP_REG_RDMA_INT_STATUS 0x0004
drivers/gpu/drm/mediatek/mtk_dp.c
+1 -1
View File
@@ -1693,7 +1693,7 @@ static int mtk_dp_training(struct mtk_dp *mtk_dp)
break;
default:
return -EINVAL;
};
}
continue;
}
drivers/gpu/drm/mediatek/mtk_dpi.c
+32
View File
@@ -14,6 +14,7 @@
#include <linux/of_graph.h>
#include <linux/pinctrl/consumer.h>
#include <linux/platform_device.h>
#include <linux/soc/mediatek/mtk-mmsys.h>
#include <linux/types.h>
#include <video/videomode.h>
@@ -29,6 +30,7 @@
#include "mtk_disp_drv.h"
#include "mtk_dpi_regs.h"
#include "mtk_drm_ddp_comp.h"
#include "mtk_drm_drv.h"
enum mtk_dpi_out_bit_num {
MTK_DPI_OUT_BIT_NUM_8BITS,
@@ -66,6 +68,7 @@ struct mtk_dpi {
struct drm_connector *connector;
void __iomem *regs;
struct device *dev;
struct device *mmsys_dev;
struct clk *engine_clk;
struct clk *pixel_clk;
struct clk *tvd_clk;
@@ -134,6 +137,7 @@ struct mtk_dpi_yc_limit {
* @yuv422_en_bit: Enable bit of yuv422.
* @csc_enable_bit: Enable bit of CSC.
* @pixels_per_iter: Quantity of transferred pixels per iteration.
* @edge_cfg_in_mmsys: If the edge configuration for DPI's output needs to be set in MMSYS.
*/
struct mtk_dpi_conf {
unsigned int (*cal_factor)(int clock);
@@ -152,6 +156,7 @@ struct mtk_dpi_conf {
u32 yuv422_en_bit;
u32 csc_enable_bit;
u32 pixels_per_iter;
bool edge_cfg_in_mmsys;
};
static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask)
@@ -448,8 +453,12 @@ static void mtk_dpi_dual_edge(struct mtk_dpi *dpi)
mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING,
dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_LE ?
EDGE_SEL : 0, EDGE_SEL);
if (dpi->conf->edge_cfg_in_mmsys)
mtk_mmsys_ddp_dpi_fmt_config(dpi->mmsys_dev, MTK_DPI_RGB888_DDR_CON);
} else {
mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE, 0);
if (dpi->conf->edge_cfg_in_mmsys)
mtk_mmsys_ddp_dpi_fmt_config(dpi->mmsys_dev, MTK_DPI_RGB888_SDR_CON);
}
}
@@ -777,8 +786,10 @@ static int mtk_dpi_bind(struct device *dev, struct device *master, void *data)
{
struct mtk_dpi *dpi = dev_get_drvdata(dev);
struct drm_device *drm_dev = data;
struct mtk_drm_private *priv = drm_dev->dev_private;
int ret;
dpi->mmsys_dev = priv->mmsys_dev;
ret = drm_simple_encoder_init(drm_dev, &dpi->encoder,
DRM_MODE_ENCODER_TMDS);
if (ret) {
@@ -929,6 +940,24 @@ static const struct mtk_dpi_conf mt8183_conf = {
.csc_enable_bit = CSC_ENABLE,
};
static const struct mtk_dpi_conf mt8186_conf = {
.cal_factor = mt8183_calculate_factor,
.reg_h_fre_con = 0xe0,
.max_clock_khz = 150000,
.output_fmts = mt8183_output_fmts,
.num_output_fmts = ARRAY_SIZE(mt8183_output_fmts),
.edge_cfg_in_mmsys = true,
.pixels_per_iter = 1,
.is_ck_de_pol = true,
.swap_input_support = true,
.support_direct_pin = true,
.dimension_mask = HPW_MASK,
.hvsize_mask = HSIZE_MASK,
.channel_swap_shift = CH_SWAP,
.yuv422_en_bit = YUV422_EN,
.csc_enable_bit = CSC_ENABLE,
};
static const struct mtk_dpi_conf mt8188_dpintf_conf = {
.cal_factor = mt8195_dpintf_calculate_factor,
.max_clock_khz = 600000,
@@ -1093,6 +1122,9 @@ static const struct of_device_id mtk_dpi_of_ids[] = {
{ .compatible = "mediatek,mt8183-dpi",
.data = &mt8183_conf,
},
{ .compatible = "mediatek,mt8186-dpi",
.data = &mt8186_conf,
},
{ .compatible = "mediatek,mt8188-dp-intf",
.data = &mt8188_dpintf_conf,
},
drivers/gpu/drm/mediatek/mtk_drm_crtc.c
+2
View File
@@ -945,6 +945,8 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,
mtk_crtc->planes = devm_kcalloc(dev, num_comp_planes,
sizeof(struct drm_plane), GFP_KERNEL);
if (!mtk_crtc->planes)
return -ENOMEM;
for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {
ret = mtk_drm_crtc_init_comp_planes(drm_dev, mtk_crtc, i,
drivers/gpu/drm/mediatek/mtk_drm_drv.c
+4 -1
View File
@@ -20,8 +20,8 @@
#include <drm/drm_fbdev_generic.h>
#include <drm/drm_fourcc.h>
#include <drm/drm_gem.h>
#include <drm/drm_gem_dma_helper.h>
#include <drm/drm_gem_framebuffer_helper.h>
#include <drm/drm_ioctl.h>
#include <drm/drm_of.h>
#include <drm/drm_probe_helper.h>
#include <drm/drm_vblank.h>
@@ -520,6 +520,7 @@ static int mtk_drm_bind(struct device *dev)
err_deinit:
mtk_drm_kms_deinit(drm);
err_free:
private->drm = NULL;
drm_dev_put(drm);
return ret;
}
@@ -637,6 +638,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
.data = (void *)MTK_DPI },
{ .compatible = "mediatek,mt8183-dpi",
.data = (void *)MTK_DPI },
{ .compatible = "mediatek,mt8186-dpi",
.data = (void *)MTK_DPI },
{ .compatible = "mediatek,mt8188-dp-intf",
.data = (void *)MTK_DP_INTF },
{ .compatible = "mediatek,mt8192-dpi",
drivers/gpu/drm/mediatek/mtk_drm_gem.c
+7 -4
View File
@@ -16,13 +16,18 @@
static int mtk_drm_gem_object_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);
static const struct vm_operations_struct vm_ops = {
.open = drm_gem_vm_open,
.close = drm_gem_vm_close,
};
static const struct drm_gem_object_funcs mtk_drm_gem_object_funcs = {
.free = mtk_drm_gem_free_object,
.get_sg_table = mtk_gem_prime_get_sg_table,
.vmap = mtk_drm_gem_prime_vmap,
.vunmap = mtk_drm_gem_prime_vunmap,
.mmap = mtk_drm_gem_object_mmap,
.vm_ops = &drm_gem_dma_vm_ops,
.vm_ops = &vm_ops,
};
static struct mtk_drm_gem_obj *mtk_drm_gem_init(struct drm_device *dev,
@@ -164,8 +169,6 @@ static int mtk_drm_gem_object_mmap(struct drm_gem_object *obj,
ret = dma_mmap_attrs(priv->dma_dev, vma, mtk_gem->cookie,
mtk_gem->dma_addr, obj->size, mtk_gem->dma_attrs);
if (ret)
drm_gem_vm_close(vma);
return ret;
}
@@ -262,6 +265,6 @@ void mtk_drm_gem_prime_vunmap(struct drm_gem_object *obj,
return;
vunmap(vaddr);
mtk_gem->kvaddr = 0;
mtk_gem->kvaddr = NULL;
kfree(mtk_gem->pages);
}
drivers/gpu/drm/mediatek/mtk_dsi.c
+2 -1
View File
@@ -28,6 +28,7 @@
#include "mtk_disp_drv.h"
#include "mtk_drm_ddp_comp.h"
#include "mtk_drm_drv.h"
#define DSI_START 0x00
@@ -721,7 +722,7 @@ static void mtk_dsi_lane_ready(struct mtk_dsi *dsi)
mtk_dsi_clk_ulp_mode_leave(dsi);
mtk_dsi_lane0_ulp_mode_leave(dsi);
mtk_dsi_clk_hs_mode(dsi, 0);
msleep(20);
usleep_range(1000, 3000);
/* The reaction time after pulling up the mipi signal for dsi_rx */
}
}
drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c
+3
View File
@@ -19,6 +19,9 @@
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include "mtk_drm_drv.h"
#include "mtk_hdmi.h"
#define SIF1_CLOK (288)
#define DDC_DDCMCTL0 (0x0)
#define DDCM_ODRAIN BIT(31)