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drm/amd/display: Fix MPCC DTN logging

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[Why]
DTN only logs 'pipe_count' instances of MPCC.
However in some cases there are different number of
MPCC than DPP (pipe_count).

[How]
Add mpcc_count parameter to resource_pool and set it
during pool construction and use it for DTN logging of
MPCC state.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Eric Bernstein
2018-11-28 11:17:53 -05:00
committed by Alex Deucher
parent 314a58b8ae
commit e9a48b6b95
1 changed files with 1 additions and 1 deletions
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drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c
+1 -1
View File
@@ -392,7 +392,7 @@ static unsigned int dcn10_get_mpcc_states(struct dc *dc, char *pBuf, unsigned in
remaining_buffer -= chars_printed;
pBuf += chars_printed;
for (i = 0; i < pool->pipe_count; i++) {
for (i = 0; i < pool->mpcc_count; i++) {
struct mpcc_state s = {0};
pool->mpc->funcs->read_mpcc_state(pool->mpc, i, &s);