Merge de848da12f ("Merge tag 'drm-next-2024-09-19' of https://gitlab.freedesktop.org/drm/kernel") into android-mainline
Steps on the way to 6.12-rc1 Bug: 367265496 Change-Id: I8208eaedc88c8d4b116383ce2b20692e8a0b8ca8 Signed-off-by: Matthias Maennich <maennich@google.com>
This commit is contained in:
Matthias Maennich
@@ -613,6 +613,10 @@ Shuah Khan <shuah@kernel.org> <shuah.kh@samsung.com>
|
||||
Sibi Sankar <quic_sibis@quicinc.com> <sibis@codeaurora.org>
|
||||
Sid Manning <quic_sidneym@quicinc.com> <sidneym@codeaurora.org>
|
||||
Simon Arlott <simon@octiron.net> <simon@fire.lp0.eu>
|
||||
Simona Vetter <simona.vetter@ffwll.ch> <daniel.vetter@ffwll.ch>
|
||||
Simona Vetter <simona.vetter@ffwll.ch> <daniel.vetter@intel.com>
|
||||
Simona Vetter <simona.vetter@ffwll.ch> <daniel@ffwll.ch>
|
||||
Simona Vetter <simona.vetter@ffwll.ch> <daniel@biene.ffwll.ch>
|
||||
Simon Horman <horms@kernel.org> <simon.horman@corigine.com>
|
||||
Simon Horman <horms@kernel.org> <simon.horman@netronome.com>
|
||||
Simon Kelley <simon@thekelleys.org.uk>
|
||||
|
||||
@@ -378,6 +378,9 @@ S: 1549 Hiironen Rd.
|
||||
S: Brimson, MN 55602
|
||||
S: USA
|
||||
|
||||
N: Arnd Bergmann
|
||||
D: Maintainer of Cell Broadband Engine Architecture
|
||||
|
||||
N: Hennus Bergman
|
||||
P: 1024/77D50909 76 99 FD 31 91 E1 96 1C 90 BB 22 80 62 F6 BD 63
|
||||
D: Author and maintainer of the QIC-02 tape driver
|
||||
@@ -1869,6 +1872,9 @@ S: K osmidomkum 723
|
||||
S: 160 00 Praha 6
|
||||
S: Czech Republic
|
||||
|
||||
N: Jeremy Kerr
|
||||
D: Maintainer of SPU File System
|
||||
|
||||
N: Michael Kerrisk
|
||||
E: mtk.manpages@gmail.com
|
||||
W: https://man7.org/
|
||||
|
||||
@@ -75,3 +75,11 @@ Description: RO. Energy input of device or gt in microjoules.
|
||||
for the gt.
|
||||
|
||||
Only supported for particular Intel i915 graphics platforms.
|
||||
|
||||
What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/fan1_input
|
||||
Date: November 2024
|
||||
KernelVersion: 6.12
|
||||
Contact: intel-gfx@lists.freedesktop.org
|
||||
Description: RO. Fan speed of device in RPM.
|
||||
|
||||
Only supported for particular Intel i915 graphics platforms.
|
||||
|
||||
@@ -147,12 +147,6 @@ DRM_IOCTL_QAIC_PERF_STATS_BO
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||||
recent execution of a BO. This allows userspace to construct an end to end
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||||
timeline of the BO processing for a performance analysis.
|
||||
|
||||
DRM_IOCTL_QAIC_PART_DEV
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||||
This IOCTL allows userspace to request a duplicate "shadow device". This extra
|
||||
accelN device is associated with a specific partition of resources on the
|
||||
AIC100 device and can be used for limiting a process to some subset of
|
||||
resources.
|
||||
|
||||
DRM_IOCTL_QAIC_DETACH_SLICE_BO
|
||||
This IOCTL allows userspace to remove the slicing information from a BO that
|
||||
was originally provided by a call to DRM_IOCTL_QAIC_ATTACH_SLICE_BO. This
|
||||
|
||||
@@ -113,3 +113,62 @@ to apply at each uncore* level.
|
||||
|
||||
Support for "current_freq_khz" is available only at each fabric cluster
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||||
level (i.e., in uncore* directory).
|
||||
|
||||
Efficiency vs. Latency Tradeoff
|
||||
-------------------------------
|
||||
|
||||
The Efficiency Latency Control (ELC) feature improves performance
|
||||
per watt. With this feature hardware power management algorithms
|
||||
optimize trade-off between latency and power consumption. For some
|
||||
latency sensitive workloads further tuning can be done by SW to
|
||||
get desired performance.
|
||||
|
||||
The hardware monitors the average CPU utilization across all cores
|
||||
in a power domain at regular intervals and decides an uncore frequency.
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||||
While this may result in the best performance per watt, workload may be
|
||||
expecting higher performance at the expense of power. Consider an
|
||||
application that intermittently wakes up to perform memory reads on an
|
||||
otherwise idle system. In such cases, if hardware lowers uncore
|
||||
frequency, then there may be delay in ramp up of frequency to meet
|
||||
target performance.
|
||||
|
||||
The ELC control defines some parameters which can be changed from SW.
|
||||
If the average CPU utilization is below a user-defined threshold
|
||||
(elc_low_threshold_percent attribute below), the user-defined uncore
|
||||
floor frequency will be used (elc_floor_freq_khz attribute below)
|
||||
instead of hardware calculated minimum.
|
||||
|
||||
Similarly in high load scenario where the CPU utilization goes above
|
||||
the high threshold value (elc_high_threshold_percent attribute below)
|
||||
instead of jumping to maximum uncore frequency, frequency is increased
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||||
in 100MHz steps. This avoids consuming unnecessarily high power
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||||
immediately with CPU utilization spikes.
|
||||
|
||||
Attributes for efficiency latency control:
|
||||
|
||||
``elc_floor_freq_khz``
|
||||
This attribute is used to get/set the efficiency latency floor frequency.
|
||||
If this variable is lower than the 'min_freq_khz', it is ignored by
|
||||
the firmware.
|
||||
|
||||
``elc_low_threshold_percent``
|
||||
This attribute is used to get/set the efficiency latency control low
|
||||
threshold. This attribute is in percentages of CPU utilization.
|
||||
|
||||
``elc_high_threshold_percent``
|
||||
This attribute is used to get/set the efficiency latency control high
|
||||
threshold. This attribute is in percentages of CPU utilization.
|
||||
|
||||
``elc_high_threshold_enable``
|
||||
This attribute is used to enable/disable the efficiency latency control
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||||
high threshold. Write '1' to enable, '0' to disable.
|
||||
|
||||
Example system configuration below, which does following:
|
||||
* when CPU utilization is less than 10%: sets uncore frequency to 800MHz
|
||||
* when CPU utilization is higher than 95%: increases uncore frequency in
|
||||
100MHz steps, until power limit is reached
|
||||
|
||||
elc_floor_freq_khz:800000
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||||
elc_high_threshold_percent:95
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||||
elc_high_threshold_enable:1
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||||
elc_low_threshold_percent:10
|
||||
|
||||
@@ -1,17 +0,0 @@
|
||||
* ARC HS Performance Counters
|
||||
|
||||
The ARC HS can be configured with a pipeline performance monitor for counting
|
||||
CPU and cache events like cache misses and hits. Like conventional PCT there
|
||||
are 100+ hardware conditions dynamically mapped to up to 32 counters.
|
||||
It also supports overflow interrupts.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : should contain
|
||||
"snps,archs-pct"
|
||||
|
||||
Example:
|
||||
|
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pmu {
|
||||
compatible = "snps,archs-pct";
|
||||
};
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||||
@@ -0,0 +1,33 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arc/snps,archs-pct.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARC HS Performance Counters
|
||||
|
||||
maintainers:
|
||||
- Aryabhatta Dey <aryabhattadey35@gmail.com>
|
||||
|
||||
description:
|
||||
The ARC HS can be configured with a pipeline performance monitor for counting
|
||||
CPU and cache events like cache misses and hits. Like conventional PCT there
|
||||
are 100+ hardware conditions dynamically mapped to up to 32 counters.
|
||||
It also supports overflow interrupts.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: snps,archs-pct
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
@@ -17,7 +17,7 @@ description: |
|
||||
The Coresight dummy source component is for the specific coresight source
|
||||
devices kernel don't have permission to access or configure. For some SOCs,
|
||||
there would be Coresight source trace components on sub-processor which
|
||||
are conneted to AP processor via debug bus. For these devices, a dummy driver
|
||||
are connected to AP processor via debug bus. For these devices, a dummy driver
|
||||
is needed to register them as Coresight source devices, so that paths can be
|
||||
created in the driver. It provides Coresight API for operations on dummy
|
||||
source devices, such as enabling and disabling them. It also provides the
|
||||
|
||||
@@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
title: ARM Corstone1000
|
||||
|
||||
maintainers:
|
||||
- Vishnu Banavath <vishnu.banavath@arm.com>
|
||||
- Rui Miguel Silva <rui.silva@linaro.org>
|
||||
- Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
|
||||
- Hugues Kamba Mpiana <hugues.kambampiana@arm.com>
|
||||
|
||||
description: |+
|
||||
ARM's Corstone1000 includes pre-verified Corstone SSE-710 subsystem that
|
||||
|
||||
@@ -30,6 +30,8 @@ select:
|
||||
- marvell,armada-3700-ahci
|
||||
- marvell,armada-8k-ahci
|
||||
- marvell,berlin2q-ahci
|
||||
- qcom,apq8064-ahci
|
||||
- qcom,ipq806x-ahci
|
||||
- socionext,uniphier-pro4-ahci
|
||||
- socionext,uniphier-pxs2-ahci
|
||||
- socionext,uniphier-pxs3-ahci
|
||||
@@ -45,6 +47,8 @@ properties:
|
||||
- marvell,armada-8k-ahci
|
||||
- marvell,berlin2-ahci
|
||||
- marvell,berlin2q-ahci
|
||||
- qcom,apq8064-ahci
|
||||
- qcom,ipq806x-ahci
|
||||
- socionext,uniphier-pro4-ahci
|
||||
- socionext,uniphier-pxs2-ahci
|
||||
- socionext,uniphier-pxs3-ahci
|
||||
@@ -64,11 +68,11 @@ properties:
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
maxItems: 5
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
maxItems: 5
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
@@ -97,6 +101,31 @@ required:
|
||||
|
||||
allOf:
|
||||
- $ref: ahci-common.yaml#
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,apq8064-ahci
|
||||
- qcom,ipq806x-ahci
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 5
|
||||
clock-names:
|
||||
items:
|
||||
- const: slave_iface
|
||||
- const: iface
|
||||
- const: core
|
||||
- const: rxoob
|
||||
- const: pmalive
|
||||
required:
|
||||
- phys
|
||||
- phy-names
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
||||
@@ -19,6 +19,7 @@ properties:
|
||||
- fsl,imx53-ahci
|
||||
- fsl,imx6q-ahci
|
||||
- fsl,imx6qp-ahci
|
||||
- fsl,imx8qm-ahci
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
@@ -27,12 +28,14 @@ properties:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 2
|
||||
items:
|
||||
- description: sata clock
|
||||
- description: sata reference clock
|
||||
- description: ahb clock
|
||||
|
||||
clock-names:
|
||||
minItems: 2
|
||||
items:
|
||||
- const: sata
|
||||
- const: sata_ref
|
||||
@@ -58,6 +61,25 @@ properties:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description: if present, disable spread-spectrum clocking on the SATA link.
|
||||
|
||||
phys:
|
||||
items:
|
||||
- description: phandle to SATA PHY.
|
||||
Since "REXT" pin is only present for first lane of i.MX8QM PHY, it's
|
||||
calibration result will be stored, passed through second lane, and
|
||||
shared with all three lanes PHY. The first two lanes PHY are used as
|
||||
calibration PHYs, although only the third lane PHY is used by SATA.
|
||||
- description: phandle to the first lane PHY of i.MX8QM.
|
||||
- description: phandle to the second lane PHY of i.MX8QM.
|
||||
|
||||
phy-names:
|
||||
items:
|
||||
- const: sata-phy
|
||||
- const: cali-phy0
|
||||
- const: cali-phy1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
@@ -65,6 +87,31 @@ required:
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- fsl,imx53-ahci
|
||||
- fsl,imx6q-ahci
|
||||
- fsl,imx6qp-ahci
|
||||
then:
|
||||
properties:
|
||||
clock-names:
|
||||
minItems: 3
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- fsl,imx8qm-ahci
|
||||
then:
|
||||
properties:
|
||||
clock-names:
|
||||
minItems: 2
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
||||
@@ -1,48 +0,0 @@
|
||||
* Qualcomm AHCI SATA Controller
|
||||
|
||||
SATA nodes are defined to describe on-chip Serial ATA controllers.
|
||||
Each SATA controller should have its own node.
|
||||
|
||||
Required properties:
|
||||
- compatible : compatible list, must contain "generic-ahci"
|
||||
- interrupts : <interrupt mapping for SATA IRQ>
|
||||
- reg : <registers mapping>
|
||||
- phys : Must contain exactly one entry as specified
|
||||
in phy-bindings.txt
|
||||
- phy-names : Must be "sata-phy"
|
||||
|
||||
Required properties for "qcom,ipq806x-ahci" compatible:
|
||||
- clocks : Must contain an entry for each entry in clock-names.
|
||||
- clock-names : Shall be:
|
||||
"slave_iface" - Fabric port AHB clock for SATA
|
||||
"iface" - AHB clock
|
||||
"core" - core clock
|
||||
"rxoob" - RX out-of-band clock
|
||||
"pmalive" - Power Module Alive clock
|
||||
- assigned-clocks : Shall be:
|
||||
SATA_RXOOB_CLK
|
||||
SATA_PMALIVE_CLK
|
||||
- assigned-clock-rates : Shall be:
|
||||
100Mhz (100000000) for SATA_RXOOB_CLK
|
||||
100Mhz (100000000) for SATA_PMALIVE_CLK
|
||||
|
||||
Example:
|
||||
sata@29000000 {
|
||||
compatible = "qcom,ipq806x-ahci", "generic-ahci";
|
||||
reg = <0x29000000 0x180>;
|
||||
|
||||
interrupts = <0 209 0x0>;
|
||||
|
||||
clocks = <&gcc SFAB_SATA_S_H_CLK>,
|
||||
<&gcc SATA_H_CLK>,
|
||||
<&gcc SATA_A_CLK>,
|
||||
<&gcc SATA_RXOOB_CLK>,
|
||||
<&gcc SATA_PMALIVE_CLK>;
|
||||
clock-names = "slave_iface", "iface", "core",
|
||||
"rxoob", "pmalive";
|
||||
assigned-clocks = <&gcc SATA_RXOOB_CLK>, <&gcc SATA_PMALIVE_CLK>;
|
||||
assigned-clock-rates = <100000000>, <100000000>;
|
||||
|
||||
phys = <&sata_phy>;
|
||||
phy-names = "sata-phy";
|
||||
};
|
||||
@@ -0,0 +1,32 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/board/fsl,bcsr.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Board Control and Status
|
||||
|
||||
maintainers:
|
||||
- Frank Li <Frank.Li@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- fsl,mpc8360mds-bcsr
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
board@f8000000 {
|
||||
compatible = "fsl,mpc8360mds-bcsr";
|
||||
reg = <0xf8000000 0x8000>;
|
||||
};
|
||||
|
||||
@@ -0,0 +1,70 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/board/fsl,fpga-qixis-i2c.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale on-board FPGA connected on I2C bus
|
||||
|
||||
maintainers:
|
||||
- Frank Li <Frank.Li@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- fsl,bsc9132qds-fpga
|
||||
- const: fsl,fpga-qixis-i2c
|
||||
- items:
|
||||
- enum:
|
||||
- fsl,ls1028aqds-fpga
|
||||
- fsl,lx2160aqds-fpga
|
||||
- const: fsl,fpga-qixis-i2c
|
||||
- const: simple-mfd
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
mux-controller:
|
||||
$ref: /schemas/mux/reg-mux.yaml
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
board-control@66 {
|
||||
compatible = "fsl,bsc9132qds-fpga", "fsl,fpga-qixis-i2c";
|
||||
reg = <0x66>;
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
board-control@66 {
|
||||
compatible = "fsl,ls1028aqds-fpga", "fsl,fpga-qixis-i2c",
|
||||
"simple-mfd";
|
||||
reg = <0x66>;
|
||||
|
||||
mux-controller {
|
||||
compatible = "reg-mux";
|
||||
#mux-control-cells = <1>;
|
||||
mux-reg-masks = <0x54 0xf0>; /* 0: reg 0x54, bits 7:4 */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -0,0 +1,81 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/board/fsl,fpga-qixis.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale on-board FPGA/CPLD
|
||||
|
||||
maintainers:
|
||||
- Frank Li <Frank.Li@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- const: fsl,p1022ds-fpga
|
||||
- const: fsl,fpga-ngpixis
|
||||
- items:
|
||||
- enum:
|
||||
- fsl,ls1088aqds-fpga
|
||||
- fsl,ls1088ardb-fpga
|
||||
- fsl,ls2080aqds-fpga
|
||||
- fsl,ls2080ardb-fpga
|
||||
- const: fsl,fpga-qixis
|
||||
- items:
|
||||
- enum:
|
||||
- fsl,ls1043aqds-fpga
|
||||
- fsl,ls1043ardb-fpga
|
||||
- fsl,ls1046aqds-fpga
|
||||
- fsl,ls1046ardb-fpga
|
||||
- fsl,ls208xaqds-fpga
|
||||
- const: fsl,fpga-qixis
|
||||
- const: simple-mfd
|
||||
- enum:
|
||||
- fsl,ls1043ardb-cpld
|
||||
- fsl,ls1046ardb-cpld
|
||||
- fsl,t1040rdb-cpld
|
||||
- fsl,t1042rdb-cpld
|
||||
- fsl,t1042rdb_pi-cpld
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 1
|
||||
|
||||
ranges:
|
||||
maxItems: 1
|
||||
|
||||
patternProperties:
|
||||
'^mdio-mux@[a-f0-9,]+$':
|
||||
$ref: /schemas/net/mdio-mux-mmioreg.yaml
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
board-control@3 {
|
||||
compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis";
|
||||
reg = <3 0x30>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <8 IRQ_TYPE_LEVEL_LOW 0 0>;
|
||||
};
|
||||
|
||||
- |
|
||||
board-control@3 {
|
||||
compatible = "fsl,ls2080ardb-fpga", "fsl,fpga-qixis";
|
||||
reg = <0x3 0x10000>;
|
||||
};
|
||||
|
||||
@@ -1,81 +0,0 @@
|
||||
Freescale Reference Board Bindings
|
||||
|
||||
This document describes device tree bindings for various devices that
|
||||
exist on some Freescale reference boards.
|
||||
|
||||
* Board Control and Status (BCSR)
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : Should be "fsl,<board>-bcsr"
|
||||
- reg : Offset and length of the register set for the device
|
||||
|
||||
Example:
|
||||
|
||||
bcsr@f8000000 {
|
||||
compatible = "fsl,mpc8360mds-bcsr";
|
||||
reg = <f8000000 8000>;
|
||||
};
|
||||
|
||||
* Freescale on-board FPGA
|
||||
|
||||
This is the memory-mapped registers for on board FPGA.
|
||||
|
||||
Required properties:
|
||||
- compatible: should be a board-specific string followed by a string
|
||||
indicating the type of FPGA. Example:
|
||||
"fsl,<board>-fpga", "fsl,fpga-pixis", or
|
||||
"fsl,<board>-fpga", "fsl,fpga-qixis"
|
||||
- reg: should contain the address and the length of the FPGA register set.
|
||||
|
||||
Optional properties:
|
||||
- interrupts: should specify event (wakeup) IRQ.
|
||||
|
||||
Example (P1022DS):
|
||||
|
||||
board-control@3,0 {
|
||||
compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis";
|
||||
reg = <3 0 0x30>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <8 8 0 0>;
|
||||
};
|
||||
|
||||
Example (LS2080A-RDB):
|
||||
|
||||
cpld@3,0 {
|
||||
compatible = "fsl,ls2080ardb-fpga", "fsl,fpga-qixis";
|
||||
reg = <0x3 0 0x10000>;
|
||||
};
|
||||
|
||||
* Freescale on-board FPGA connected on I2C bus
|
||||
|
||||
Some Freescale boards like BSC9132QDS have on board FPGA connected on
|
||||
the i2c bus.
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be a board-specific string followed by a string
|
||||
indicating the type of FPGA. Example:
|
||||
"fsl,<board>-fpga", "fsl,fpga-qixis-i2c"
|
||||
- reg: Should contain the address of the FPGA
|
||||
|
||||
Example:
|
||||
fpga: fpga@66 {
|
||||
compatible = "fsl,bsc9132qds-fpga", "fsl,fpga-qixis-i2c";
|
||||
reg = <0x66>;
|
||||
};
|
||||
|
||||
* Freescale on-board CPLD
|
||||
|
||||
Some Freescale boards like T1040RDB have an on board CPLD connected.
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be a board-specific string like "fsl,<board>-cpld"
|
||||
Example:
|
||||
"fsl,t1040rdb-cpld", "fsl,t1042rdb-cpld", "fsl,t1042rdb_pi-cpld"
|
||||
- reg: should describe CPLD registers
|
||||
|
||||
Example:
|
||||
cpld@3,0 {
|
||||
compatible = "fsl,t1040rdb-cpld";
|
||||
reg = <3 0 0x300>;
|
||||
};
|
||||
@@ -1,138 +0,0 @@
|
||||
Qualcomm External Bus Interface 2 (EBI2)
|
||||
|
||||
The EBI2 contains two peripheral blocks: XMEM and LCDC. The XMEM handles any
|
||||
external memory (such as NAND or other memory-mapped peripherals) whereas
|
||||
LCDC handles LCD displays.
|
||||
|
||||
As it says it connects devices to an external bus interface, meaning address
|
||||
lines (up to 9 address lines so can only address 1KiB external memory space),
|
||||
data lines (16 bits), OE (output enable), ADV (address valid, used on some
|
||||
NOR flash memories), WE (write enable). This on top of 6 different chip selects
|
||||
(CS0 thru CS5) so that in theory 6 different devices can be connected.
|
||||
|
||||
Apparently this bus is clocked at 64MHz. It has dedicated pins on the package
|
||||
and the bus can only come out on these pins, however if some of the pins are
|
||||
unused they can be left unconnected or remuxed to be used as GPIO or in some
|
||||
cases other orthogonal functions as well.
|
||||
|
||||
Also CS1 and CS2 has -A and -B signals. Why they have that is unclear to me.
|
||||
|
||||
The chip selects have the following memory range assignments. This region of
|
||||
memory is referred to as "Chip Peripheral SS FPB0" and is 168MB big.
|
||||
|
||||
Chip Select Physical address base
|
||||
CS0 GPIO134 0x1a800000-0x1b000000 (8MB)
|
||||
CS1 GPIO39 (A) / GPIO123 (B) 0x1b000000-0x1b800000 (8MB)
|
||||
CS2 GPIO40 (A) / GPIO124 (B) 0x1b800000-0x1c000000 (8MB)
|
||||
CS3 GPIO133 0x1d000000-0x25000000 (128 MB)
|
||||
CS4 GPIO132 0x1c800000-0x1d000000 (8MB)
|
||||
CS5 GPIO131 0x1c000000-0x1c800000 (8MB)
|
||||
|
||||
The APQ8060 Qualcomm Application Processor User Guide, 80-N7150-14 Rev. A,
|
||||
August 6, 2012 contains some incomplete documentation of the EBI2.
|
||||
|
||||
FIXME: the manual mentions "write precharge cycles" and "precharge cycles".
|
||||
We have not been able to figure out which bit fields these correspond to
|
||||
in the hardware, or what valid values exist. The current hypothesis is that
|
||||
this is something just used on the FAST chip selects and that the SLOW
|
||||
chip selects are understood fully. There is also a "byte device enable"
|
||||
flag somewhere for 8bit memories.
|
||||
|
||||
FIXME: The chipselects have SLOW and FAST configuration registers. It's a bit
|
||||
unclear what this means, if they are mutually exclusive or can be used
|
||||
together, or if some chip selects are hardwired to be FAST and others are SLOW
|
||||
by design.
|
||||
|
||||
The XMEM registers are totally undocumented but could be partially decoded
|
||||
because the Cypress AN49576 Antioch Westbridge apparently has suspiciously
|
||||
similar register layout, see: http://www.cypress.com/file/105771/download
|
||||
|
||||
Required properties:
|
||||
- compatible: should be one of:
|
||||
"qcom,msm8660-ebi2"
|
||||
"qcom,apq8060-ebi2"
|
||||
- #address-cells: should be <2>: the first cell is the chipselect,
|
||||
the second cell is the offset inside the memory range
|
||||
- #size-cells: should be <1>
|
||||
- ranges: should be set to:
|
||||
ranges = <0 0x0 0x1a800000 0x00800000>,
|
||||
<1 0x0 0x1b000000 0x00800000>,
|
||||
<2 0x0 0x1b800000 0x00800000>,
|
||||
<3 0x0 0x1d000000 0x08000000>,
|
||||
<4 0x0 0x1c800000 0x00800000>,
|
||||
<5 0x0 0x1c000000 0x00800000>;
|
||||
- reg: two ranges of registers: EBI2 config and XMEM config areas
|
||||
- reg-names: should be "ebi2", "xmem"
|
||||
- clocks: two clocks, EBI_2X and EBI
|
||||
- clock-names: should be "ebi2x", "ebi2"
|
||||
|
||||
Optional subnodes:
|
||||
- Nodes inside the EBI2 will be considered device nodes.
|
||||
|
||||
The following optional properties are properties that can be tagged onto
|
||||
any device subnode. We are assuming that there can be only ONE device per
|
||||
chipselect subnode, else the properties will become ambiguous.
|
||||
|
||||
Optional properties arrays for SLOW chip selects:
|
||||
- qcom,xmem-recovery-cycles: recovery cycles is the time the memory continues to
|
||||
drive the data bus after OE is de-asserted, in order to avoid contention on
|
||||
the data bus. They are inserted when reading one CS and switching to another
|
||||
CS or read followed by write on the same CS. Valid values 0 thru 15. Minimum
|
||||
value is actually 1, so a value of 0 will still yield 1 recovery cycle.
|
||||
- qcom,xmem-write-hold-cycles: write hold cycles, these are extra cycles
|
||||
inserted after every write minimum 1. The data out is driven from the time
|
||||
WE is asserted until CS is asserted. With a hold of 1 (value = 0), the CS
|
||||
stays active for 1 extra cycle etc. Valid values 0 thru 15.
|
||||
- qcom,xmem-write-delta-cycles: initial latency for write cycles inserted for
|
||||
the first write to a page or burst memory. Valid values 0 thru 255.
|
||||
- qcom,xmem-read-delta-cycles: initial latency for read cycles inserted for the
|
||||
first read to a page or burst memory. Valid values 0 thru 255.
|
||||
- qcom,xmem-write-wait-cycles: number of wait cycles for every write access, 0=1
|
||||
cycle. Valid values 0 thru 15.
|
||||
- qcom,xmem-read-wait-cycles: number of wait cycles for every read access, 0=1
|
||||
cycle. Valid values 0 thru 15.
|
||||
|
||||
Optional properties arrays for FAST chip selects:
|
||||
- qcom,xmem-address-hold-enable: this is a boolean property stating that we
|
||||
shall hold the address for an extra cycle to meet hold time requirements
|
||||
with ADV assertion.
|
||||
- qcom,xmem-adv-to-oe-recovery-cycles: the number of cycles elapsed before an OE
|
||||
assertion, with respect to the cycle where ADV (address valid) is asserted.
|
||||
2 means 2 cycles between ADV and OE. Valid values 0, 1, 2 or 3.
|
||||
- qcom,xmem-read-hold-cycles: the length in cycles of the first segment of a
|
||||
read transfer. For a single read transfer this will be the time from CS
|
||||
assertion to OE assertion. Valid values 0 thru 15.
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
ebi2@1a100000 {
|
||||
compatible = "qcom,apq8060-ebi2";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x0 0x1a800000 0x00800000>,
|
||||
<1 0x0 0x1b000000 0x00800000>,
|
||||
<2 0x0 0x1b800000 0x00800000>,
|
||||
<3 0x0 0x1d000000 0x08000000>,
|
||||
<4 0x0 0x1c800000 0x00800000>,
|
||||
<5 0x0 0x1c000000 0x00800000>;
|
||||
reg = <0x1a100000 0x1000>, <0x1a110000 0x1000>;
|
||||
reg-names = "ebi2", "xmem";
|
||||
clocks = <&gcc EBI2_2X_CLK>, <&gcc EBI2_CLK>;
|
||||
clock-names = "ebi2x", "ebi2";
|
||||
/* Make sure to set up the pin control for the EBI2 */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&foo_ebi2_pins>;
|
||||
|
||||
foo-ebi2@2,0 {
|
||||
compatible = "foo";
|
||||
reg = <2 0x0 0x100>;
|
||||
(...)
|
||||
qcom,xmem-recovery-cycles = <0>;
|
||||
qcom,xmem-write-hold-cycles = <3>;
|
||||
qcom,xmem-write-delta-cycles = <31>;
|
||||
qcom,xmem-read-delta-cycles = <28>;
|
||||
qcom,xmem-write-wait-cycles = <9>;
|
||||
qcom,xmem-read-wait-cycles = <9>;
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,239 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/bus/qcom,ebi2.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm External Bus Interface 2 (EBI2)
|
||||
|
||||
description: |
|
||||
The EBI2 contains two peripheral blocks: XMEM and LCDC. The XMEM handles any
|
||||
external memory (such as NAND or other memory-mapped peripherals) whereas
|
||||
LCDC handles LCD displays.
|
||||
|
||||
As it says it connects devices to an external bus interface, meaning address
|
||||
lines (up to 9 address lines so can only address 1KiB external memory space),
|
||||
data lines (16 bits), OE (output enable), ADV (address valid, used on some
|
||||
NOR flash memories), WE (write enable). This on top of 6 different chip selects
|
||||
(CS0 thru CS5) so that in theory 6 different devices can be connected.
|
||||
|
||||
Apparently this bus is clocked at 64MHz. It has dedicated pins on the package
|
||||
and the bus can only come out on these pins, however if some of the pins are
|
||||
unused they can be left unconnected or remuxed to be used as GPIO or in some
|
||||
cases other orthogonal functions as well.
|
||||
|
||||
Also CS1 and CS2 has -A and -B signals. Why they have that is unclear to me.
|
||||
|
||||
The chip selects have the following memory range assignments. This region of
|
||||
memory is referred to as "Chip Peripheral SS FPB0" and is 168MB big.
|
||||
|
||||
Chip Select Physical address base
|
||||
CS0 GPIO134 0x1a800000-0x1b000000 (8MB)
|
||||
CS1 GPIO39 (A) / GPIO123 (B) 0x1b000000-0x1b800000 (8MB)
|
||||
CS2 GPIO40 (A) / GPIO124 (B) 0x1b800000-0x1c000000 (8MB)
|
||||
CS3 GPIO133 0x1d000000-0x25000000 (128 MB)
|
||||
CS4 GPIO132 0x1c800000-0x1d000000 (8MB)
|
||||
CS5 GPIO131 0x1c000000-0x1c800000 (8MB)
|
||||
|
||||
The APQ8060 Qualcomm Application Processor User Guide, 80-N7150-14 Rev. A,
|
||||
August 6, 2012 contains some incomplete documentation of the EBI2.
|
||||
|
||||
FIXME: the manual mentions "write precharge cycles" and "precharge cycles".
|
||||
We have not been able to figure out which bit fields these correspond to
|
||||
in the hardware, or what valid values exist. The current hypothesis is that
|
||||
this is something just used on the FAST chip selects and that the SLOW
|
||||
chip selects are understood fully. There is also a "byte device enable"
|
||||
flag somewhere for 8bit memories.
|
||||
|
||||
FIXME: The chipselects have SLOW and FAST configuration registers. It's a bit
|
||||
unclear what this means, if they are mutually exclusive or can be used
|
||||
together, or if some chip selects are hardwired to be FAST and others are SLOW
|
||||
by design.
|
||||
|
||||
The XMEM registers are totally undocumented but could be partially decoded
|
||||
because the Cypress AN49576 Antioch Westbridge apparently has suspiciously
|
||||
similar register layout, see: http://www.cypress.com/file/105771/download
|
||||
|
||||
maintainers:
|
||||
- Bjorn Andersson <andersson@kernel.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,apq8060-ebi2
|
||||
- qcom,msm8660-ebi2
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: EBI2 config region
|
||||
- description: XMEM config region
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: ebi2
|
||||
- const: xmem
|
||||
|
||||
ranges: true
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: EBI_2X clock
|
||||
- description: EBI clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: ebi2x
|
||||
- const: ebi2
|
||||
|
||||
'#address-cells':
|
||||
const: 2
|
||||
|
||||
'#size-cells':
|
||||
const: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
- ranges
|
||||
- clocks
|
||||
- clock-names
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
|
||||
patternProperties:
|
||||
"^.*@[0-5],[0-9a-f]+$":
|
||||
type: object
|
||||
additionalProperties: true
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
# SLOW chip selects
|
||||
qcom,xmem-recovery-cycles:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: >
|
||||
The time the memory continues to drive the data bus after OE
|
||||
is de-asserted, in order to avoid contention on the data bus.
|
||||
They are inserted when reading one CS and switching to another
|
||||
CS or read followed by write on the same CS. Minimum value is
|
||||
actually 1, so a value of 0 will still yield 1 recovery cycle.
|
||||
minimum: 0
|
||||
maximum: 15
|
||||
|
||||
qcom,xmem-write-hold-cycles:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: >
|
||||
The extra cycles inserted after every write minimum 1. The
|
||||
data out is driven from the time WE is asserted until CS is
|
||||
asserted. With a hold of 1 (value = 0), the CS stays active
|
||||
for 1 extra cycle, etc.
|
||||
minimum: 0
|
||||
maximum: 15
|
||||
|
||||
qcom,xmem-write-delta-cycles:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: >
|
||||
The initial latency for write cycles inserted for the first
|
||||
write to a page or burst memory.
|
||||
minimum: 0
|
||||
maximum: 255
|
||||
|
||||
qcom,xmem-read-delta-cycles:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: >
|
||||
The initial latency for read cycles inserted for the first
|
||||
read to a page or burst memory.
|
||||
minimum: 0
|
||||
maximum: 255
|
||||
|
||||
qcom,xmem-write-wait-cycles:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: >
|
||||
The number of wait cycles for every write access.
|
||||
minimum: 0
|
||||
maximum: 15
|
||||
|
||||
qcom,xmem-read-wait-cycles:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: >
|
||||
The number of wait cycles for every read access.
|
||||
minimum: 0
|
||||
maximum: 15
|
||||
|
||||
|
||||
# FAST chip selects
|
||||
qcom,xmem-address-hold-enable:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: >
|
||||
Holds the address for an extra cycle to meet hold time
|
||||
requirements with ADV assertion, when set to 1.
|
||||
enum: [ 0, 1 ]
|
||||
|
||||
qcom,xmem-adv-to-oe-recovery-cycles:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: >
|
||||
The number of cycles elapsed before an OE assertion, with
|
||||
respect to the cycle where ADV (address valid) is asserted.
|
||||
minimum: 0
|
||||
maximum: 3
|
||||
|
||||
qcom,xmem-read-hold-cycles:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: >
|
||||
The length in cycles of the first segment of a read transfer.
|
||||
For a single read transfer this will be the time from CS
|
||||
assertion to OE assertion.
|
||||
minimum: 0
|
||||
maximum: 15
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,gcc-msm8660.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
external-bus@1a100000 {
|
||||
compatible = "qcom,msm8660-ebi2";
|
||||
reg = <0x1a100000 0x1000>, <0x1a110000 0x1000>;
|
||||
reg-names = "ebi2", "xmem";
|
||||
ranges = <0 0x0 0x1a800000 0x00800000>,
|
||||
<1 0x0 0x1b000000 0x00800000>,
|
||||
<2 0x0 0x1b800000 0x00800000>,
|
||||
<3 0x0 0x1d000000 0x08000000>,
|
||||
<4 0x0 0x1c800000 0x00800000>,
|
||||
<5 0x0 0x1c000000 0x00800000>;
|
||||
|
||||
clocks = <&gcc EBI2_2X_CLK>, <&gcc EBI2_CLK>;
|
||||
clock-names = "ebi2x", "ebi2";
|
||||
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
|
||||
ethernet@2,0 {
|
||||
compatible = "smsc,lan9221", "smsc,lan9115";
|
||||
reg = <2 0x0 0x100>;
|
||||
|
||||
interrupts-extended = <&pm8058_gpio 7 IRQ_TYPE_EDGE_FALLING>,
|
||||
<&tlmm 29 IRQ_TYPE_EDGE_RISING>;
|
||||
reset-gpios = <&tlmm 30 GPIO_ACTIVE_LOW>;
|
||||
|
||||
phy-mode = "mii";
|
||||
reg-io-width = <2>;
|
||||
smsc,force-external-phy;
|
||||
smsc,irq-push-pull;
|
||||
|
||||
/* SLOW chipselect config */
|
||||
qcom,xmem-recovery-cycles = <0>;
|
||||
qcom,xmem-write-hold-cycles = <3>;
|
||||
qcom,xmem-write-delta-cycles = <31>;
|
||||
qcom,xmem-read-delta-cycles = <28>;
|
||||
qcom,xmem-write-wait-cycles = <9>;
|
||||
qcom,xmem-read-wait-cycles = <9>;
|
||||
};
|
||||
};
|
||||
@@ -126,8 +126,6 @@ required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#clock-cells'
|
||||
- idt,shutdown
|
||||
- idt,output-enable-active
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
|
||||
@@ -1,54 +0,0 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/mediatek,mt6795-sys-clock.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MediaTek System Clock Controller for MT6795
|
||||
|
||||
maintainers:
|
||||
- AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
|
||||
- Chun-Jie Chen <chun-jie.chen@mediatek.com>
|
||||
|
||||
description:
|
||||
The Mediatek system clock controller provides various clocks and system
|
||||
configuration like reset and bus protection on MT6795.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- mediatek,mt6795-apmixedsys
|
||||
- mediatek,mt6795-infracfg
|
||||
- mediatek,mt6795-pericfg
|
||||
- mediatek,mt6795-topckgen
|
||||
- const: syscon
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
'#reset-cells':
|
||||
const: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#clock-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
soc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
topckgen: clock-controller@10000000 {
|
||||
compatible = "mediatek,mt6795-topckgen", "syscon";
|
||||
reg = <0 0x10000000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
};
|
||||
@@ -385,7 +385,7 @@ patternProperties:
|
||||
|
||||
This property is required in idle state nodes of device tree meant
|
||||
for RISC-V systems. For more details on the suspend_type parameter
|
||||
refer the SBI specifiation v0.3 (or higher) [7].
|
||||
refer the SBI specification v0.3 (or higher) [7].
|
||||
|
||||
local-timer-stop:
|
||||
description:
|
||||
|
||||
@@ -1,37 +0,0 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/cpu/nvidia,tegra186-ccplex-cluster.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra186 CCPLEX Cluster
|
||||
|
||||
maintainers:
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
- Jon Hunter <jonathanh@nvidia.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: nvidia,tegra186-ccplex-cluster
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
nvidia,bpmp:
|
||||
description: phandle to the BPMP used to query CPU frequency tables
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- nvidia,bpmp
|
||||
|
||||
examples:
|
||||
- |
|
||||
ccplex@e000000 {
|
||||
compatible = "nvidia,tegra186-ccplex-cluster";
|
||||
reg = <0x0e000000 0x400000>;
|
||||
nvidia,bpmp = <&bpmp>;
|
||||
};
|
||||
@@ -92,12 +92,31 @@ properties:
|
||||
reference to a valid DPI output or input endpoint node.
|
||||
|
||||
port@2:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
unevaluatedProperties: false
|
||||
description: |
|
||||
eDP/DP output port. The remote endpoint phandle should be a
|
||||
reference to a valid eDP panel input endpoint node. This port is
|
||||
optional, treated as DP panel if not defined
|
||||
|
||||
properties:
|
||||
endpoint:
|
||||
$ref: /schemas/media/video-interfaces.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
properties:
|
||||
toshiba,pre-emphasis:
|
||||
description:
|
||||
Display port output Pre-Emphasis settings for both DP lanes.
|
||||
$ref: /schemas/types.yaml#/definitions/uint8-array
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
items:
|
||||
enum:
|
||||
- 0 # No pre-emphasis
|
||||
- 1 # 3.5dB pre-emphasis
|
||||
- 2 # 6dB pre-emphasis
|
||||
|
||||
oneOf:
|
||||
- required:
|
||||
- port@0
|
||||
|
||||
@@ -50,6 +50,14 @@ properties:
|
||||
- const: disp_axi
|
||||
minItems: 1
|
||||
|
||||
dmas:
|
||||
items:
|
||||
- description: DMA specifier for the RX DMA channel.
|
||||
|
||||
dma-names:
|
||||
items:
|
||||
- const: rx
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: LCDIF DMA interrupt
|
||||
@@ -156,6 +164,18 @@ allOf:
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
- if:
|
||||
not:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- fsl,imx28-lcdif
|
||||
then:
|
||||
properties:
|
||||
dmas: false
|
||||
dma-names: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/imx6sx-clock.h>
|
||||
|
||||
@@ -16,7 +16,7 @@ maintainers:
|
||||
description:
|
||||
This binding extends the data mapping defined in lvds-data-mapping.yaml.
|
||||
It supports reversing the bit order on the formats defined there in order
|
||||
to accomodate for even more specialized data formats, since a variety of
|
||||
to accommodate for even more specialized data formats, since a variety of
|
||||
data formats and layouts is used to drive LVDS displays.
|
||||
|
||||
properties:
|
||||
|
||||
@@ -62,6 +62,9 @@ properties:
|
||||
- const: default
|
||||
- const: sleep
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
@@ -76,6 +79,20 @@ required:
|
||||
- clock-names
|
||||
- port
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
not:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- mediatek,mt6795-dpi
|
||||
- mediatek,mt8173-dpi
|
||||
- mediatek,mt8186-dpi
|
||||
then:
|
||||
properties:
|
||||
power-domains: false
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
||||
@@ -19,14 +19,15 @@ properties:
|
||||
- qcom,hdmi-tx-8974
|
||||
- qcom,hdmi-tx-8994
|
||||
- qcom,hdmi-tx-8996
|
||||
- qcom,hdmi-tx-8998
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 5
|
||||
maxItems: 8
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
maxItems: 5
|
||||
maxItems: 8
|
||||
|
||||
reg:
|
||||
minItems: 1
|
||||
@@ -142,6 +143,7 @@ allOf:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 5
|
||||
maxItems: 5
|
||||
clock-names:
|
||||
items:
|
||||
- const: mdp_core
|
||||
@@ -151,6 +153,28 @@ allOf:
|
||||
- const: extp
|
||||
hdmi-mux-supplies: false
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,hdmi-tx-8998
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 8
|
||||
maxItems: 8
|
||||
clock-names:
|
||||
items:
|
||||
- const: mdp_core
|
||||
- const: iface
|
||||
- const: core
|
||||
- const: alt_iface
|
||||
- const: extp
|
||||
- const: bus
|
||||
- const: mnoc
|
||||
- const: iface_mmss
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
||||
@@ -9,20 +9,20 @@ title: BOE TH101MB31IG002-28A WXGA DSI Display Panel
|
||||
maintainers:
|
||||
- Manuel Traut <manut@mecka.net>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
# BOE TH101MB31IG002-28A 10.1" WXGA TFT LCD panel
|
||||
- boe,th101mb31ig002-28a
|
||||
# The Starry-er88577 is a 10.1" WXGA TFT-LCD panel
|
||||
- starry,er88577
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
backlight: true
|
||||
enable-gpios: true
|
||||
reset-gpios: true
|
||||
power-supply: true
|
||||
port: true
|
||||
rotation: true
|
||||
@@ -33,6 +33,20 @@ required:
|
||||
- enable-gpios
|
||||
- power-supply
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
# The Starry-er88577 is a 10.1" WXGA TFT-LCD panel
|
||||
const: starry,er88577
|
||||
then:
|
||||
properties:
|
||||
reset-gpios: false
|
||||
else:
|
||||
required:
|
||||
- reset-gpios
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
@@ -47,6 +61,7 @@ examples:
|
||||
reg = <0>;
|
||||
backlight = <&backlight_lcd0>;
|
||||
enable-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
|
||||
reset-gpios = <&gpio 55 GPIO_ACTIVE_LOW>;
|
||||
rotation = <90>;
|
||||
power-supply = <&vcc_3v3>;
|
||||
port {
|
||||
|
||||
@@ -0,0 +1,63 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/boe,tv101wum-ll2.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: BOE TV101WUM-LL2 DSI Display Panel
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: boe,tv101wum-ll2
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
description: DSI virtual channel
|
||||
|
||||
backlight: true
|
||||
reset-gpios: true
|
||||
vsp-supply: true
|
||||
vsn-supply: true
|
||||
port: true
|
||||
rotation: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reset-gpios
|
||||
- vsp-supply
|
||||
- vsn-supply
|
||||
- port
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
dsi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
panel@0 {
|
||||
compatible = "boe,tv101wum-ll2";
|
||||
reg = <0>;
|
||||
|
||||
vsn-supply = <&vsn_lcd>;
|
||||
vsp-supply = <&vsp_lcd>;
|
||||
|
||||
reset-gpios = <&pio 45 GPIO_ACTIVE_LOW>;
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&dsi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@@ -15,14 +15,12 @@ description:
|
||||
such as the HannStar HSD060BHW4 720x1440 TFT LCD panel connected with
|
||||
a MIPI-DSI video interface.
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- hannstar,hsd060bhw4
|
||||
- microchip,ac40t08a-mipi-panel
|
||||
- powkiddy,x55-panel
|
||||
- const: himax,hx8394
|
||||
|
||||
@@ -46,7 +44,6 @@ properties:
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reset-gpios
|
||||
- backlight
|
||||
- port
|
||||
- vcc-supply
|
||||
@@ -54,6 +51,18 @@ required:
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
- if:
|
||||
not:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- microchip,ac40t08a-mipi-panel
|
||||
then:
|
||||
required:
|
||||
- reset-gpios
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
@@ -16,6 +16,7 @@ properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- densitron,dmt028vghmcmi-1d
|
||||
- ortustech,com35h3p70ulc
|
||||
- const: ilitek,ili9806e
|
||||
|
||||
|
||||
@@ -18,6 +18,7 @@ properties:
|
||||
- enum:
|
||||
- chongzhou,cz101b4001
|
||||
- kingdisplay,kd101ne3-40ti
|
||||
- melfas,lmfbx101117480
|
||||
- radxa,display-10hd-ad001
|
||||
- radxa,display-8hd-ad002
|
||||
- const: jadard,jd9365da-h3
|
||||
|
||||
@@ -84,11 +84,7 @@ properties:
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
backlight: true
|
||||
enable-gpios: true
|
||||
power-supply: true
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
@@ -158,6 +158,8 @@ properties:
|
||||
- innolux,at070tn92
|
||||
# Innolux G070ACE-L01 7" WVGA (800x480) TFT LCD panel
|
||||
- innolux,g070ace-l01
|
||||
# Innolux G070ACE-LH3 7" WVGA (800x480) TFT LCD panel with WLED backlight
|
||||
- innolux,g070ace-lh3
|
||||
# Innolux G070Y2-L01 7" WVGA (800x480) TFT LCD panel
|
||||
- innolux,g070y2-l01
|
||||
# Innolux G070Y2-T02 7" WVGA (800x480) TFT LCD TTL panel
|
||||
@@ -222,6 +224,8 @@ properties:
|
||||
- okaya,rs800480t-7x0gp
|
||||
# Olimex 4.3" TFT LCD panel
|
||||
- olimex,lcd-olinuxino-43-ts
|
||||
# On Tat Industrial Company 5" DPI TFT panel.
|
||||
- ontat,kd50g21-40nt-a1
|
||||
# On Tat Industrial Company 7" DPI TFT panel.
|
||||
- ontat,yx700wv03
|
||||
# OrtusTech COM37H3M05DTC Blanview 3.7" VGA portrait TFT-LCD panel
|
||||
|
||||
@@ -20,21 +20,19 @@ description: |
|
||||
Densitron DMT028VGHMCMI-1A is 480x640, 2-lane MIPI DSI LCD panel
|
||||
which has built-in ST7701 chip.
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- anbernic,rg-arc-panel
|
||||
- anbernic,rg28xx-panel
|
||||
- densitron,dmt028vghmcmi-1a
|
||||
- elida,kd50t048a
|
||||
- techstar,ts8550b
|
||||
- const: sitronix,st7701
|
||||
|
||||
reg:
|
||||
description: DSI virtual channel used by that screen
|
||||
description: DSI / SPI channel used by that screen
|
||||
maxItems: 1
|
||||
|
||||
VCC-supply:
|
||||
@@ -43,6 +41,13 @@ properties:
|
||||
IOVCC-supply:
|
||||
description: I/O system regulator
|
||||
|
||||
dc-gpios:
|
||||
maxItems: 1
|
||||
description:
|
||||
Controller data/command selection (D/CX) in 4-line SPI mode.
|
||||
If not set, the controller is in 3-line SPI mode.
|
||||
Disallowed for DSI.
|
||||
|
||||
port: true
|
||||
reset-gpios: true
|
||||
rotation: true
|
||||
@@ -57,7 +62,38 @@ required:
|
||||
- port
|
||||
- reset-gpios
|
||||
|
||||
additionalProperties: false
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
# SPI connected panels
|
||||
enum:
|
||||
- anbernic,rg28xx-panel
|
||||
then:
|
||||
$ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
not:
|
||||
contains:
|
||||
# DSI or SPI without D/CX pin
|
||||
enum:
|
||||
- anbernic,rg-arc-panel
|
||||
- anbernic,rg28xx-panel
|
||||
- densitron,dmt028vghmcmi-1a
|
||||
- elida,kd50t048a
|
||||
- techstar,ts8550b
|
||||
then:
|
||||
required:
|
||||
- dc-gpios
|
||||
else:
|
||||
properties:
|
||||
dc-gpios: false
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
@@ -82,3 +118,26 @@ examples:
|
||||
};
|
||||
};
|
||||
};
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel@0 {
|
||||
compatible = "anbernic,rg28xx-panel", "sitronix,st7701";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <3125000>;
|
||||
VCC-supply = <®_lcd>;
|
||||
IOVCC-supply = <®_lcd>;
|
||||
reset-gpios = <&pio 8 14 GPIO_ACTIVE_HIGH>; /* LCD-RST: PI14 */
|
||||
backlight = <&backlight>;
|
||||
|
||||
port {
|
||||
panel_in_rgb: endpoint {
|
||||
remote-endpoint = <&tcon_lcd0_out_lcd>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -18,6 +18,7 @@ properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- enum:
|
||||
- renesas,r9a07g043u-du # RZ/G2UL
|
||||
- renesas,r9a07g044-du # RZ/G2{L,LC}
|
||||
- items:
|
||||
- enum:
|
||||
@@ -60,9 +61,6 @@ properties:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
- port@0
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
renesas,vsps:
|
||||
@@ -88,6 +86,34 @@ required:
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: renesas,r9a07g043u-du
|
||||
then:
|
||||
properties:
|
||||
ports:
|
||||
properties:
|
||||
port@0:
|
||||
description: DPI
|
||||
|
||||
required:
|
||||
- port@0
|
||||
else:
|
||||
properties:
|
||||
ports:
|
||||
properties:
|
||||
port@0:
|
||||
description: DSI
|
||||
port@1:
|
||||
description: DPI
|
||||
|
||||
required:
|
||||
- port@0
|
||||
- port@1
|
||||
|
||||
examples:
|
||||
# RZ/G2L DU
|
||||
- |
|
||||
|
||||
@@ -0,0 +1,49 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/dma/nxp,lpc3220-dmamux.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: DMA multiplexer for LPC32XX SoC (DMA request router)
|
||||
|
||||
maintainers:
|
||||
- J.M.B. Downing <jonathan.downing@nautel.com>
|
||||
- Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
|
||||
|
||||
allOf:
|
||||
- $ref: dma-router.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: nxp,lpc3220-dmamux
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
dma-masters:
|
||||
description: phandle to a dma node compatible with arm,pl080
|
||||
maxItems: 1
|
||||
|
||||
"#dma-cells":
|
||||
const: 3
|
||||
description: |
|
||||
First two cells same as for device pointed in dma-masters.
|
||||
Third cell represents mux value for the request.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- dma-masters
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
dma-router@7c {
|
||||
compatible = "nxp,lpc3220-dmamux";
|
||||
reg = <0x7c 0x8>;
|
||||
dma-masters = <&dma>;
|
||||
#dma-cells = <3>;
|
||||
};
|
||||
|
||||
...
|
||||
@@ -20,7 +20,7 @@ Optional properties:
|
||||
memcpy channels in eDMA.
|
||||
|
||||
Notes:
|
||||
When requesting channel via ti,dra7-dma-crossbar, the DMA clinet must request
|
||||
When requesting channel via ti,dra7-dma-crossbar, the DMA client must request
|
||||
the DMA event number as crossbar ID (input to the DMA crossbar).
|
||||
|
||||
For ti,am335x-edma-crossbar: the meaning of parameters of dmas for clients:
|
||||
|
||||
@@ -18,6 +18,7 @@ description:
|
||||
|
||||
allOf:
|
||||
- $ref: gnss-common.yaml#
|
||||
- $ref: /schemas/serial/serial-peripheral-props.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
||||
@@ -35,11 +35,6 @@ properties:
|
||||
GPIO line, this is used.
|
||||
maxItems: 1
|
||||
|
||||
current-speed:
|
||||
description: The baudrate in bits per second of the device as it comes
|
||||
online, current active speed.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
examples:
|
||||
|
||||
@@ -15,6 +15,7 @@ description:
|
||||
|
||||
allOf:
|
||||
- $ref: gnss-common.yaml#
|
||||
- $ref: /schemas/serial/serial-peripheral-props.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
||||
@@ -21,6 +21,7 @@ description:
|
||||
|
||||
allOf:
|
||||
- $ref: gnss-common.yaml#
|
||||
- $ref: /schemas/serial/serial-peripheral-props.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
||||
@@ -8,6 +8,7 @@ title: U-blox GNSS Receiver
|
||||
|
||||
allOf:
|
||||
- $ref: gnss-common.yaml#
|
||||
- $ref: /schemas/serial/serial-peripheral-props.yaml#
|
||||
|
||||
maintainers:
|
||||
- Johan Hovold <johan@kernel.org>
|
||||
|
||||
@@ -36,7 +36,7 @@ Optional properties for all bus drivers:
|
||||
- st,irq{1,2}-disable: disable IRQ 1/2
|
||||
- st,irq{1,2}-ff-wu-1: raise IRQ 1/2 on FF_WU_1 condition
|
||||
- st,irq{1,2}-ff-wu-2: raise IRQ 1/2 on FF_WU_2 condition
|
||||
- st,irq{1,2}-data-ready: raise IRQ 1/2 on data ready contition
|
||||
- st,irq{1,2}-data-ready: raise IRQ 1/2 on data ready condition
|
||||
- st,irq{1,2}-click: raise IRQ 1/2 on click condition
|
||||
- st,irq-open-drain: consider IRQ lines open-drain
|
||||
- st,irq-active-low: make IRQ lines active low
|
||||
|
||||
@@ -35,40 +35,184 @@ properties:
|
||||
|
||||
- description: Legacy compatibles used on Macintosh devices
|
||||
enum:
|
||||
- AAPL,3500
|
||||
- AAPL,7500
|
||||
- AAPL,8500
|
||||
- AAPL,9500
|
||||
- AAPL,accelerometer_1
|
||||
- AAPL,e411
|
||||
- AAPL,Gossamer
|
||||
- AAPL,PowerBook1998
|
||||
- AAPL,ShinerESB
|
||||
- adm1030
|
||||
- amd-0137
|
||||
- B5221
|
||||
- bmac+
|
||||
- burgundy
|
||||
- cobalt
|
||||
- cy28508
|
||||
- daca
|
||||
- fcu
|
||||
- gatwick
|
||||
- gmac
|
||||
- heathrow
|
||||
- heathrow-ata
|
||||
- heathrow-media-bay
|
||||
- i2sbus
|
||||
- i2s-modem
|
||||
- iMac
|
||||
- K2-GMAC
|
||||
- k2-i2c
|
||||
- K2-Keylargo
|
||||
- K2-UATA
|
||||
- kauai-ata
|
||||
- Keylargo
|
||||
- keylargo-ata
|
||||
- keylargo-media-bay
|
||||
- lm87cimt
|
||||
- MAC,adm1030
|
||||
- MAC,ds1775
|
||||
- MacRISC
|
||||
- MacRISC2
|
||||
- MacRISC3
|
||||
- MacRISC4
|
||||
- max6690
|
||||
- ohare
|
||||
- ohare-media-bay
|
||||
- ohare-swim3
|
||||
- PowerBook1,1
|
||||
- PowerBook2,1
|
||||
- PowerBook2,2
|
||||
- PowerBook3,1
|
||||
- PowerBook3,2
|
||||
- PowerBook3,3
|
||||
- PowerBook3,4
|
||||
- PowerBook3,5
|
||||
- PowerBook4,1
|
||||
- PowerBook4,2
|
||||
- PowerBook4,3
|
||||
- PowerBook5,1
|
||||
- PowerBook5,2
|
||||
- PowerBook5,3
|
||||
- PowerBook5,4
|
||||
- PowerBook5,5
|
||||
- PowerBook5,6
|
||||
- PowerBook5,7
|
||||
- PowerBook5,8
|
||||
- PowerBook5,9
|
||||
- PowerBook6,3
|
||||
- PowerBook6,5
|
||||
- PowerBook6,7
|
||||
- PowerMac10,1
|
||||
- PowerMac10,2
|
||||
- PowerMac1,1
|
||||
- PowerMac11,2
|
||||
- PowerMac12,1
|
||||
- PowerMac2,1
|
||||
- PowerMac2,2
|
||||
- PowerMac3,1
|
||||
- PowerMac3,4
|
||||
- PowerMac3,5
|
||||
- PowerMac3,6
|
||||
- PowerMac4,1
|
||||
- PowerMac4,2
|
||||
- PowerMac4,4
|
||||
- PowerMac4,5
|
||||
- PowerMac7,2
|
||||
- PowerMac7,3
|
||||
- PowerMac8,1
|
||||
- PowerMac8,2
|
||||
- PowerMac9,1
|
||||
- paddington
|
||||
- RackMac1,1
|
||||
- RackMac1,2
|
||||
- RackMac3,1
|
||||
- screamer
|
||||
- shasta-ata
|
||||
- sms
|
||||
- smu-rpm-fans
|
||||
- smu-sat
|
||||
- smu-sensors
|
||||
- snapper
|
||||
- swim3
|
||||
- tumbler
|
||||
- u3-agp
|
||||
- u3-dart
|
||||
- u3-ht
|
||||
- u4-dart
|
||||
- u4-pcie
|
||||
- U4-pcie
|
||||
- uni-n-i2c
|
||||
- uni-north
|
||||
|
||||
- description: Legacy compatibles used on other PowerPC devices
|
||||
enum:
|
||||
- 1682m-gizmo
|
||||
- 1682m-gpio
|
||||
- 1682m-rng
|
||||
- 1682m-sdc
|
||||
- amcc,ppc440epx-rng
|
||||
- amcc,ppc460ex-bcsr
|
||||
- amcc,ppc460ex-crypto
|
||||
- amcc,ppc460ex-rng
|
||||
- amcc,ppc460sx-crypto
|
||||
- amcc,ppc4xx-crypto
|
||||
- amcc,sata-460ex
|
||||
- CBEA,platform-open-pic
|
||||
- CBEA,platform-spider-pic
|
||||
- direct-mapped
|
||||
- display
|
||||
- gpio-mdio
|
||||
- hawk-bridge
|
||||
- hawk-pci
|
||||
- IBM,CBEA
|
||||
- IBM,lhca
|
||||
- IBM,lhea
|
||||
- IBM,lhea-ethernet
|
||||
- ibm,axon-msic
|
||||
- Momentum,Apache
|
||||
- Momentum,Maple
|
||||
- mai-logic,articia-s
|
||||
- mpc10x-pci
|
||||
- mpc5200b-fec-phy
|
||||
- mpc5200-serial
|
||||
- mpc5200-sram
|
||||
- nintendo,flipper
|
||||
- nintendo,flipper-exi
|
||||
- nintendo,flipper-pi
|
||||
- nintendo,flipper-pic
|
||||
- nintendo,hollywood
|
||||
- nintendo,hollywood-pic
|
||||
- nintendo,latte-exi
|
||||
- nintendo,latte-srnprot
|
||||
- ohci-be
|
||||
- ohci-bigendian
|
||||
- ohci-le
|
||||
- PA6T-1682M
|
||||
- pasemi,1682m-iob
|
||||
- pasemi,localbus
|
||||
- pasemi,localbus-nand
|
||||
- pasemi,nemo
|
||||
- pasemi,pwrficient
|
||||
- pasemi,pwrficient-rng
|
||||
- pasemi,rootbus
|
||||
- pasemi,sdc
|
||||
- soc
|
||||
- sony,ps3
|
||||
- sti,platform-spider-pic
|
||||
|
||||
- description: Legacy compatibles used on SPARC devices
|
||||
enum:
|
||||
- bq4802
|
||||
- ds1287
|
||||
- i2cpcf,8584
|
||||
- isa-m5819p
|
||||
- isa-m5823p
|
||||
- m5819
|
||||
- qcn
|
||||
- sab82532
|
||||
- su
|
||||
- sun4v
|
||||
- SUNW,bbc-beep
|
||||
- SUNW,bbc-i2c
|
||||
- SUNW,CS4231
|
||||
@@ -96,9 +240,13 @@ properties:
|
||||
- compat1
|
||||
- compat2
|
||||
- compat3
|
||||
- gpio-mockup
|
||||
- gpio-simulator
|
||||
- gpio-virtuser
|
||||
- linux,spi-loopback-test
|
||||
- mailbox-test
|
||||
- regulator-virtual-consumer
|
||||
- test-device
|
||||
|
||||
- description:
|
||||
Devices on MIPS platform, without any DTS users. These are
|
||||
|
||||
@@ -23,7 +23,9 @@ properties:
|
||||
- enum:
|
||||
- elan,ekth5015m
|
||||
- const: elan,ekth6915
|
||||
- const: elan,ekth6915
|
||||
- enum:
|
||||
- elan,ekth6915
|
||||
- elan,ekth6a12nay
|
||||
|
||||
reg:
|
||||
const: 0x10
|
||||
|
||||
@@ -0,0 +1,71 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/input/goodix,gt7986u.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: GOODIX GT7986U SPI HID Touchscreen
|
||||
|
||||
maintainers:
|
||||
- Charles Wang <charles.goodix@gmail.com>
|
||||
|
||||
description: Supports the Goodix GT7986U touchscreen.
|
||||
This touch controller reports data packaged according to the HID protocol,
|
||||
but is incompatible with Microsoft's HID-over-SPI protocol.
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- goodix,gt7986u
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
|
||||
goodix,hid-report-addr:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description:
|
||||
The register address for retrieving HID report data.
|
||||
This address is related to the device firmware and may
|
||||
change after a firmware update.
|
||||
|
||||
spi-max-frequency: true
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- reset-gpios
|
||||
- goodix,hid-report-addr
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
touchscreen@0 {
|
||||
compatible = "goodix,gt7986u";
|
||||
reg = <0>;
|
||||
interrupt-parent = <&gpio>;
|
||||
interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
|
||||
reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
|
||||
spi-max-frequency = <10000000>;
|
||||
goodix,hid-report-addr = <0x22c8c>;
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@@ -19,6 +19,7 @@ properties:
|
||||
- qcom,pmi632-vib
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,pm6150-vib
|
||||
- qcom,pm7250b-vib
|
||||
- qcom,pm7325b-vib
|
||||
- qcom,pm7550ba-vib
|
||||
|
||||
@@ -60,7 +60,7 @@ properties:
|
||||
The 4th cell is a phandle to a node describing a set of CPUs this
|
||||
interrupt is affine to. The interrupt must be a PPI, and the node
|
||||
pointed must be a subnode of the "ppi-partitions" subnode. For
|
||||
interrupt types other than PPI or PPIs that are not partitionned,
|
||||
interrupt types other than PPI or PPIs that are not partitioned,
|
||||
this cell must be zero. See the "ppi-partitions" node description
|
||||
below.
|
||||
|
||||
|
||||
@@ -1,23 +0,0 @@
|
||||
Aspeed Vectored Interrupt Controller
|
||||
|
||||
These bindings are for the Aspeed interrupt controller. The AST2400 and
|
||||
AST2500 SoC families include a legacy register layout before a re-designed
|
||||
layout, but the bindings do not prescribe the use of one or the other.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "aspeed,ast2400-vic"
|
||||
"aspeed,ast2500-vic"
|
||||
|
||||
- interrupt-controller : Identifies the node as an interrupt controller
|
||||
- #interrupt-cells : Specifies the number of cells needed to encode an
|
||||
interrupt source. The value shall be 1.
|
||||
|
||||
Example:
|
||||
|
||||
vic: interrupt-controller@1e6c0080 {
|
||||
compatible = "aspeed,ast2400-vic";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x1e6c0080 0x80>;
|
||||
};
|
||||
@@ -0,0 +1,62 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2400-vic.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Aspeed Vectored Interrupt Controller
|
||||
|
||||
maintainers:
|
||||
- Andrew Jeffery <andrew@codeconstruct.com.au>
|
||||
|
||||
description:
|
||||
The AST2400 and AST2500 SoC families include a legacy register layout before
|
||||
a redesigned layout, but the bindings do not prescribe the use of one or the
|
||||
other.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- aspeed,ast2400-vic
|
||||
- aspeed,ast2500-vic
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupt-controller: true
|
||||
|
||||
"#interrupt-cells":
|
||||
const: 1
|
||||
description:
|
||||
Specifies the number of cells needed to encode an interrupt source. It
|
||||
must be 1 as the VIC has no configuration options for interrupt sources.
|
||||
The single cell defines the interrupt number.
|
||||
|
||||
valid-sources:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
maxItems: 2
|
||||
description:
|
||||
A bitmap of supported sources for the implementation.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupt-controller
|
||||
- "#interrupt-cells"
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/interrupt-controller.yaml
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
interrupt-controller@1e6c0080 {
|
||||
compatible = "aspeed,ast2400-vic";
|
||||
reg = <0x1e6c0080 0x80>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
valid-sources = <0xffffffff 0x0007ffff>;
|
||||
};
|
||||
|
||||
...
|
||||
@@ -17,6 +17,7 @@ properties:
|
||||
- enum:
|
||||
- fsl,imx8m-irqsteer
|
||||
- fsl,imx8mp-irqsteer
|
||||
- fsl,imx8qm-irqsteer
|
||||
- fsl,imx8qxp-irqsteer
|
||||
- const: fsl,imx-irqsteer
|
||||
|
||||
@@ -83,6 +84,7 @@ allOf:
|
||||
contains:
|
||||
enum:
|
||||
- fsl,imx8mp-irqsteer
|
||||
- fsl,imx8qm-irqsteer
|
||||
- fsl,imx8qxp-irqsteer
|
||||
then:
|
||||
required:
|
||||
|
||||
@@ -27,6 +27,7 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- qcom,qdu1000-pdc
|
||||
- qcom,sa8255p-pdc
|
||||
- qcom,sa8775p-pdc
|
||||
- qcom,sc7180-pdc
|
||||
- qcom,sc7280-pdc
|
||||
|
||||
@@ -66,7 +66,7 @@ patternProperties:
|
||||
IMAXled = 160000 * (592 / 600.5) * (1 / max-current-switch-number)
|
||||
And the minimum output current formula:
|
||||
IMINled = 3300 * (592 / 600.5) * (1 / max-current-switch-number)
|
||||
where max-current-switch-number is determinated by led configuration
|
||||
where max-current-switch-number is determined by led configuration
|
||||
and depends on how leds are physically connected to the led driver.
|
||||
|
||||
allOf:
|
||||
|
||||
@@ -24,7 +24,7 @@ Required properties:
|
||||
number of completion messages for which FlexRM will inject
|
||||
one MSI interrupt to CPU.
|
||||
|
||||
The 3nd cell contains MSI timer value representing time for
|
||||
The 3rd cell contains MSI timer value representing time for
|
||||
which FlexRM will wait to accumulate N completion messages
|
||||
where N is the value specified by 2nd cell above. If FlexRM
|
||||
does not get required number of completion messages in time
|
||||
|
||||
@@ -16,7 +16,7 @@ description:
|
||||
can be connected to CMOS image sensors from various vendors, supporting both
|
||||
MIPI CSI-2 and parallel interfaces. It can also output on either MIPI CSI-2
|
||||
or parallel. The hardware is capable of transmitting and receiving MIPI
|
||||
interlaved data strams with data types or multiple virtual channel
|
||||
interleaved data streams with data types or multiple virtual channel
|
||||
identifiers.
|
||||
|
||||
allOf:
|
||||
|
||||
@@ -77,7 +77,7 @@ properties:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
maxItems: 2
|
||||
description: |
|
||||
An array specyfing minimum image size in pixels at the FIMC input and
|
||||
An array specifying minimum image size in pixels at the FIMC input and
|
||||
output DMA, in the first and second cell respectively. Default value
|
||||
is <16 16>.
|
||||
|
||||
|
||||
@@ -25,7 +25,7 @@ properties:
|
||||
description:
|
||||
The PMIC provides intb and errb IRQ lines. The errb IRQ line is used
|
||||
for fatal IRQs which will cause the PMIC to shut down power outputs.
|
||||
In many systems this will shut down the SoC contolling the PMIC and
|
||||
In many systems this will shut down the SoC controlling the PMIC and
|
||||
connecting/handling the errb can be omitted. However, there are cases
|
||||
where the SoC is not powered by the PMIC or has a short time backup
|
||||
energy to handle shutdown of critical hardware. In that case it may be
|
||||
|
||||
@@ -53,7 +53,7 @@ properties:
|
||||
samsung,s2mps11-wrstbi-ground:
|
||||
description: |
|
||||
Indicates that WRSTBI pin of PMIC is pulled down. When the system is
|
||||
suspended it will always go down thus triggerring unwanted buck warm
|
||||
suspended it will always go down thus triggering unwanted buck warm
|
||||
reset (setting buck voltages to default values).
|
||||
type: boolean
|
||||
|
||||
|
||||
@@ -2,7 +2,7 @@ Texas Instruments TWL6040 family
|
||||
|
||||
The TWL6040s are 8-channel high quality low-power audio codecs providing audio,
|
||||
vibra and GPO functionality on OMAP4+ platforms.
|
||||
They are connected ot the host processor via i2c for commands, McPDM for audio
|
||||
They are connected to the host processor via i2c for commands, McPDM for audio
|
||||
data and commands.
|
||||
|
||||
Required properties:
|
||||
|
||||
@@ -0,0 +1,60 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/misc/aspeed,ast2400-cvic.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Aspeed Coprocessor Vectored Interrupt Controller
|
||||
|
||||
maintainers:
|
||||
- Andrew Jeffery <andrew@codeconstruct.com.au>
|
||||
|
||||
description:
|
||||
The Aspeed AST2400 and AST2500 SoCs have a controller that provides interrupts
|
||||
to the ColdFire coprocessor. It's not a normal interrupt controller and it
|
||||
would be rather inconvenient to create an interrupt tree for it, as it
|
||||
somewhat shares some of the same sources as the main ARM interrupt controller
|
||||
but with different numbers.
|
||||
|
||||
The AST2500 also supports a software generated interrupt.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- aspeed,ast2400-cvic
|
||||
- aspeed,ast2500-cvic
|
||||
- const: aspeed,cvic
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
valid-sources:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
maxItems: 1
|
||||
description:
|
||||
A bitmap of supported sources for the implementation.
|
||||
|
||||
copro-sw-interrupts:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
minItems: 1
|
||||
maxItems: 32
|
||||
description:
|
||||
A list of interrupt numbers that can be used as software interrupts from
|
||||
the ARM to the coprocessor.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- valid-sources
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
interrupt-controller@1e6c2000 {
|
||||
compatible = "aspeed,ast2500-cvic", "aspeed,cvic";
|
||||
reg = <0x1e6c2000 0x80>;
|
||||
valid-sources = <0xffffffff>;
|
||||
copro-sw-interrupts = <1>;
|
||||
};
|
||||
@@ -1,35 +0,0 @@
|
||||
* ASPEED AST2400 and AST2500 coprocessor interrupt controller
|
||||
|
||||
This file describes the bindings for the interrupt controller present
|
||||
in the AST2400 and AST2500 BMC SoCs which provides interrupt to the
|
||||
ColdFire coprocessor.
|
||||
|
||||
It is not a normal interrupt controller and it would be rather
|
||||
inconvenient to create an interrupt tree for it as it somewhat shares
|
||||
some of the same sources as the main ARM interrupt controller but with
|
||||
different numbers.
|
||||
|
||||
The AST2500 supports a SW generated interrupt
|
||||
|
||||
Required properties:
|
||||
- reg: address and length of the register for the device.
|
||||
- compatible: "aspeed,cvic" and one of:
|
||||
"aspeed,ast2400-cvic"
|
||||
or
|
||||
"aspeed,ast2500-cvic"
|
||||
|
||||
- valid-sources: One cell, bitmap of supported sources for the implementation
|
||||
|
||||
Optional properties;
|
||||
- copro-sw-interrupts: List of interrupt numbers that can be used as
|
||||
SW interrupts from the ARM to the coprocessor.
|
||||
(AST2500 only)
|
||||
|
||||
Example:
|
||||
|
||||
cvic: copro-interrupt-controller@1e6c2000 {
|
||||
compatible = "aspeed,ast2500-cvic";
|
||||
valid-sources = <0xffffffff>;
|
||||
copro-sw-interrupts = <1>;
|
||||
reg = <0x1e6c2000 0x80>;
|
||||
};
|
||||
+16
-17
@@ -1,7 +1,7 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/broadcom-bluetooth.yaml#
|
||||
$id: http://devicetree.org/schemas/net/bluetooth/brcm,bluetooth.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Broadcom Bluetooth Chips
|
||||
@@ -119,29 +119,28 @@ properties:
|
||||
items:
|
||||
- const: host-wakeup
|
||||
|
||||
max-speed: true
|
||||
current-speed: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
dependencies:
|
||||
brcm,requires-autobaud-mode: [ shutdown-gpios ]
|
||||
|
||||
if:
|
||||
not:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- brcm,bcm20702a1
|
||||
- brcm,bcm4329-bt
|
||||
- brcm,bcm4330-bt
|
||||
then:
|
||||
properties:
|
||||
reset-gpios: false
|
||||
allOf:
|
||||
- $ref: /schemas/serial/serial-peripheral-props.yaml#
|
||||
- if:
|
||||
not:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- brcm,bcm20702a1
|
||||
- brcm,bcm4329-bt
|
||||
- brcm,bcm4330-bt
|
||||
then:
|
||||
properties:
|
||||
reset-gpios: false
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
+3
-3
@@ -1,7 +1,7 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/marvell-bluetooth.yaml#
|
||||
$id: http://devicetree.org/schemas/net/bluetooth/marvell,88w8897.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Marvell Bluetooth chips
|
||||
@@ -19,13 +19,13 @@ properties:
|
||||
- mrvl,88w8897
|
||||
- mrvl,88w8997
|
||||
|
||||
max-speed:
|
||||
description: see Documentation/devicetree/bindings/serial/serial.yaml
|
||||
max-speed: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/serial/serial-peripheral-props.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
@@ -72,7 +72,7 @@ properties:
|
||||
description: VDD_RFA_CMN supply regulator handle
|
||||
|
||||
vddrfa0p8-supply:
|
||||
description: VDD_RFA_0P8 suppply regulator handle
|
||||
description: VDD_RFA_0P8 supply regulator handle
|
||||
|
||||
vddrfa1p7-supply:
|
||||
description: VDD_RFA_1P7 supply regulator handle
|
||||
@@ -98,8 +98,7 @@ properties:
|
||||
vddwlmx-supply:
|
||||
description: VDD_WLMX supply regulator handle
|
||||
|
||||
max-speed:
|
||||
description: see Documentation/devicetree/bindings/serial/serial.yaml
|
||||
max-speed: true
|
||||
|
||||
firmware-name:
|
||||
description: specify the name of nvm firmware to load
|
||||
@@ -118,6 +117,7 @@ additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- $ref: bluetooth-controller.yaml#
|
||||
- $ref: /schemas/serial/serial-peripheral-props.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
||||
+4
-1
@@ -1,7 +1,7 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/realtek-bluetooth.yaml#
|
||||
$id: http://devicetree.org/schemas/net/bluetooth/realtek,bluetooth.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: RTL8723BS/RTL8723CS/RTL8821CS/RTL8822CS Bluetooth
|
||||
@@ -46,6 +46,9 @@ properties:
|
||||
required:
|
||||
- compatible
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/serial/serial-peripheral-props.yaml#
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
+4
-1
@@ -1,7 +1,7 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/ti,bluetooth.yaml#
|
||||
$id: http://devicetree.org/schemas/net/bluetooth/ti,bluetooth.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Texas Instruments Bluetooth Chips
|
||||
@@ -74,6 +74,9 @@ properties:
|
||||
required:
|
||||
- compatible
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/serial/serial-peripheral-props.yaml#
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
@@ -0,0 +1,59 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/fsl,cpm-enet.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Network for cpm enet
|
||||
|
||||
maintainers:
|
||||
- Frank Li <Frank.Li@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- enum:
|
||||
- fsl,cpm1-scc-enet
|
||||
- fsl,cpm2-scc-enet
|
||||
- fsl,cpm1-fec-enet
|
||||
- fsl,cpm2-fcc-enet
|
||||
- fsl,qe-enet
|
||||
- items:
|
||||
- enum:
|
||||
- fsl,mpc8272-fcc-enet
|
||||
- const: fsl,cpm2-fcc-enet
|
||||
|
||||
reg:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
fsl,cpm-command:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: cpm command
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
allOf:
|
||||
- $ref: ethernet-controller.yaml
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
ethernet@11300 {
|
||||
compatible = "fsl,mpc8272-fcc-enet",
|
||||
"fsl,cpm2-fcc-enet";
|
||||
reg = <0x11300 0x20 0x8400 0x100 0x11390 1>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <20 8>;
|
||||
interrupt-parent = <&pic>;
|
||||
phy-handle = <&phy0>;
|
||||
fsl,cpm-command = <0x12000300>;
|
||||
};
|
||||
|
||||
@@ -0,0 +1,55 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/fsl,cpm-mdio.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale CPM MDIO Device
|
||||
|
||||
maintainers:
|
||||
- Frank Li <Frank.Li@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- enum:
|
||||
- fsl,pq1-fec-mdio
|
||||
- fsl,cpm2-mdio-bitbang
|
||||
- items:
|
||||
- const: fsl,mpc8272ads-mdio-bitbang
|
||||
- const: fsl,mpc8272-mdio-bitbang
|
||||
- const: fsl,cpm2-mdio-bitbang
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
fsl,mdio-pin:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: pin of port C controlling mdio data
|
||||
|
||||
fsl,mdc-pin:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: pin of port C controlling mdio clock
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
allOf:
|
||||
- $ref: mdio.yaml#
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
mdio@10d40 {
|
||||
compatible = "fsl,mpc8272ads-mdio-bitbang",
|
||||
"fsl,mpc8272-mdio-bitbang",
|
||||
"fsl,cpm2-mdio-bitbang";
|
||||
reg = <0x10d40 0x14>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
fsl,mdio-pin = <12>;
|
||||
fsl,mdc-pin = <13>;
|
||||
};
|
||||
|
||||
@@ -1,13 +0,0 @@
|
||||
* Maxim (Dallas) DS26522 Dual T1/E1/J1 Transceiver
|
||||
|
||||
Required properties:
|
||||
- compatible: Should contain "maxim,ds26522".
|
||||
- reg: SPI CS.
|
||||
- spi-max-frequency: SPI clock.
|
||||
|
||||
Example:
|
||||
slic@1 {
|
||||
compatible = "maxim,ds26522";
|
||||
reg = <1>;
|
||||
spi-max-frequency = <2000000>; /* input clock */
|
||||
};
|
||||
@@ -0,0 +1,40 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/maxim,ds26522.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Maxim (Dallas) DS26522 Dual T1/E1/J1 Transceiver
|
||||
|
||||
maintainers:
|
||||
- Frank Li <Frank.Li@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: maxim,ds26522
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/spi/spi-peripheral-props.yaml
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
transceiver@1 {
|
||||
compatible = "maxim,ds26522";
|
||||
reg = <1>;
|
||||
spi-max-frequency = <2000000>; /* input clock */
|
||||
};
|
||||
};
|
||||
@@ -36,7 +36,7 @@ Optional properties:
|
||||
3-tuple setting for each (up to 3) supported link
|
||||
speed on the host. Range is 0 to 273000 in unit of
|
||||
uV. Default is 0.
|
||||
- apm,tx-pre-cursor2 : 2st pre-cursor emphasis taps control. Two set of
|
||||
- apm,tx-pre-cursor2 : 2nd pre-cursor emphasis taps control. Two set of
|
||||
3-tuple setting for each (up to 3) supported link
|
||||
speed on the host. Range is 0 to 127400 in unit uV.
|
||||
Default is 0x0.
|
||||
|
||||
@@ -41,7 +41,7 @@ properties:
|
||||
description:
|
||||
One instance of the T-PHY on MT7988 suffers from a performance
|
||||
problem in 10GBase-R mode which needs a work-around in the driver.
|
||||
This flag enables a work-around ajusting an analog phy setting and
|
||||
This flag enables a work-around adjusting an analog phy setting and
|
||||
is required for XFI Port0 of the MT7988 SoC to be in compliance with
|
||||
the SFP specification.
|
||||
|
||||
|
||||
@@ -240,7 +240,7 @@ patternProperties:
|
||||
The force mode is used to manually switch the shared phy mode between
|
||||
USB3 and PCIe, when USB3 phy type is selected by the consumer, and
|
||||
force-mode is set, will cause phy's power and pipe toggled and force
|
||||
phy as USB3 mode which switched from default PCIe mode. But perfer to
|
||||
phy as USB3 mode which switched from default PCIe mode. But prefer to
|
||||
use the property "mediatek,syscon-type" for newer SoCs that support it.
|
||||
type: boolean
|
||||
|
||||
|
||||
@@ -14,6 +14,7 @@ properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,hdmi-phy-8996
|
||||
- qcom,hdmi-phy-8998
|
||||
|
||||
reg:
|
||||
maxItems: 6
|
||||
|
||||
@@ -43,7 +43,7 @@ properties:
|
||||
|
||||
qcom,tune-usb2-amplitude:
|
||||
$ref: /schemas/types.yaml#/definitions/uint8
|
||||
description: High-Speed trasmit amplitude
|
||||
description: High-Speed transmit amplitude
|
||||
minimum: 0
|
||||
maximum: 15
|
||||
default: 8
|
||||
|
||||
@@ -11,7 +11,7 @@ maintainers:
|
||||
- Alexandre TORGUE <alexandre.torgue@foss.st.com>
|
||||
|
||||
description: |
|
||||
STMicroelectronics's STM32 MCUs intregrate a GPIO and Pin mux/config hardware
|
||||
STMicroelectronics's STM32 MCUs integrate a GPIO and Pin mux/config hardware
|
||||
controller. It controls the input/output settings on the available pins and
|
||||
also provides ability to multiplex and configure the output of various
|
||||
on-chip controllers onto these pads.
|
||||
@@ -164,7 +164,7 @@ patternProperties:
|
||||
This macro is available here:
|
||||
- include/dt-bindings/pinctrl/stm32-pinfunc.h
|
||||
Some examples of using macro:
|
||||
/* GPIO A9 set as alernate function 2 */
|
||||
/* GPIO A9 set as alternate function 2 */
|
||||
... {
|
||||
pinmux = <STM32_PINMUX('A', 9, AF2)>;
|
||||
};
|
||||
|
||||
@@ -0,0 +1,47 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/platform/microsoft,surface-sam.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Surface System Aggregator Module (SAM, SSAM)
|
||||
|
||||
maintainers:
|
||||
- Konrad Dybcio <konradybcio@kernel.org>
|
||||
|
||||
description: |
|
||||
Surface devices use a standardized embedded controller to let the
|
||||
operating system interface with various hardware functions. The
|
||||
specific functionalities are modeled as subdevices and matched on
|
||||
five levels: domain, category, target, instance and function.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: microsoft,surface-sam
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
current-speed: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- interrupts
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
uart {
|
||||
embedded-controller {
|
||||
compatible = "microsoft,surface-sam";
|
||||
|
||||
interrupts-extended = <&tlmm 91 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
pinctrl-0 = <&ssam_state>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
current-speed = <4000000>;
|
||||
};
|
||||
};
|
||||
@@ -26,7 +26,7 @@ List of legacy properties and respective binding document
|
||||
3. "linux,wakeup" Documentation/devicetree/bindings/input/gpio-matrix-keypad.txt
|
||||
Documentation/devicetree/bindings/mfd/tc3589x.txt
|
||||
Documentation/devicetree/bindings/input/touchscreen/ads7846.txt
|
||||
4. "linux,keypad-wakeup" Documentation/devicetree/bindings/input/qcom,pm8xxx-keypad.txt
|
||||
4. "linux,keypad-wakeup" Documentation/devicetree/bindings/input/qcom,pm8921-keypad.yaml
|
||||
5. "linux,input-wakeup" Documentation/devicetree/bindings/input/samsung,s3c6410-keypad.yaml
|
||||
6. "nvidia,wakeup-source" Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt
|
||||
|
||||
|
||||
@@ -93,7 +93,7 @@ patternProperties:
|
||||
Each SCP core has own cache memory. The SRAM and L1TCM are shared by
|
||||
cores. The power of cache, SRAM and L1TCM power should be enabled
|
||||
before booting SCP cores. The size of cache, SRAM, and L1TCM are varied
|
||||
on differnt SoCs.
|
||||
on different SoCs.
|
||||
|
||||
The SCP cores do not use an MMU, but has a set of registers to
|
||||
control the translations between 32-bit CPU addresses into system bus
|
||||
|
||||
@@ -42,7 +42,7 @@ properties:
|
||||
minItems: 1
|
||||
description:
|
||||
phandle to rcpm node, Please refer
|
||||
Documentation/devicetree/bindings/soc/fsl/rcpm.txt
|
||||
Documentation/devicetree/bindings/soc/fsl/fsl,rcpm.yaml
|
||||
|
||||
big-endian:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
@@ -78,7 +78,7 @@ properties:
|
||||
we use nvidia,adjust-baud-rates.
|
||||
|
||||
As an example, consider there is deviation observed in TX for baud rates as listed below. 0
|
||||
to 9600 has 1% deviation 9600 to 115200 2% deviation. This slight deviation is expcted and
|
||||
to 9600 has 1% deviation 9600 to 115200 2% deviation. This slight deviation is expected and
|
||||
Tegra UART is expected to handle it. Due to the issue stated above, baud rate on Tegra UART
|
||||
should be set equal to or above deviation observed for avoiding frame errors. Property
|
||||
should be set like this:
|
||||
|
||||
@@ -0,0 +1,41 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/serial/serial-peripheral-props.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Common Properties for Serial-attached Devices
|
||||
|
||||
maintainers:
|
||||
- Rob Herring <robh@kernel.org>
|
||||
- Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
|
||||
description:
|
||||
Devices connected over serial/UART, expressed as children of a serial
|
||||
controller, might need similar properties, e.g. for configuring the baud
|
||||
rate.
|
||||
|
||||
properties:
|
||||
max-speed:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description:
|
||||
The maximum baud rate the device operates at.
|
||||
This should only be present if the maximum is less than the slave
|
||||
device can support. For example, a particular board has some
|
||||
signal quality issue or the host processor can't support higher
|
||||
baud rates.
|
||||
|
||||
current-speed:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: |
|
||||
The current baud rate the device operates at.
|
||||
This should only be present in case a driver has no chance to know
|
||||
the baud rate of the slave device.
|
||||
Examples:
|
||||
* device supports auto-baud
|
||||
* the rate is setup by a bootloader and there is no way to reset
|
||||
the device
|
||||
* device baud rate is configured by its firmware but there is no
|
||||
way to request the actual settings
|
||||
|
||||
additionalProperties: true
|
||||
@@ -88,10 +88,12 @@ properties:
|
||||
TX FIFO threshold configuration (in bytes).
|
||||
|
||||
patternProperties:
|
||||
"^(bluetooth|bluetooth-gnss|gnss|gps|mcu|onewire)$":
|
||||
"^(bluetooth|bluetooth-gnss|embedded-controller|gnss|gps|mcu|onewire)$":
|
||||
if:
|
||||
type: object
|
||||
then:
|
||||
additionalProperties: true
|
||||
$ref: serial-peripheral-props.yaml#
|
||||
description:
|
||||
Serial attached devices shall be a child node of the host UART device
|
||||
the slave device is attached to. It is expected that the attached
|
||||
@@ -103,28 +105,6 @@ patternProperties:
|
||||
description:
|
||||
Compatible of the device connected to the serial port.
|
||||
|
||||
max-speed:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description:
|
||||
The maximum baud rate the device operates at.
|
||||
This should only be present if the maximum is less than the slave
|
||||
device can support. For example, a particular board has some
|
||||
signal quality issue or the host processor can't support higher
|
||||
baud rates.
|
||||
|
||||
current-speed:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: |
|
||||
The current baud rate the device operates at.
|
||||
This should only be present in case a driver has no chance to know
|
||||
the baud rate of the slave device.
|
||||
Examples:
|
||||
* device supports auto-baud
|
||||
* the rate is setup by a bootloader and there is no way to reset
|
||||
the device
|
||||
* device baud rate is configured by its firmware but there is no
|
||||
way to request the actual settings
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
|
||||
@@ -0,0 +1,140 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,ucc-hdlc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: High-Level Data Link Control(HDLC)
|
||||
|
||||
description: HDLC part in Universal communication controllers (UCCs)
|
||||
|
||||
maintainers:
|
||||
- Frank Li <Frank.Li@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,ucc-hdlc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
cell-index:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
rx-clock-name:
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
oneOf:
|
||||
- pattern: "^brg([0-9]|1[0-6])$"
|
||||
- pattern: "^clk([0-9]|1[0-9]|2[0-4])$"
|
||||
|
||||
tx-clock-name:
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
oneOf:
|
||||
- pattern: "^brg([0-9]|1[0-6])$"
|
||||
- pattern: "^clk([0-9]|1[0-9]|2[0-4])$"
|
||||
|
||||
fsl,tdm-interface:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description: Specify that hdlc is based on tdm-interface
|
||||
|
||||
fsl,rx-sync-clock:
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
description: rx-sync
|
||||
enum:
|
||||
- none
|
||||
- rsync_pin
|
||||
- brg9
|
||||
- brg10
|
||||
- brg11
|
||||
- brg13
|
||||
- brg14
|
||||
- brg15
|
||||
|
||||
fsl,tx-sync-clock:
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
description: tx-sync
|
||||
enum:
|
||||
- none
|
||||
- tsync_pin
|
||||
- brg9
|
||||
- brg10
|
||||
- brg11
|
||||
- brg13
|
||||
- brg14
|
||||
- brg15
|
||||
|
||||
fsl,tdm-framer-type:
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
description: required for tdm interface
|
||||
enum: [e1, t1]
|
||||
|
||||
fsl,tdm-id:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: number of TDM ID
|
||||
|
||||
fsl,tx-timeslot-mask:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description:
|
||||
required for tdm interface.
|
||||
time slot mask for TDM operation. Indicates which time
|
||||
slots used for transmitting and receiving.
|
||||
|
||||
fsl,rx-timeslot-mask:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description:
|
||||
required for tdm interface.
|
||||
time slot mask for TDM operation. Indicates which time
|
||||
slots used for transmitting and receiving.
|
||||
|
||||
fsl,siram-entry-id:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description:
|
||||
required for tdm interface
|
||||
Must be 0,2,4...64. the number of TDM entry.
|
||||
|
||||
fsl,tdm-internal-loopback:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
optional for tdm interface
|
||||
Internal loopback connecting on TDM layer.
|
||||
|
||||
fsl,hmask:
|
||||
$ref: /schemas/types.yaml#/definitions/uint16
|
||||
description: |
|
||||
HDLC address recognition. Set to zero to disable
|
||||
address filtering of packets:
|
||||
fsl,hmask = /bits/ 16 <0x0000>;
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
communication@2000 {
|
||||
compatible = "fsl,ucc-hdlc";
|
||||
reg = <0x2000 0x200>;
|
||||
rx-clock-name = "clk8";
|
||||
tx-clock-name = "clk9";
|
||||
fsl,rx-sync-clock = "rsync_pin";
|
||||
fsl,tx-sync-clock = "tsync_pin";
|
||||
fsl,tx-timeslot-mask = <0xfffffffe>;
|
||||
fsl,rx-timeslot-mask = <0xfffffffe>;
|
||||
fsl,tdm-framer-type = "e1";
|
||||
fsl,tdm-id = <0>;
|
||||
fsl,siram-entry-id = <0>;
|
||||
fsl,tdm-interface;
|
||||
};
|
||||
|
||||
- |
|
||||
communication@2000 {
|
||||
compatible = "fsl,ucc-hdlc";
|
||||
reg = <0x2000 0x200>;
|
||||
rx-clock-name = "brg1";
|
||||
tx-clock-name = "brg1";
|
||||
};
|
||||
@@ -1,130 +0,0 @@
|
||||
* Network
|
||||
|
||||
Currently defined compatibles:
|
||||
- fsl,cpm1-scc-enet
|
||||
- fsl,cpm2-scc-enet
|
||||
- fsl,cpm1-fec-enet
|
||||
- fsl,cpm2-fcc-enet (third resource is GFEMR)
|
||||
- fsl,qe-enet
|
||||
|
||||
Example:
|
||||
|
||||
ethernet@11300 {
|
||||
compatible = "fsl,mpc8272-fcc-enet",
|
||||
"fsl,cpm2-fcc-enet";
|
||||
reg = <11300 20 8400 100 11390 1>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <20 8>;
|
||||
interrupt-parent = <&PIC>;
|
||||
phy-handle = <&PHY0>;
|
||||
fsl,cpm-command = <12000300>;
|
||||
};
|
||||
|
||||
* MDIO
|
||||
|
||||
Currently defined compatibles:
|
||||
fsl,pq1-fec-mdio (reg is same as first resource of FEC device)
|
||||
fsl,cpm2-mdio-bitbang (reg is port C registers)
|
||||
|
||||
Properties for fsl,cpm2-mdio-bitbang:
|
||||
fsl,mdio-pin : pin of port C controlling mdio data
|
||||
fsl,mdc-pin : pin of port C controlling mdio clock
|
||||
|
||||
Example:
|
||||
mdio@10d40 {
|
||||
compatible = "fsl,mpc8272ads-mdio-bitbang",
|
||||
"fsl,mpc8272-mdio-bitbang",
|
||||
"fsl,cpm2-mdio-bitbang";
|
||||
reg = <10d40 14>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
fsl,mdio-pin = <12>;
|
||||
fsl,mdc-pin = <13>;
|
||||
};
|
||||
|
||||
* HDLC
|
||||
|
||||
Currently defined compatibles:
|
||||
- fsl,ucc-hdlc
|
||||
|
||||
Properties for fsl,ucc-hdlc:
|
||||
- rx-clock-name
|
||||
- tx-clock-name
|
||||
Usage: required
|
||||
Value type: <string>
|
||||
Definition : Must be "brg1"-"brg16" for internal clock source,
|
||||
Must be "clk1"-"clk24" for external clock source.
|
||||
|
||||
- fsl,tdm-interface
|
||||
Usage: optional
|
||||
Value type: <empty>
|
||||
Definition : Specify that hdlc is based on tdm-interface
|
||||
|
||||
The property below is dependent on fsl,tdm-interface:
|
||||
- fsl,rx-sync-clock
|
||||
Usage: required
|
||||
Value type: <string>
|
||||
Definition : Must be "none", "rsync_pin", "brg9-11" and "brg13-15".
|
||||
|
||||
- fsl,tx-sync-clock
|
||||
Usage: required
|
||||
Value type: <string>
|
||||
Definition : Must be "none", "tsync_pin", "brg9-11" and "brg13-15".
|
||||
|
||||
- fsl,tdm-framer-type
|
||||
Usage: required for tdm interface
|
||||
Value type: <string>
|
||||
Definition : "e1" or "t1".Now e1 and t1 are used, other framer types
|
||||
are not supported.
|
||||
|
||||
- fsl,tdm-id
|
||||
Usage: required for tdm interface
|
||||
Value type: <u32>
|
||||
Definition : number of TDM ID
|
||||
|
||||
- fsl,tx-timeslot-mask
|
||||
- fsl,rx-timeslot-mask
|
||||
Usage: required for tdm interface
|
||||
Value type: <u32>
|
||||
Definition : time slot mask for TDM operation. Indicates which time
|
||||
slots used for transmitting and receiving.
|
||||
|
||||
- fsl,siram-entry-id
|
||||
Usage: required for tdm interface
|
||||
Value type: <u32>
|
||||
Definition : Must be 0,2,4...64. the number of TDM entry.
|
||||
|
||||
- fsl,tdm-internal-loopback
|
||||
usage: optional for tdm interface
|
||||
value type: <empty>
|
||||
Definition : Internal loopback connecting on TDM layer.
|
||||
- fsl,hmask
|
||||
usage: optional
|
||||
Value type: <u16>
|
||||
Definition: HDLC address recognition. Set to zero to disable
|
||||
address filtering of packets:
|
||||
fsl,hmask = /bits/ 16 <0x0000>;
|
||||
|
||||
Example for tdm interface:
|
||||
|
||||
ucc@2000 {
|
||||
compatible = "fsl,ucc-hdlc";
|
||||
rx-clock-name = "clk8";
|
||||
tx-clock-name = "clk9";
|
||||
fsl,rx-sync-clock = "rsync_pin";
|
||||
fsl,tx-sync-clock = "tsync_pin";
|
||||
fsl,tx-timeslot-mask = <0xfffffffe>;
|
||||
fsl,rx-timeslot-mask = <0xfffffffe>;
|
||||
fsl,tdm-framer-type = "e1";
|
||||
fsl,tdm-id = <0>;
|
||||
fsl,siram-entry-id = <0>;
|
||||
fsl,tdm-interface;
|
||||
};
|
||||
|
||||
Example for hdlc without tdm interface:
|
||||
|
||||
ucc@2000 {
|
||||
compatible = "fsl,ucc-hdlc";
|
||||
rx-clock-name = "brg1";
|
||||
tx-clock-name = "brg1";
|
||||
};
|
||||
@@ -23,6 +23,9 @@ properties:
|
||||
- fsl,ls1028a-scfg
|
||||
- fsl,ls1043a-scfg
|
||||
- fsl,ls1046a-scfg
|
||||
- fsl,ls1088a-isc
|
||||
- fsl,ls2080a-isc
|
||||
- fsl,lx2160a-isc
|
||||
- const: syscon
|
||||
|
||||
reg:
|
||||
|
||||
@@ -0,0 +1,87 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/soc/fsl/fsl,rcpm.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Run Control and Power Management
|
||||
|
||||
description:
|
||||
The RCPM performs all device-level tasks associated with device run control
|
||||
and power management.
|
||||
|
||||
maintainers:
|
||||
- Frank Li <Frank.Li@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- fsl,p2041-rcpm
|
||||
- fsl,p3041-rcpm
|
||||
- fsl,p4080-rcpm
|
||||
- fsl,p5020-rcpm
|
||||
- fsl,p5040-rcpm
|
||||
- const: fsl,qoriq-rcpm-1.0
|
||||
- items:
|
||||
- enum:
|
||||
- fsl,b4420-rcpm
|
||||
- fsl,b4860-rcpm
|
||||
- fsl,t4240-rcpm
|
||||
- const: fsl,qoriq-rcpm-2.0
|
||||
- items:
|
||||
- enum:
|
||||
- fsl,t1040-rcpm
|
||||
- const: fsl,qoriq-rcpm-2.1
|
||||
- items:
|
||||
- enum:
|
||||
- fsl,ls1012a-rcpm
|
||||
- fsl,ls1021a-rcpm
|
||||
- fsl,ls1028a-rcpm
|
||||
- fsl,ls1043a-rcpm
|
||||
- fsl,ls1046a-rcpm
|
||||
- fsl,ls1088a-rcpm
|
||||
- fsl,ls208xa-rcpm
|
||||
- fsl,lx2160a-rcpm
|
||||
- const: fsl,qoriq-rcpm-2.1+
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#fsl,rcpm-wakeup-cells":
|
||||
description: |
|
||||
The number of IPPDEXPCR register cells in the
|
||||
fsl,rcpm-wakeup property.
|
||||
|
||||
Freescale RCPM Wakeup Source Device Tree Bindings
|
||||
|
||||
Required fsl,rcpm-wakeup property should be added to a device node if
|
||||
the device can be used as a wakeup source.
|
||||
|
||||
fsl,rcpm-wakeup: Consists of a phandle to the rcpm node and the IPPDEXPCR
|
||||
register cells. The number of IPPDEXPCR register cells is defined in
|
||||
"#fsl,rcpm-wakeup-cells" in the rcpm node. The first register cell is
|
||||
the bit mask that should be set in IPPDEXPCR0, and the second register
|
||||
cell is for IPPDEXPCR1, and so on.
|
||||
|
||||
Note: IPPDEXPCR(IP Powerdown Exception Control Register) provides a
|
||||
mechanism for keeping certain blocks awake during STANDBY and MEM, in
|
||||
order to use them as wake-up sources.
|
||||
|
||||
little-endian:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
RCPM register block is Little Endian. Without it RCPM
|
||||
will be Big Endian (default case).
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
global-utilities@e2000 {
|
||||
compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2.0";
|
||||
reg = <0xe2000 0x1000>;
|
||||
#fsl,rcpm-wakeup-cells = <2>;
|
||||
};
|
||||
@@ -1,69 +0,0 @@
|
||||
* Run Control and Power Management
|
||||
-------------------------------------------
|
||||
The RCPM performs all device-level tasks associated with device run control
|
||||
and power management.
|
||||
|
||||
Required properites:
|
||||
- reg : Offset and length of the register set of the RCPM block.
|
||||
- #fsl,rcpm-wakeup-cells : The number of IPPDEXPCR register cells in the
|
||||
fsl,rcpm-wakeup property.
|
||||
- compatible : Must contain a chip-specific RCPM block compatible string
|
||||
and (if applicable) may contain a chassis-version RCPM compatible
|
||||
string. Chip-specific strings are of the form "fsl,<chip>-rcpm",
|
||||
such as:
|
||||
* "fsl,p2041-rcpm"
|
||||
* "fsl,p5020-rcpm"
|
||||
* "fsl,t4240-rcpm"
|
||||
|
||||
Chassis-version strings are of the form "fsl,qoriq-rcpm-<version>",
|
||||
such as:
|
||||
* "fsl,qoriq-rcpm-1.0": for chassis 1.0 rcpm
|
||||
* "fsl,qoriq-rcpm-2.0": for chassis 2.0 rcpm
|
||||
* "fsl,qoriq-rcpm-2.1": for chassis 2.1 rcpm
|
||||
* "fsl,qoriq-rcpm-2.1+": for chassis 2.1+ rcpm
|
||||
|
||||
All references to "1.0" and "2.0" refer to the QorIQ chassis version to
|
||||
which the chip complies.
|
||||
Chassis Version Example Chips
|
||||
--------------- -------------------------------
|
||||
1.0 p4080, p5020, p5040, p2041, p3041
|
||||
2.0 t4240, b4860, b4420
|
||||
2.1 t1040,
|
||||
2.1+ ls1021a, ls1012a, ls1043a, ls1046a
|
||||
|
||||
Optional properties:
|
||||
- little-endian : RCPM register block is Little Endian. Without it RCPM
|
||||
will be Big Endian (default case).
|
||||
|
||||
Example:
|
||||
The RCPM node for T4240:
|
||||
rcpm: global-utilities@e2000 {
|
||||
compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2.0";
|
||||
reg = <0xe2000 0x1000>;
|
||||
#fsl,rcpm-wakeup-cells = <2>;
|
||||
};
|
||||
|
||||
* Freescale RCPM Wakeup Source Device Tree Bindings
|
||||
-------------------------------------------
|
||||
Required fsl,rcpm-wakeup property should be added to a device node if the device
|
||||
can be used as a wakeup source.
|
||||
|
||||
- fsl,rcpm-wakeup: Consists of a phandle to the rcpm node and the IPPDEXPCR
|
||||
register cells. The number of IPPDEXPCR register cells is defined in
|
||||
"#fsl,rcpm-wakeup-cells" in the rcpm node. The first register cell is
|
||||
the bit mask that should be set in IPPDEXPCR0, and the second register
|
||||
cell is for IPPDEXPCR1, and so on.
|
||||
|
||||
Note: IPPDEXPCR(IP Powerdown Exception Control Register) provides a
|
||||
mechanism for keeping certain blocks awake during STANDBY and MEM, in
|
||||
order to use them as wake-up sources.
|
||||
|
||||
Example:
|
||||
lpuart0: serial@2950000 {
|
||||
compatible = "fsl,ls1021a-lpuart";
|
||||
reg = <0x0 0x2950000 0x0 0x1000>;
|
||||
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&sysclk>;
|
||||
clock-names = "ipg";
|
||||
fsl,rcpm-wakeup = <&rcpm 0x0 0x40000000>;
|
||||
};
|
||||
@@ -32,7 +32,7 @@ properties:
|
||||
description: |
|
||||
just the value of reg 57. Bit(3) decides whether the jack polarity is inverted.
|
||||
Bit(2) decides whether the button on the headset is inverted.
|
||||
Bit(1)/(0) decides the mic properity to be OMTP/CTIA or auto.
|
||||
Bit(1)/(0) decides the mic property to be OMTP/CTIA or auto.
|
||||
minimum: 0x00
|
||||
maximum: 0x0f
|
||||
default: 0x0f
|
||||
|
||||
@@ -22,6 +22,9 @@ description:
|
||||
configure the clocks of the parent serial device so that a requested baud of 38.4 kBaud
|
||||
results in the standard MIDI baud rate, and set the 'current-speed' property to 38400 (default)
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/serial/serial-peripheral-props.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: serial-midi
|
||||
|
||||
@@ -77,7 +77,7 @@ Optional properties:
|
||||
|
||||
- st,odd-pwm-speed-mode:
|
||||
If present, PWM speed mode run on odd speed mode (341.3 kHz) on all
|
||||
channels. If not present, normal PWM spped mode (384 kHz) will be used.
|
||||
channels. If not present, normal PWM speed mode (384 kHz) will be used.
|
||||
|
||||
- st,distortion-compensation:
|
||||
If present, distortion compensation variable uses DCC coefficient.
|
||||
|
||||
@@ -311,7 +311,7 @@ examples:
|
||||
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
// Example 1 (new calbiration data: for pre v1 IP):
|
||||
// Example 1 (new calibration data: for pre v1 IP):
|
||||
thermal-sensor@4a9000 {
|
||||
compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
|
||||
reg = <0x4a9000 0x1000>, /* TM */
|
||||
|
||||
@@ -1,31 +0,0 @@
|
||||
Freescale FlexTimer Module (FTM) Timer
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : should be "fsl,ftm-timer"
|
||||
- reg : Specifies base physical address and size of the register sets for the
|
||||
clock event device and clock source device.
|
||||
- interrupts : Should be the clock event device interrupt.
|
||||
- clocks : The clocks provided by the SoC to drive the timer, must contain an
|
||||
entry for each entry in clock-names.
|
||||
- clock-names : Must include the following entries:
|
||||
o "ftm-evt"
|
||||
o "ftm-src"
|
||||
o "ftm-evt-counter-en"
|
||||
o "ftm-src-counter-en"
|
||||
- big-endian: One boolean property, the big endian mode will be in use if it is
|
||||
present, or the little endian mode will be in use for all the device registers.
|
||||
|
||||
Example:
|
||||
ftm: ftm@400b8000 {
|
||||
compatible = "fsl,ftm-timer";
|
||||
reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
|
||||
interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "ftm-evt", "ftm-src",
|
||||
"ftm-evt-counter-en", "ftm-src-counter-en";
|
||||
clocks = <&clks VF610_CLK_FTM2>,
|
||||
<&clks VF610_CLK_FTM3>,
|
||||
<&clks VF610_CLK_FTM2_EXT_FIX_EN>,
|
||||
<&clks VF610_CLK_FTM3_EXT_FIX_EN>;
|
||||
big-endian;
|
||||
};
|
||||
@@ -0,0 +1,59 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/timer/fsl,ftm-timer.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale FlexTimer Module (FTM) Timer
|
||||
|
||||
maintainers:
|
||||
- Animesh Agarwal <animeshagarwal28@gmail.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,ftm-timer
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
description: The clocks provided by the SoC to drive the timer, must
|
||||
contain an entry for each entry in clock-names.
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: ftm-evt
|
||||
- const: ftm-src
|
||||
- const: ftm-evt-counter-en
|
||||
- const: ftm-src-counter-en
|
||||
|
||||
big-endian: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/vf610-clock.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
ftm@400b8000 {
|
||||
compatible = "fsl,ftm-timer";
|
||||
reg = <0x400b8000 0x1000>;
|
||||
interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "ftm-evt", "ftm-src", "ftm-evt-counter-en", "ftm-src-counter-en";
|
||||
clocks = <&clks VF610_CLK_FTM2>, <&clks VF610_CLK_FTM3>,
|
||||
<&clks VF610_CLK_FTM2_EXT_FIX_EN>, <&clks VF610_CLK_FTM3_EXT_FIX_EN>;
|
||||
big-endian;
|
||||
};
|
||||
@@ -1,26 +0,0 @@
|
||||
* NXP LPC3220 timer
|
||||
|
||||
The NXP LPC3220 timer is used on a wide range of NXP SoCs. This
|
||||
includes LPC32xx, LPC178x, LPC18xx and LPC43xx parts.
|
||||
|
||||
Required properties:
|
||||
- compatible:
|
||||
Should be "nxp,lpc3220-timer".
|
||||
- reg:
|
||||
Address and length of the register set.
|
||||
- interrupts:
|
||||
Reference to the timer interrupt
|
||||
- clocks:
|
||||
Should contain a reference to timer clock.
|
||||
- clock-names:
|
||||
Should contain "timerclk".
|
||||
|
||||
Example:
|
||||
|
||||
timer1: timer@40085000 {
|
||||
compatible = "nxp,lpc3220-timer";
|
||||
reg = <0x40085000 0x1000>;
|
||||
interrupts = <13>;
|
||||
clocks = <&ccu1 CLK_CPU_TIMER1>;
|
||||
clock-names = "timerclk";
|
||||
};
|
||||
@@ -0,0 +1,55 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/timer/nxp,lpc3220-timer.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NXP LPC3220 timer
|
||||
|
||||
maintainers:
|
||||
- Animesh Agarwal <animeshagarwal28@gmail.com>
|
||||
|
||||
description: |
|
||||
The NXP LPC3220 timer is used on a wide range of NXP SoCs. This includes
|
||||
LPC32xx, LPC178x, LPC18xx and LPC43xx parts.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: nxp,lpc3220-timer
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
const: timerclk
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/lpc32xx-clock.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
timer@4004c000 {
|
||||
compatible = "nxp,lpc3220-timer";
|
||||
reg = <0x4004c000 0x1000>;
|
||||
interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
|
||||
clocks = <&clk LPC32XX_CLK_TIMER1>;
|
||||
clock-names = "timerclk";
|
||||
};
|
||||
@@ -0,0 +1,68 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/timer/ti,da830-timer.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: TI DaVinci Timer
|
||||
|
||||
maintainers:
|
||||
- Kousik Sanagavarapu <five231003@gmail.com>
|
||||
|
||||
description: |
|
||||
This is a 64-bit timer found on TI's DaVinci architecture devices. The timer
|
||||
can be configured as a general-purpose 64-bit timer, dual general-purpose
|
||||
32-bit timers. When configured as dual 32-bit timers, each half can operate
|
||||
in conjunction (chain mode) or independently (unchained mode) of each other.
|
||||
|
||||
The timer is a free running up-counter and can generate interrupts when the
|
||||
counter reaches preset counter values.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: ti,da830-timer
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
minItems: 2
|
||||
maxItems: 10
|
||||
|
||||
interrupt-names:
|
||||
minItems: 2
|
||||
items:
|
||||
- const: tint12
|
||||
- const: tint34
|
||||
- const: cmpint0
|
||||
- const: cmpint1
|
||||
- const: cmpint2
|
||||
- const: cmpint3
|
||||
- const: cmpint4
|
||||
- const: cmpint5
|
||||
- const: cmpint6
|
||||
- const: cmpint7
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
timer@20000 {
|
||||
compatible = "ti,da830-timer";
|
||||
reg = <0x20000 0x1000>;
|
||||
interrupts = <21>, <22>;
|
||||
interrupt-names = "tint12", "tint34";
|
||||
clocks = <&pll0_auxclk>;
|
||||
};
|
||||
|
||||
...
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user