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wip dts

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This commit is contained in:
Thomas Makin
2025-07-13 15:27:14 -05:00
parent f43802d840
commit d0a2b9fbec
2 changed files with 211 additions and 0 deletions
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164
arch/arm64/boot/dts/nvidia/tegra210b01-nx.dtsi
View File

@@ -17,12 +17,150 @@
reg = <0x0 0x80000000 0x0 0xc0000000>;
};
/* SDMMC4 for EMMC */
sdhci@700b0600 {
cd-gpios = <&gpio TEGRA_GPIO(Z, 1) 0>;
cd-debounce = <128>;
bus-width = <8>;
uhs-mask = <0x0>; /* All modes */
tap-delay = <11>;
trim-delay = <13>;
only-1-8-v;
no-sdio;
no-sd;
max-clk-limit = <200000000>;
disable-dynamic-host-clk-gating;
adma-xfer-size = <8388608>; /* 8MiB */
pll_source = "pll_p", "pll_c4_out2";
clocks = <&tegra_car TEGRA210_CLK_SDMMC4>,
<&tegra_car TEGRA210_CLK_PLL_P>,
<&tegra_car TEGRA210_CLK_PLL_C4_OUT2>,
<&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
clock-names = "sdmmc", "pll_p", "pll_c4_out2", "sdmmc_legacy_tm";
status = "disabled";
};
/* SDMMC3 Unused */
sdhci@700b0400 {
status = "disabled";
};
/* SDMMC2 for Gamecard */
sdhci@700b0200 {
uhs-mask = <0x0>; /* All modes */
tap-delay = <11>;
trim-delay = <13>;
nvidia,is-ddr-tap-delay;
nvidia,ddr-tap-delay = <0>;
mmc-ocr-mask = <0>;
dqs-trim-delay = <17>;
dqs-trim-delay-hs533 = <24>;
max-clk-limit = <200000000>;
bus-width = <8>;
built-in;
calib-3v3-offsets = <0x0505>;
calib-1v8-offsets = <0x0505>;
compad-vref-3v3 = <0x7>;
compad-vref-1v8 = <0x7>;
nvidia,en-io-trim-volt;
nvidia,is-emmc;
nvidia,enable-cq;
ignore-pm-notify;
keep-power-in-suspend;
non-removable;
cap-mmc-highspeed;
cap-sd-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
nvidia,enable-strobe-mode;
pll_source = "pll_p", "pll_c4_out2";
clocks = <&tegra_car TEGRA210_CLK_SDMMC2>,
<&tegra_car TEGRA210_CLK_PLL_P>,
<&tegra_car TEGRA210_CLK_PLL_C4_OUT2>;
clock-names = "sdmmc", "pll_p", "pll_c4_out2";
status = "disabled";
};
/* SDMMC1 for uSD card */
sdhci@700b0000 {
uhs-mask = <0x0c>; /* Disable SDR50/DDR50 */
tap-delay = <11>;
trim-delay = <14>;
power-off-rail;
nvidia,update-pinctrl-settings;
nvidia,sd-device;
no-sdio;
no-mmc;
max-current-800ma;
max-clk-limit = <208000000>;
sdr50-clk-limit = <100000000>;
sdr104-hs200-clk-limit = <200000000>;
ddr-clk-limit = <208000000>; /* 416 MHz for host */
ddr50-clk-limit = <48000000>; /* 86 MHz for host */
ddr200-clk-limit = <200000000>; /* 400 MHz for host */
disable-dynamic-host-clk-gating;
adma-xfer-size = <8388608>; /* 8MiB */
default-drv-type = <1>;
pll_source = "pll_p", "pll_c4_out2", "pll_c4_out0";
clocks = <&tegra_car TEGRA210_CLK_SDMMC1>,
<&tegra_car TEGRA210_CLK_PLL_P>,
<&tegra_car TEGRA210_CLK_PLL_C4_OUT2>,
<&tegra_car TEGRA210_CLK_PLL_C4_OUT0>,
<&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
clock-names = "sdmmc", "pll_p", "pll_c4_out2", "pll_c4_out0", "sdmmc_legacy_tm";
nvidia,cd-wakeup-capable;
status = "okay";
nvidia,pmc-wakeup = <&tegra_pmc
PMC_WAKE_TYPE_EVENT 35 (PMC_TRIGGER_TYPE_RISING | PMC_TRIGGER_TYPE_FALLING)>; /* gpio_pz1_IB */
};
serial@70006000 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
pinmux@700008d4 {
dsi_ab_pad_default: dsi_ab_pad_default {
dsi_ab_pad_enable {
nvidia,pins = "pad_dsi_ab";
nvidia,pad-power = <TEGRA_PIN_ENABLE>;
};
};
dsi_cd_pad_default: dsi_cd_pad_default {
dsi_cd_pad_enable {
nvidia,pins = "pad_dsi_cd";
nvidia,pad-power = <TEGRA_PIN_ENABLE>;
};
};
dsi_ab_pad_idle: dsi_ab_pad_idle {
dsi_ab_pad_disable {
nvidia,pins = "pad_dsi_ab";
nvidia,pad-power = <TEGRA_PIN_DISABLE>;
};
};
dsi_cd_pad_idle: dsi_cd_pad_idle {
dsi_cd_pad_disable {
nvidia,pins = "pad_dsi_cd";
nvidia,pad-power = <TEGRA_PIN_DISABLE>;
};
};
/* Always on for T210B01 NX */
sdmmc1_schmitt_disable {
sdmmc1 {
nvidia,schmitt = <TEGRA_PIN_ENABLE>;
};
};
sdmmc1_clk_schmitt_disable {
sdmmc1 {
nvidia,schmitt = <TEGRA_PIN_ENABLE>;
};
};
};
pmc@7000e400 {
nvidia,invert-interrupt;
nvidia,suspend-mode = <0>;
@@ -47,6 +185,32 @@
#clock-cells = <0>;
};
host1x@50000000 {
dc@54200000 {
pinctrl-names = "pad_ab_default", "pad_ab_idle",
"pad_cd_default", "pad_cd_idle";
pinctrl-0 = <&dsi_ab_pad_default>;
pinctrl-1 = <&dsi_ab_pad_idle>;
pinctrl-2 = <&dsi_cd_pad_default>;
pinctrl-3 = <&dsi_cd_pad_idle>;
};
};
clock@70110000 {
status = "okay";
vdd-cpu-supply = <&cpu_max_reg>;
nvidia,align-step-uv = <5000>;
nvidia,sample-rate = <12500>;
nvidia,droop-ctrl = <0x00000f00>;
nvidia,force-mode = <1>;
nvidia,cf = <6>;
nvidia,ci = <0>;
nvidia,cg = <2>;
nvidia,i2c-fs-rate = <400000>;
nvidia,pmic-undershoot-gb = <0>; /* Use pmic default min */
/* nvidia,dfll-max-freq-khz = <1683000>; */
};
cpus {
cpu@0 {
enable-method = "psci";

47
arch/arm64/boot/dts/nvidia/tegra210b01-vali.dts
View File

@@ -64,4 +64,51 @@
};
};
host1x@50000000 {
/* tegradc.1: DP */
dc@54240000 {
status = "disabled";
};
sor1 {
status = "disabled";
};
dpaux1 {
status = "disabled";
};
dsi {
prod-settings {
#prod-cells = <3>;
dsi-padctrl-prod {
prod = <
0x00000148 0x000fffff 0x00077777 /* PAD_CONTROL_4 */
0x0000014c 0x000fffff 0x00077777 /* PAD_CONTROL_5 */
0x00000150 0x00003333 0x00001111 /* PAD_CONTROL_6 */
>;
};
};
};
};
sdhci@700b0600 {
vqmmc-supply = <&max77620_sd3>;
vmmc-supply = <&vdd_3v3>;
};
sdhci@700b0400 {
vqmmc-supply = <&max77620_sd3>;
vmmc-supply = <&vdd_3v3>;
};
sdhci@700b0200 {
vqmmc-supply = <&max77620_sd3>;
vmmc-supply = <&vdd_3v3>;
};
sdhci@700b0000 {
vqmmc-supply = <&max77620_ldo2>;
vmmc-supply = <&en_vdd_sd>;
};
};