dt-bindings: soc: intel: lgm-syscon: Move to dedicated schema
intel,lgm-syscon is not a simple syscon device - it has children - thus it should be fully documented in its own binding. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240626-dt-bindings-mfd-syscon-split-v3-3-3409903bb99b@linaro.org Signed-off-by: Lee Jones <lee@kernel.org>
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Lee Jones
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@@ -57,7 +57,6 @@ properties:
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- hisilicon,pcie-sas-subctrl
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- hisilicon,peri-subctrl
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- hpe,gxp-sysreg
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- intel,lgm-syscon
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- loongson,ls1b-syscon
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- loongson,ls1c-syscon
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- marvell,armada-3700-cpu-misc
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@@ -0,0 +1,57 @@
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/intel/intel,lgm-syscon.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Intel Lightning Mountain(LGM) Syscon
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maintainers:
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- Chuanhua Lei <lchuanhua@maxlinear.com>
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- Rahul Tanwar <rtanwar@maxlinear.com>
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properties:
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compatible:
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items:
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- const: intel,lgm-syscon
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- const: syscon
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reg:
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maxItems: 1
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ranges: true
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"#address-cells":
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const: 1
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"#size-cells":
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const: 1
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patternProperties:
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"^emmc-phy@[0-9a-f]+$":
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$ref: /schemas/phy/intel,lgm-emmc-phy.yaml#
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required:
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- compatible
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- reg
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- "#address-cells"
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- "#size-cells"
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additionalProperties: false
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examples:
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- |
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chiptop@e0200000 {
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compatible = "intel,lgm-syscon", "syscon";
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reg = <0xe0200000 0x100>;
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ranges = <0x0 0xe0200000 0x100>;
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#address-cells = <1>;
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#size-cells = <1>;
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emmc-phy@a8 {
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compatible = "intel,lgm-emmc-phy";
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reg = <0x00a8 0x10>;
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clocks = <&emmc>;
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#phy-cells = <0>;
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};
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};
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