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arm64: dts: exynos: Add GSCL power domain to Exynos 5433 SoC

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This patch adds support for GSCL power domain to Exynos 5433 SoCs, which
contains following devices: a clock controller, three GSCL video scalers and
their SYSMMUs.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit is contained in:
Marek Szyprowski
2017-11-29 12:26:33 +01:00
committed by Krzysztof Kozlowski
parent bb7b2c6594
commit c260722072
1 changed files with 14 additions and 0 deletions
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arch/arm64/boot/dts/exynos/exynos5433.dtsi
+14
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@@ -443,6 +443,7 @@
clocks = <&xxti>,
<&cmu_top CLK_ACLK_GSCL_111>,
<&cmu_top CLK_ACLK_GSCL_333>;
power-domains = <&pd_gscl>;
};
cmu_apollo: clock-controller@11900000 {
@@ -543,6 +544,13 @@
<&cmu_top CLK_ACLK_CAM1_552>;
};
pd_gscl: power-domain@105c4000 {
compatible = "samsung,exynos5433-pd";
reg = <0x105c4000 0x20>;
#power-domain-cells = <0>;
label = "GSCL";
};
tmu_atlas0: tmu@10060000 {
compatible = "samsung,exynos5433-tmu";
reg = <0x10060000 0x200>;
@@ -910,6 +918,7 @@
<&cmu_gscl CLK_ACLK_XIU_GSCLX>,
<&cmu_gscl CLK_ACLK_GSCLBEND_333>;
iommus = <&sysmmu_gscl0>;
power-domains = <&pd_gscl>;
};
gsc_1: video-scaler@13C10000 {
@@ -923,6 +932,7 @@
<&cmu_gscl CLK_ACLK_XIU_GSCLX>,
<&cmu_gscl CLK_ACLK_GSCLBEND_333>;
iommus = <&sysmmu_gscl1>;
power-domains = <&pd_gscl>;
};
gsc_2: video-scaler@13C20000 {
@@ -936,6 +946,7 @@
<&cmu_gscl CLK_ACLK_XIU_GSCLX>,
<&cmu_gscl CLK_ACLK_GSCLBEND_333>;
iommus = <&sysmmu_gscl2>;
power-domains = <&pd_gscl>;
};
jpeg: codec@15020000 {
@@ -1010,6 +1021,7 @@
clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL0>,
<&cmu_gscl CLK_PCLK_SMMU_GSCL0>;
#iommu-cells = <0>;
power-domains = <&pd_gscl>;
};
sysmmu_gscl1: sysmmu@13c90000 {
@@ -1020,6 +1032,7 @@
clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL1>,
<&cmu_gscl CLK_PCLK_SMMU_GSCL1>;
#iommu-cells = <0>;
power-domains = <&pd_gscl>;
};
sysmmu_gscl2: sysmmu@13ca0000 {
@@ -1030,6 +1043,7 @@
clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL2>,
<&cmu_gscl CLK_PCLK_SMMU_GSCL2>;
#iommu-cells = <0>;
power-domains = <&pd_gscl>;
};
sysmmu_jpeg: sysmmu@15060000 {