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tegra: dfll: use tune1_low

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This commit is contained in:
Thomas Makin
2025-07-13 23:42:25 -05:00
parent 3e7a1ff10e
commit b49e29943f
1 changed files with 4 additions and 4 deletions
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8
drivers/clk/tegra/clk-tegra124-dfll-fcpu.c
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@@ -589,7 +589,7 @@ static struct cvb_table tegra210b01_cpu_cvb_tables[] = {
CPUB01_CVB_TABLE,
.cpu_dfll_data = {
.tune0_low = 0x0000ffcf,
.tune1 = 0x012207ff,
.tune1_low = 0x012207ff,
.tune_high_min_millivolts = 850,
}
},
@@ -607,7 +607,7 @@ static struct cvb_table tegra210b01_cpu_cvb_tables[] = {
.cpu_dfll_data = {
.tune0_low = 0x0000ffa0,
.tune0_high = 0x0000ffff,
.tune1 = 0x021107ff,
.tune1_low = 0x021107ff,
.tune_high_min_millivolts = 850,
}
},
@@ -619,7 +619,7 @@ static struct cvb_table tegra210b01_cpu_cvb_tables[] = {
.cpu_dfll_data = {
.tune0_low = 0x0000ff90,
.tune0_high = 0x0000ffff,
.tune1 = 0x021107ff,
.tune1_low = 0x021107ff,
.tune_high_min_millivolts = 850,
}
},
@@ -630,7 +630,7 @@ static struct cvb_table tegra210b01_cpu_cvb_tables[] = {
CPUB01_CVB_TABLE,
.cpu_dfll_data = {
.tune0_low = 0x0000ffcf,
.tune1 = 0x012207ff,
.tune1_low = 0x012207ff,
.tune_high_min_millivolts = 850,
}
},