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drm/amdgpu: added register list driver ctx (v2)

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updated psp bin parsing and load register list

v2: update to latest interface (Alex)

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
John Clements
2020-11-18 14:24:52 +08:00
committed by Alex Deucher
parent d74decc412
commit b2aa382ae7
3 changed files with 8 additions and 0 deletions
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drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+3
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@@ -2756,6 +2756,9 @@ int psp_init_sos_microcode(struct psp_context *psp,
adev->psp.spl_bin_size = le32_to_cpu(sos_hdr_v1_3->spl_size_bytes);
adev->psp.spl_start_addr = (uint8_t *)adev->psp.sys_start_addr +
le32_to_cpu(sos_hdr_v1_3->spl_offset_bytes);
adev->psp.rl_bin_size = le32_to_cpu(sos_hdr_v1_3->rl_size_bytes);
adev->psp.rl_start_addr = (uint8_t *)adev->psp.sys_start_addr +
le32_to_cpu(sos_hdr_v1_3->rl_offset_bytes);
}
break;
default:
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
+2
View File
@@ -248,11 +248,13 @@ struct psp_context
uint32_t toc_bin_size;
uint32_t kdb_bin_size;
uint32_t spl_bin_size;
uint32_t rl_bin_size;
uint8_t *sys_start_addr;
uint8_t *sos_start_addr;
uint8_t *toc_start_addr;
uint8_t *kdb_start_addr;
uint8_t *spl_start_addr;
uint8_t *rl_start_addr;
/* tmr buffer */
struct amdgpu_bo *tmr_bo;
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
+3
View File
@@ -105,6 +105,9 @@ struct psp_firmware_header_v1_3 {
uint32_t spl_header_version;
uint32_t spl_offset_bytes;
uint32_t spl_size_bytes;
uint32_t rl_header_version;
uint32_t rl_offset_bytes;
uint32_t rl_size_bytes;
};
/* version_major=1, version_minor=0 */