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arm64: dts: qcom: qdu1000: Fix LLCC reg property

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The LLCC binding and driver was corrected to handle the stride
varying between platforms. Switch to the new format to ensure
accesses are done in the right place.

Fixes: b0e0290bc4 ("arm64: dts: qcom: qdu1000: correct LLCC reg entries")
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240619061641.5261-2-quic_kbajaj@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Komal Bajaj
2024-06-19 11:46:40 +05:30
committed by Bjorn Andersson
parent 94ea124aee
commit af355e799b
1 changed files with 15 additions and 1 deletions
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arch/arm64/boot/dts/qcom/qdu1000.dtsi
+15 -1
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@@ -1459,9 +1459,23 @@
system-cache-controller@19200000 {
compatible = "qcom,qdu1000-llcc";
reg = <0 0x19200000 0 0xd80000>,
reg = <0 0x19200000 0 0x80000>,
<0 0x19300000 0 0x80000>,
<0 0x19600000 0 0x80000>,
<0 0x19700000 0 0x80000>,
<0 0x19a00000 0 0x80000>,
<0 0x19b00000 0 0x80000>,
<0 0x19e00000 0 0x80000>,
<0 0x19f00000 0 0x80000>,
<0 0x1a200000 0 0x80000>;
reg-names = "llcc0_base",
"llcc1_base",
"llcc2_base",
"llcc3_base",
"llcc4_base",
"llcc5_base",
"llcc6_base",
"llcc7_base",
"llcc_broadcast_base";
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
};