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arm64: dts: qcom: sm8650: Add Broadcast_AND register in LLCC block

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Chipsets before SM8450 have only one broadcast register (Broadcast_OR)
which is used to broadcast writes and check for status bit 0 only in
all channels.
>From SM8450 onwards, a new Broadcast_AND region was added which checks
for status bit 1. This hasn't been updated and Broadcast_OR region
was wrongly being used to check for status bit 1 all along.
Hence mapping Broadcast_AND region's address space to LLCC in SM8650.

Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
Link: https://lore.kernel.org/r/3a8804b35f44485637398faa9c0bda76813fe4d7.1717014052.git.quic_uchalich@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Unnathi Chalicheemala
2024-05-31 09:45:28 -07:00
committed by Bjorn Andersson
parent 2a71a2eb1f
commit a7823576f7
1 changed files with 4 additions and 2 deletions
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arch/arm64/boot/dts/qcom/sm8650.dtsi
+4 -2
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@@ -4994,12 +4994,14 @@
<0 0x25400000 0 0x200000>,
<0 0x25200000 0 0x200000>,
<0 0x25600000 0 0x200000>,
<0 0x25800000 0 0x200000>;
<0 0x25800000 0 0x200000>,
<0 0x25a00000 0 0x200000>;
reg-names = "llcc0_base",
"llcc1_base",
"llcc2_base",
"llcc3_base",
"llcc_broadcast_base";
"llcc_broadcast_base",
"llcc_broadcast_and_base";
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
};