Merge a5db8e4544 ("Merge tag 'soc-arm-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc") into android-mainline

Steps on the way to v6.11-rc1

Change-Id: I07af6aac0533fec1aef53fd6c72a6f94b44b66f1
Signed-off-by: Tudor Ambarus <tudordana@google.com>
This commit is contained in:
Tudor Ambarus
2024-08-08 18:21:14 +00:00
23 changed files with 318 additions and 443 deletions
+9
View File
@@ -796,6 +796,11 @@ E: luisfcorreia@gmail.com
D: Ralink rt2x00 WLAN driver
S: Belas, Portugal
N: Benoît Cousson
E: bcousson@baylibre.com
D: TI OMAP Devicetree platforms
D: TI OMAP HWMOD boards
N: Alan Cox
W: http://www.linux.org.uk/diary/
D: Linux Networking (0.99.10->2.0.29)
@@ -4368,6 +4373,10 @@ N: Haojian Zhuang
E: haojian.zhuang@gmail.com
D: MMP support
N: Tsahee Zidenberg
E: tsahee@annapurnalabs.com
D: Annapurna Labs Alpine Architecture
N: Richard Zidlicky
E: rz@linux-m68k.org, rdzidlic@geocities.com
W: http://www.geocities.com/rdzidlic
@@ -1,19 +0,0 @@
ARM Dual Cluster System Configuration Block
-------------------------------------------
The Dual Cluster System Configuration Block (DCSCB) provides basic
functionality for controlling clocks, resets and configuration pins in
the Dual Cluster System implemented by the Real-Time System Model (RTSM).
Required properties:
- compatible : should be "arm,rtsm,dcscb"
- reg : physical base address and the size of the registers window
Example:
dcscb@60000000 {
compatible = "arm,rtsm,dcscb";
reg = <0x60000000 0x1000>;
};
+12 -4
View File
@@ -1887,6 +1887,15 @@ F: include/dt-bindings/reset/actions,*
F: include/linux/soc/actions/
N: owl
ARM/AIROHA SOC SUPPORT
M: Matthias Brugger <matthias.bgg@gmail.com>
M: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L: linux-mediatek@lists.infradead.org (moderated for non-subscribers)
S: Odd Fixes
F: arch/arm/boot/dts/airoha/
F: arch/arm64/boot/dts/airoha/
ARM/Allwinner SoC Clock Support
M: Emilio López <emilio@elopez.com.ar>
S: Maintained
@@ -1974,10 +1983,9 @@ F: drivers/soc/amlogic/
N: meson
ARM/Annapurna Labs ALPINE ARCHITECTURE
M: Tsahee Zidenberg <tsahee@annapurnalabs.com>
M: Antoine Tenart <atenart@kernel.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
S: Odd Fixes
F: arch/arm/boot/dts/amazon/
F: arch/arm/mach-alpine/
F: arch/arm64/boot/dts/amazon/
@@ -16421,7 +16429,6 @@ S: Maintained
F: arch/arm/*omap*/*clock*
OMAP DEVICE TREE SUPPORT
M: Benoît Cousson <bcousson@baylibre.com>
M: Tony Lindgren <tony@atomide.com>
L: linux-omap@vger.kernel.org
L: devicetree@vger.kernel.org
@@ -16476,7 +16483,6 @@ S: Maintained
F: arch/arm/mach-omap2/omap_hwmod*data*
OMAP HWMOD SUPPORT
M: Benoît Cousson <bcousson@baylibre.com>
M: Paul Walmsley <paul@pwsan.com>
L: linux-omap@vger.kernel.org
S: Maintained
@@ -19423,6 +19429,7 @@ F: arch/riscv/boot/dts/
X: arch/riscv/boot/dts/allwinner/
X: arch/riscv/boot/dts/renesas/
X: arch/riscv/boot/dts/sophgo/
X: arch/riscv/boot/dts/thead/
RISC-V PMU DRIVERS
M: Atish Patra <atishp@atishpatra.org>
@@ -19439,6 +19446,7 @@ M: Guo Ren <guoren@kernel.org>
M: Fu Wei <wefu@redhat.com>
L: linux-riscv@lists.infradead.org
S: Maintained
T: git https://github.com/pdp7/linux.git
F: arch/riscv/boot/dts/thead/
RNBD BLOCK DRIVERS
+1
View File
@@ -143,6 +143,7 @@ CONFIG_VIDEO_OV2640=m
CONFIG_VIDEO_OV7740=m
CONFIG_DRM=y
CONFIG_DRM_ATMEL_HLCDC=y
CONFIG_DRM_MICROCHIP_LVDS_SERIALIZER=y
CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_DRM_PANEL_EDP=y
CONFIG_FB_ATMEL=y
+7
View File
@@ -133,6 +133,7 @@ CONFIG_SMSC911X=y
# CONFIG_NET_VENDOR_STMICRO is not set
CONFIG_MICREL_PHY=y
CONFIG_AT803X_PHY=y
CONFIG_DP83867_PHY=y
CONFIG_CAN_FLEXCAN=y
CONFIG_USB_PEGASUS=m
CONFIG_USB_RTL8150=m
@@ -180,6 +181,7 @@ CONFIG_TOUCHSCREEN_SX8654=y
CONFIG_TOUCHSCREEN_COLIBRI_VF50=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_MMA8450=y
CONFIG_INPUT_GPIO_BEEPER=m
CONFIG_SERIO_SERPORT=m
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_IMX=y
@@ -211,6 +213,7 @@ CONFIG_GPIO_SIOX=m
CONFIG_GPIO_VF610=y
CONFIG_GPIO_MAX732X=y
CONFIG_GPIO_PCA953X=y
CONFIG_GPIO_PCA953X_IRQ=y
CONFIG_GPIO_PCF857X=y
CONFIG_GPIO_BD71815=y
CONFIG_GPIO_STMPE=y
@@ -226,6 +229,7 @@ CONFIG_RN5T618_POWER=m
CONFIG_SENSORS_MC13783_ADC=y
CONFIG_SENSORS_GPIO_FAN=y
CONFIG_SENSORS_IIO_HWMON=y
CONFIG_SENSORS_LM75=m
CONFIG_SENSORS_PWM_FAN=y
CONFIG_SENSORS_SY7636A=y
CONFIG_THERMAL_STATISTICS=y
@@ -282,6 +286,9 @@ CONFIG_DRM_PANEL_LVDS=y
CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_DRM_PANEL_EDP=y
CONFIG_DRM_PANEL_SEIKO_43WVF1G=y
CONFIG_DRM_DISPLAY_CONNECTOR=y
CONFIG_DRM_LVDS_CODEC=m
CONFIG_DRM_SII902X=y
CONFIG_DRM_TI_TFP410=y
CONFIG_DRM_DW_HDMI_AHB_AUDIO=m
CONFIG_DRM_DW_HDMI_CEC=y
+1
View File
@@ -469,6 +469,7 @@ CONFIG_SPI_XILINX=y
CONFIG_SPI_SPIDEV=y
CONFIG_SPMI=y
CONFIG_PINCTRL_AS3722=y
CONFIG_PINCTRL_MCP23S08=m
CONFIG_PINCTRL_MICROCHIP_SGPIO=y
CONFIG_PINCTRL_OCELOT=y
CONFIG_PINCTRL_PALMAS=y
-1
View File
@@ -14,7 +14,6 @@ CONFIG_CPUSETS=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_PROFILING=y
CONFIG_ARCH_VEXPRESS=y
CONFIG_ARCH_VEXPRESS_DCSCB=y
CONFIG_ARCH_VEXPRESS_TC2_PM=y
CONFIG_SMP=y
CONFIG_HAVE_ARM_ARCH_TIMER=y
+39 -16
View File
@@ -7,6 +7,7 @@
#include <linux/clk-provider.h>
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/gpio-pxa.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/soc/pxa/cpu.h>
@@ -17,6 +18,7 @@
#include <linux/platform_data/usb-ohci-pxa27x.h>
#include <linux/platform_data/mmp_dma.h>
#include "mfp-pxa2xx.h"
#include "regs-ost.h"
#include "reset.h"
#include "devices.h"
@@ -46,7 +48,7 @@ struct platform_device pxa_device_pmu = {
.num_resources = 1,
};
static struct resource pxamci_resources[] = {
static const struct resource pxamci_resources[] = {
[0] = {
.start = 0x41100000,
.end = 0x41100fff,
@@ -59,22 +61,26 @@ static struct resource pxamci_resources[] = {
},
};
static u64 pxamci_dmamask = 0xffffffffUL;
struct platform_device pxa_device_mci = {
.name = "pxa2xx-mci",
.id = 0,
.dev = {
.dma_mask = &pxamci_dmamask,
.coherent_dma_mask = 0xffffffff,
},
.num_resources = ARRAY_SIZE(pxamci_resources),
.resource = pxamci_resources,
};
void __init pxa_set_mci_info(struct pxamci_platform_data *info)
void __init pxa_set_mci_info(const struct pxamci_platform_data *info,
const struct property_entry *props)
{
pxa_register_device(&pxa_device_mci, info);
const struct platform_device_info mci_info = {
.name = "pxa2xx-mci",
.id = 0,
.res = pxamci_resources,
.num_res = ARRAY_SIZE(pxamci_resources),
.data = info,
.size_data = sizeof(*info),
.dma_mask = 0xffffffffUL,
.properties = props,
};
struct platform_device *mci_dev;
int err;
mci_dev = platform_device_register_full(&mci_info);
err = PTR_ERR_OR_ZERO(mci_dev);
if (err)
pr_err("Unable to create mci device: %d\n", err);
}
static struct pxa2xx_udc_mach_info pxa_udc_info = {
@@ -627,6 +633,11 @@ struct platform_device pxa27x_device_pwm1 = {
};
#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
const struct software_node pxa2xx_gpiochip_node = {
.name = "gpio-pxa",
};
struct resource pxa_resource_gpio[] = {
{
.start = 0x40e00000,
@@ -650,11 +661,19 @@ struct resource pxa_resource_gpio[] = {
},
};
static struct pxa_gpio_platform_data pxa2xx_gpio_info = {
.irq_base = PXA_GPIO_TO_IRQ(0),
.gpio_set_wake = gpio_set_wake,
};
struct platform_device pxa25x_device_gpio = {
.name = "pxa25x-gpio",
.id = -1,
.num_resources = ARRAY_SIZE(pxa_resource_gpio),
.resource = pxa_resource_gpio,
.dev = {
.platform_data = &pxa2xx_gpio_info,
},
};
struct platform_device pxa27x_device_gpio = {
@@ -662,7 +681,11 @@ struct platform_device pxa27x_device_gpio = {
.id = -1,
.num_resources = ARRAY_SIZE(pxa_resource_gpio),
.resource = pxa_resource_gpio,
.dev = {
.platform_data = &pxa2xx_gpio_info,
},
};
#endif /* CONFIG_PXA25x || CONFIG_PXA27x */
static struct resource pxa_dma_resource[] = {
[0] = {
+2 -3
View File
@@ -4,7 +4,6 @@
struct mmp_dma_platdata;
extern struct platform_device pxa_device_pmu;
extern struct platform_device pxa_device_mci;
extern struct platform_device pxa3xx_device_mci2;
extern struct platform_device pxa3xx_device_mci3;
extern struct platform_device pxa25x_device_udc;
@@ -53,8 +52,8 @@ extern struct platform_device pxa_device_asoc_ssp4;
extern struct platform_device pxa25x_device_gpio;
extern struct platform_device pxa27x_device_gpio;
extern struct platform_device pxa3xx_device_gpio;
extern struct platform_device pxa93x_device_gpio;
extern const struct software_node pxa2xx_gpiochip_node;
void __init pxa_register_device(struct platform_device *dev, void *data);
void __init pxa2xx_set_dmac_info(struct mmp_dma_platdata *dma_pdata);
+10 -14
View File
@@ -90,7 +90,7 @@ static struct pxamci_platform_data gumstix_mci_platform_data = {
static void __init gumstix_mmc_init(void)
{
pxa_set_mci_info(&gumstix_mci_platform_data);
pxa_set_mci_info(&gumstix_mci_platform_data, NULL);
}
#else
static void __init gumstix_mmc_init(void)
@@ -100,26 +100,22 @@ static void __init gumstix_mmc_init(void)
#endif
#ifdef CONFIG_USB_PXA25X
static struct gpiod_lookup_table gumstix_gpio_vbus_gpiod_table = {
.dev_id = "gpio-vbus",
.table = {
GPIO_LOOKUP("gpio-pxa", GPIO_GUMSTIX_USB_GPIOn,
"vbus", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("gpio-pxa", GPIO_GUMSTIX_USB_GPIOx,
"pullup", GPIO_ACTIVE_HIGH),
{ },
},
static const struct property_entry spitz_mci_props[] __initconst = {
PROPERTY_ENTRY_GPIO("vbus-gpios", &pxa2xx_gpiochip_node,
GPIO_GUMSTIX_USB_GPIOn, GPIO_ACTIVE_HIGH),
PROPERTY_ENTRY_GPIO("pullup-gpios", &pxa2xx_gpiochip_node,
GPIO_GUMSTIX_USB_GPIOx, GPIO_ACTIVE_HIGH),
{ }
};
static struct platform_device gumstix_gpio_vbus = {
static const struct platform_device_info gumstix_gpio_vbus_info __initconst = {
.name = "gpio-vbus",
.id = -1,
.id = PLATFORM_DEVID_NONE,
};
static void __init gumstix_udc_init(void)
{
gpiod_add_lookup_table(&gumstix_gpio_vbus_gpiod_table);
platform_device_register(&gumstix_gpio_vbus);
platform_device_register_full(&gumstix_gpio_vbus_info);
}
#else
static void gumstix_udc_init(void)
+2 -6
View File
@@ -178,12 +178,8 @@ void __init pxa25x_map_io(void)
pxa25x_get_clk_frequency_khz(1);
}
static struct pxa_gpio_platform_data pxa25x_gpio_info __initdata = {
.irq_base = PXA_GPIO_TO_IRQ(0),
.gpio_set_wake = gpio_set_wake,
};
static struct platform_device *pxa25x_devices[] __initdata = {
&pxa25x_device_gpio,
&pxa25x_device_udc,
&pxa_device_pmu,
&pxa_device_i2s,
@@ -243,8 +239,8 @@ static int __init pxa25x_init(void)
register_syscore_ops(&pxa2xx_mfp_syscore_ops);
if (!of_have_populated_dt()) {
software_node_register(&pxa2xx_gpiochip_node);
pxa2xx_set_dmac_info(&pxa25x_dma_pdata);
pxa_register_device(&pxa25x_device_gpio, &pxa25x_gpio_info);
ret = platform_add_devices(pxa25x_devices,
ARRAY_SIZE(pxa25x_devices));
}
+2 -7
View File
@@ -276,12 +276,8 @@ void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
pxa_register_device(&pxa27x_device_i2c_power, info);
}
static struct pxa_gpio_platform_data pxa27x_gpio_info __initdata = {
.irq_base = PXA_GPIO_TO_IRQ(0),
.gpio_set_wake = gpio_set_wake,
};
static struct platform_device *devices[] __initdata = {
&pxa27x_device_gpio,
&pxa27x_device_udc,
&pxa_device_pmu,
&pxa_device_i2s,
@@ -345,8 +341,7 @@ static int __init pxa27x_init(void)
register_syscore_ops(&pxa2xx_mfp_syscore_ops);
if (!of_have_populated_dt()) {
pxa_register_device(&pxa27x_device_gpio,
&pxa27x_gpio_info);
software_node_register(&pxa2xx_gpiochip_node);
pxa2xx_set_dmac_info(&pxa27x_dma_pdata);
ret = platform_add_devices(devices,
ARRAY_SIZE(devices));
+152 -132
View File
@@ -14,6 +14,7 @@
#include <linux/gpio_keys.h>
#include <linux/gpio.h>
#include <linux/gpio/machine.h>
#include <linux/gpio/property.h>
#include <linux/leds.h>
#include <linux/i2c.h>
#include <linux/platform_data/i2c-pxa.h>
@@ -28,6 +29,7 @@
#include <linux/input/matrix_keypad.h>
#include <linux/regulator/machine.h>
#include <linux/io.h>
#include <linux/property.h>
#include <linux/reboot.h>
#include <linux/memblock.h>
@@ -128,6 +130,19 @@ static unsigned long spitz_pin_config[] __initdata = {
GPIO1_GPIO | WAKEUP_ON_EDGE_FALL, /* SPITZ_GPIO_RESET */
};
static const struct software_node spitz_scoop_1_gpiochip_node = {
.name = "sharp-scoop.0",
};
/* Only on Spitz */
static const struct software_node spitz_scoop_2_gpiochip_node = {
.name = "sharp-scoop.1",
};
/* Only on Akita */
static const struct software_node akita_max7310_gpiochip_node = {
.name = "i2c-max7310",
};
/******************************************************************************
* Scoop GPIO expander
@@ -452,35 +467,64 @@ static inline void spitz_keys_init(void) {}
* LEDs
******************************************************************************/
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
static struct gpio_led spitz_gpio_leds[] = {
{
.name = "spitz:amber:charge",
.default_trigger = "sharpsl-charge",
.gpio = SPITZ_GPIO_LED_ORANGE,
},
{
.name = "spitz:green:hddactivity",
.default_trigger = "disk-activity",
.gpio = SPITZ_GPIO_LED_GREEN,
},
static const struct software_node spitz_gpio_leds_node = {
.name = "spitz-leds",
};
static struct gpio_led_platform_data spitz_gpio_leds_info = {
.leds = spitz_gpio_leds,
.num_leds = ARRAY_SIZE(spitz_gpio_leds),
static const struct property_entry spitz_orange_led_props[] = {
PROPERTY_ENTRY_STRING("linux,default-trigger", "sharpsl-charge"),
PROPERTY_ENTRY_GPIO("gpios",
&spitz_scoop_1_gpiochip_node, 6, GPIO_ACTIVE_HIGH),
{ }
};
static struct platform_device spitz_led_device = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &spitz_gpio_leds_info,
},
static const struct software_node spitz_orange_led_node = {
.name = "spitz:amber:charge",
.parent = &spitz_gpio_leds_node,
.properties = spitz_orange_led_props,
};
static const struct property_entry spitz_green_led_props[] = {
PROPERTY_ENTRY_STRING("linux,default-trigger", "disk-activity"),
PROPERTY_ENTRY_GPIO("gpios",
&spitz_scoop_1_gpiochip_node, 0, GPIO_ACTIVE_HIGH),
{ }
};
static const struct software_node spitz_green_led_node = {
.name = "spitz:green:hddactivity",
.parent = &spitz_gpio_leds_node,
.properties = spitz_green_led_props,
};
static const struct software_node *spitz_gpio_leds_swnodes[] = {
&spitz_gpio_leds_node,
&spitz_orange_led_node,
&spitz_green_led_node,
NULL
};
static void __init spitz_leds_init(void)
{
platform_device_register(&spitz_led_device);
struct platform_device_info led_info = {
.name = "leds-gpio",
.id = PLATFORM_DEVID_NONE,
};
struct platform_device *led_dev;
int err;
err = software_node_register_node_group(spitz_gpio_leds_swnodes);
if (err) {
pr_err("failed to register LED software nodes: %d\n", err);
return;
}
led_info.fwnode = software_node_fwnode(&spitz_gpio_leds_node);
led_dev = platform_device_register_full(&led_info);
err = PTR_ERR_OR_ZERO(led_dev);
if (err)
pr_err("failed to create LED device: %d\n", err);
}
#else
static inline void spitz_leds_init(void) {}
@@ -490,53 +534,43 @@ static inline void spitz_leds_init(void) {}
* SSP Devices
******************************************************************************/
#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
static void spitz_ads7846_wait_for_hsync(void)
{
while (gpio_get_value(SPITZ_GPIO_HSYNC))
cpu_relax();
while (!gpio_get_value(SPITZ_GPIO_HSYNC))
cpu_relax();
}
static struct ads7846_platform_data spitz_ads7846_info = {
.model = 7846,
.vref_delay_usecs = 100,
.x_plate_ohms = 419,
.y_plate_ohms = 486,
.pressure_max = 1024,
.wait_for_sync = spitz_ads7846_wait_for_hsync,
static const struct property_entry spitz_ads7846_props[] = {
PROPERTY_ENTRY_STRING("compatible", "ti,ads7846"),
PROPERTY_ENTRY_U32("touchscreen-max-pressure", 1024),
PROPERTY_ENTRY_U16("ti,x-plate-ohms", 419),
PROPERTY_ENTRY_U16("ti,y-plate-ohms", 486),
PROPERTY_ENTRY_U16("ti,vref-delay-usecs", 100),
PROPERTY_ENTRY_GPIO("pendown-gpios", &pxa2xx_gpiochip_node,
SPITZ_GPIO_TP_INT, GPIO_ACTIVE_LOW),
PROPERTY_ENTRY_GPIO("ti,hsync-gpios", &pxa2xx_gpiochip_node,
SPITZ_GPIO_HSYNC, GPIO_ACTIVE_LOW),
{ }
};
static struct gpiod_lookup_table spitz_ads7846_gpio_table = {
.dev_id = "spi2.0",
.table = {
GPIO_LOOKUP("gpio-pxa", SPITZ_GPIO_TP_INT,
"pendown", GPIO_ACTIVE_LOW),
{ }
},
static const struct software_node spitz_ads7846_swnode = {
.name = "ads7846",
.properties = spitz_ads7846_props,
};
static struct gpiod_lookup_table spitz_lcdcon_gpio_table = {
.dev_id = "spi2.1",
.table = {
GPIO_LOOKUP("gpio-pxa", SPITZ_GPIO_BACKLIGHT_CONT,
"BL_CONT", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", SPITZ_GPIO_BACKLIGHT_ON,
"BL_ON", GPIO_ACTIVE_HIGH),
{ },
},
static const struct property_entry spitz_lcdcon_props[] = {
PROPERTY_ENTRY_GPIO("BL_CONT-gpios",
&spitz_scoop_2_gpiochip_node, 6, GPIO_ACTIVE_LOW),
PROPERTY_ENTRY_GPIO("BL_ON-gpios",
&spitz_scoop_2_gpiochip_node, 7, GPIO_ACTIVE_HIGH),
{ }
};
static struct gpiod_lookup_table akita_lcdcon_gpio_table = {
.dev_id = "spi2.1",
.table = {
GPIO_LOOKUP("gpio-pxa", AKITA_GPIO_BACKLIGHT_CONT,
"BL_CONT", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", AKITA_GPIO_BACKLIGHT_ON,
"BL_ON", GPIO_ACTIVE_HIGH),
{ },
},
static const struct property_entry akita_lcdcon_props[] = {
PROPERTY_ENTRY_GPIO("BL_ON-gpios",
&akita_max7310_gpiochip_node, 3, GPIO_ACTIVE_HIGH),
PROPERTY_ENTRY_GPIO("BL_CONT-gpios",
&akita_max7310_gpiochip_node, 4, GPIO_ACTIVE_LOW),
{ }
};
static struct software_node spitz_lcdcon_node = {
.name = "spitz-lcdcon",
};
static struct corgi_lcd_platform_data spitz_lcdcon_info = {
@@ -553,7 +587,7 @@ static struct spi_board_info spitz_spi_devices[] = {
.max_speed_hz = 1200000,
.bus_num = 2,
.chip_select = 0,
.platform_data = &spitz_ads7846_info,
.swnode = &spitz_ads7846_swnode,
.irq = PXA_GPIO_TO_IRQ(SPITZ_GPIO_TP_INT),
}, {
.modalias = "corgi-lcd",
@@ -561,6 +595,7 @@ static struct spi_board_info spitz_spi_devices[] = {
.bus_num = 2,
.chip_select = 1,
.platform_data = &spitz_lcdcon_info,
.swnode = &spitz_lcdcon_node,
}, {
.modalias = "max1111",
.max_speed_hz = 450000,
@@ -569,53 +604,40 @@ static struct spi_board_info spitz_spi_devices[] = {
},
};
static struct gpiod_lookup_table spitz_spi_gpio_table = {
.dev_id = "spi2",
.table = {
GPIO_LOOKUP_IDX("gpio-pxa", SPITZ_GPIO_ADS7846_CS, "cs", 0, GPIO_ACTIVE_LOW),
GPIO_LOOKUP_IDX("gpio-pxa", SPITZ_GPIO_LCDCON_CS, "cs", 1, GPIO_ACTIVE_LOW),
GPIO_LOOKUP_IDX("gpio-pxa", SPITZ_GPIO_MAX1111_CS, "cs", 2, GPIO_ACTIVE_LOW),
{ },
},
static const struct software_node_ref_args spitz_spi_gpio_refs[] = {
SOFTWARE_NODE_REFERENCE(&pxa2xx_gpiochip_node, SPITZ_GPIO_ADS7846_CS,
GPIO_ACTIVE_LOW),
SOFTWARE_NODE_REFERENCE(&pxa2xx_gpiochip_node, SPITZ_GPIO_LCDCON_CS,
GPIO_ACTIVE_LOW),
SOFTWARE_NODE_REFERENCE(&pxa2xx_gpiochip_node, SPITZ_GPIO_MAX1111_CS,
GPIO_ACTIVE_LOW),
};
static const struct property_entry spitz_spi_properties[] = {
PROPERTY_ENTRY_U32("num-cs", 3),
PROPERTY_ENTRY_REF_ARRAY("gpios", spitz_spi_gpio_refs),
{ }
};
static const struct software_node spitz_spi_node = {
static const struct platform_device_info spitz_spi_device_info = {
.name = "pxa2xx-spi",
/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1 */
.id = 2,
.properties = spitz_spi_properties,
};
static void __init spitz_spi_init(void)
{
struct platform_device *pd;
int id = 2;
int err;
if (machine_is_akita())
gpiod_add_lookup_table(&akita_lcdcon_gpio_table);
else
gpiod_add_lookup_table(&spitz_lcdcon_gpio_table);
gpiod_add_lookup_table(&spitz_ads7846_gpio_table);
gpiod_add_lookup_table(&spitz_spi_gpio_table);
/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1 */
pd = platform_device_alloc("pxa2xx-spi", id);
if (pd == NULL) {
pr_err("pxa2xx-spi: failed to allocate device id %d\n", id);
} else {
err = device_add_software_node(&pd->dev, &spitz_spi_node);
if (err) {
platform_device_put(pd);
pr_err("pxa2xx-spi: failed to add software node\n");
} else {
platform_device_add(pd);
}
}
pd = platform_device_register_full(&spitz_spi_device_info);
err = PTR_ERR_OR_ZERO(pd);
if (err)
pr_err("pxa2xx-spi: failed to instantiate SPI controller: %d\n",
err);
spitz_lcdcon_node.properties = machine_is_akita() ?
akita_lcdcon_props : spitz_lcdcon_props;
spi_register_board_info(ARRAY_AND_SIZE(spitz_spi_devices));
}
#else
@@ -648,21 +670,17 @@ static struct pxamci_platform_data spitz_mci_platform_data = {
.setpower = spitz_mci_setpower,
};
static struct gpiod_lookup_table spitz_mci_gpio_table = {
.dev_id = "pxa2xx-mci.0",
.table = {
GPIO_LOOKUP("gpio-pxa", SPITZ_GPIO_nSD_DETECT,
"cd", GPIO_ACTIVE_LOW),
GPIO_LOOKUP("gpio-pxa", SPITZ_GPIO_nSD_WP,
"wp", GPIO_ACTIVE_LOW),
{ },
},
static const struct property_entry spitz_mci_props[] __initconst = {
PROPERTY_ENTRY_GPIO("cd-gpios", &pxa2xx_gpiochip_node,
SPITZ_GPIO_nSD_DETECT, GPIO_ACTIVE_LOW),
PROPERTY_ENTRY_GPIO("wp-gpios", &pxa2xx_gpiochip_node,
SPITZ_GPIO_nSD_WP, GPIO_ACTIVE_LOW),
{ }
};
static void __init spitz_mmc_init(void)
{
gpiod_add_lookup_table(&spitz_mci_gpio_table);
pxa_set_mci_info(&spitz_mci_platform_data);
pxa_set_mci_info(&spitz_mci_platform_data, spitz_mci_props);
}
#else
static inline void spitz_mmc_init(void) {}
@@ -961,30 +979,24 @@ static void __init spitz_i2c_init(void)
static inline void spitz_i2c_init(void) {}
#endif
static struct gpiod_lookup_table spitz_audio_gpio_table = {
.dev_id = "spitz-audio",
.table = {
GPIO_LOOKUP("sharp-scoop.0", SPITZ_GPIO_MUTE_L - SPITZ_SCP_GPIO_BASE,
"mute-l", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("sharp-scoop.0", SPITZ_GPIO_MUTE_R - SPITZ_SCP_GPIO_BASE,
"mute-r", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("sharp-scoop.1", SPITZ_GPIO_MIC_BIAS - SPITZ_SCP2_GPIO_BASE,
"mic", GPIO_ACTIVE_HIGH),
{ },
},
static const struct property_entry spitz_audio_props[] = {
PROPERTY_ENTRY_GPIO("mute-l-gpios", &spitz_scoop_1_gpiochip_node, 3,
GPIO_ACTIVE_HIGH),
PROPERTY_ENTRY_GPIO("mute-r-gpios", &spitz_scoop_1_gpiochip_node, 4,
GPIO_ACTIVE_HIGH),
PROPERTY_ENTRY_GPIO("mic-gpios", &spitz_scoop_2_gpiochip_node, 8,
GPIO_ACTIVE_HIGH),
{ }
};
static struct gpiod_lookup_table akita_audio_gpio_table = {
.dev_id = "spitz-audio",
.table = {
GPIO_LOOKUP("sharp-scoop.0", SPITZ_GPIO_MUTE_L - SPITZ_SCP_GPIO_BASE,
"mute-l", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("sharp-scoop.0", SPITZ_GPIO_MUTE_R - SPITZ_SCP_GPIO_BASE,
"mute-r", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("i2c-max7310", AKITA_GPIO_MIC_BIAS - AKITA_IOEXP_GPIO_BASE,
"mic", GPIO_ACTIVE_HIGH),
{ },
},
static const struct property_entry akita_audio_props[] = {
PROPERTY_ENTRY_GPIO("mute-l-gpios", &spitz_scoop_1_gpiochip_node, 3,
GPIO_ACTIVE_HIGH),
PROPERTY_ENTRY_GPIO("mute-r-gpios", &spitz_scoop_1_gpiochip_node, 4,
GPIO_ACTIVE_HIGH),
PROPERTY_ENTRY_GPIO("mic-gpios", &akita_max7310_gpiochip_node, 2,
GPIO_ACTIVE_HIGH),
{ }
};
/******************************************************************************
@@ -992,12 +1004,14 @@ static struct gpiod_lookup_table akita_audio_gpio_table = {
******************************************************************************/
static inline void spitz_audio_init(void)
{
if (machine_is_akita())
gpiod_add_lookup_table(&akita_audio_gpio_table);
else
gpiod_add_lookup_table(&spitz_audio_gpio_table);
struct platform_device_info audio_info = {
.name = "spitz-audio",
.id = PLATFORM_DEVID_NONE,
.properties = machine_is_akita() ?
akita_audio_props : spitz_audio_props,
};
platform_device_register_simple("spitz-audio", -1, NULL, 0);
platform_device_register_full(&audio_info);
}
/******************************************************************************
@@ -1020,6 +1034,12 @@ static void spitz_restart(enum reboot_mode mode, const char *cmd)
static void __init spitz_init(void)
{
software_node_register(&spitz_scoop_1_gpiochip_node);
if (machine_is_akita())
software_node_register(&akita_max7310_gpiochip_node);
else
software_node_register(&spitz_scoop_2_gpiochip_node);
init_gpio_reset(SPITZ_GPIO_ON_RESET, 1, 0);
pm_power_off = spitz_poweroff;
+32 -18
View File
@@ -8,35 +8,49 @@
* Copyright (C) 2010 Google, Inc.
*/
#include <linux/property.h>
#include <linux/err.h>
#include <linux/gpio/machine.h>
#include <linux/gpio/property.h>
#include <linux/platform_device.h>
#include <linux/printk.h>
#include <linux/property.h>
#include "board.h"
static struct property_entry wifi_rfkill_prop[] __initdata = {
static const struct software_node tegra_gpiochip_node = {
.name = "tegra-gpio",
};
static const struct property_entry wifi_rfkill_prop[] __initconst = {
PROPERTY_ENTRY_STRING("name", "wifi_rfkill"),
PROPERTY_ENTRY_STRING("type", "wlan"),
{ },
PROPERTY_ENTRY_GPIO("reset-gpios",
&tegra_gpiochip_node, 25, GPIO_ACTIVE_HIGH),
PROPERTY_ENTRY_GPIO("shutdown-gpios",
&tegra_gpiochip_node, 85, GPIO_ACTIVE_HIGH),
{ }
};
static struct platform_device wifi_rfkill_device = {
.name = "rfkill_gpio",
.id = -1,
};
static struct gpiod_lookup_table wifi_gpio_lookup = {
.dev_id = "rfkill_gpio",
.table = {
GPIO_LOOKUP("tegra-gpio", 25, "reset", 0),
GPIO_LOOKUP("tegra-gpio", 85, "shutdown", 0),
{ },
},
static const struct platform_device_info wifi_rfkill_info __initconst = {
.name = "rfkill_gpio",
.id = PLATFORM_DEVID_NONE,
.properties = wifi_rfkill_prop,
};
void __init tegra_paz00_wifikill_init(void)
{
device_create_managed_software_node(&wifi_rfkill_device.dev, wifi_rfkill_prop, NULL);
gpiod_add_lookup_table(&wifi_gpio_lookup);
platform_device_register(&wifi_rfkill_device);
struct platform_device *pd;
int err;
err = software_node_register(&tegra_gpiochip_node);
if (err) {
pr_err("failed to register %s node: %d\n",
tegra_gpiochip_node.name, err);
return;
}
pd = platform_device_register_full(&wifi_rfkill_info);
err = PTR_ERR_OR_ZERO(pd);
if (err)
pr_err("failed to register WiFi rfkill device: %d\n", err);
}
-9
View File
@@ -278,15 +278,6 @@ config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA
build a working kernel, you must also enable relevant core
tile support or Flattened Device Tree based support options.
config ARCH_VEXPRESS_DCSCB
bool "Dual Cluster System Control Block (DCSCB) support"
depends on MCPM
select ARM_CCI400_PORT_CTRL
help
Support for the Dual Cluster System Configuration Block (DCSCB).
This is needed to provide CPU and cluster power management
on RTSM implementing big.LITTLE.
config ARCH_VEXPRESS_SPC
bool "Versatile Express Serial Power Controller (SPC)"
select PM_OPP
-3
View File
@@ -16,9 +16,6 @@ obj-$(CONFIG_ARCH_REALVIEW) += realview.o
# vexpress
obj-$(CONFIG_ARCH_VEXPRESS) := v2m.o
obj-$(CONFIG_ARCH_VEXPRESS_DCSCB) += dcscb.o dcscb_setup.o
CFLAGS_dcscb.o += -march=armv7-a
CFLAGS_REMOVE_dcscb.o = -pg
obj-$(CONFIG_ARCH_VEXPRESS_SPC) += spc.o
CFLAGS_REMOVE_spc.o = -pg
obj-$(CONFIG_ARCH_VEXPRESS_TC2_PM) += tc2_pm.o
-173
View File
@@ -1,173 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* dcscb.c - Dual Cluster System Configuration Block
*
* Created by: Nicolas Pitre, May 2012
* Copyright: (C) 2012-2013 Linaro Limited
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/errno.h>
#include <linux/of_address.h>
#include <linux/vexpress.h>
#include <linux/arm-cci.h>
#include <asm/mcpm.h>
#include <asm/proc-fns.h>
#include <asm/cacheflush.h>
#include <asm/cputype.h>
#include <asm/cp15.h>
#include "vexpress.h"
#define RST_HOLD0 0x0
#define RST_HOLD1 0x4
#define SYS_SWRESET 0x8
#define RST_STAT0 0xc
#define RST_STAT1 0x10
#define EAG_CFG_R 0x20
#define EAG_CFG_W 0x24
#define KFC_CFG_R 0x28
#define KFC_CFG_W 0x2c
#define DCS_CFG_R 0x30
static void __iomem *dcscb_base;
static int dcscb_allcpus_mask[2];
static int dcscb_cpu_powerup(unsigned int cpu, unsigned int cluster)
{
unsigned int rst_hold, cpumask = (1 << cpu);
pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
if (cluster >= 2 || !(cpumask & dcscb_allcpus_mask[cluster]))
return -EINVAL;
rst_hold = readl_relaxed(dcscb_base + RST_HOLD0 + cluster * 4);
rst_hold &= ~(cpumask | (cpumask << 4));
writel_relaxed(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4);
return 0;
}
static int dcscb_cluster_powerup(unsigned int cluster)
{
unsigned int rst_hold;
pr_debug("%s: cluster %u\n", __func__, cluster);
if (cluster >= 2)
return -EINVAL;
/* remove cluster reset and add individual CPU's reset */
rst_hold = readl_relaxed(dcscb_base + RST_HOLD0 + cluster * 4);
rst_hold &= ~(1 << 8);
rst_hold |= dcscb_allcpus_mask[cluster];
writel_relaxed(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4);
return 0;
}
static void dcscb_cpu_powerdown_prepare(unsigned int cpu, unsigned int cluster)
{
unsigned int rst_hold;
pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
BUG_ON(cluster >= 2 || !((1 << cpu) & dcscb_allcpus_mask[cluster]));
rst_hold = readl_relaxed(dcscb_base + RST_HOLD0 + cluster * 4);
rst_hold |= (1 << cpu);
writel_relaxed(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4);
}
static void dcscb_cluster_powerdown_prepare(unsigned int cluster)
{
unsigned int rst_hold;
pr_debug("%s: cluster %u\n", __func__, cluster);
BUG_ON(cluster >= 2);
rst_hold = readl_relaxed(dcscb_base + RST_HOLD0 + cluster * 4);
rst_hold |= (1 << 8);
writel_relaxed(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4);
}
static void dcscb_cpu_cache_disable(void)
{
/* Disable and flush the local CPU cache. */
v7_exit_coherency_flush(louis);
}
static void dcscb_cluster_cache_disable(void)
{
/* Flush all cache levels for this cluster. */
v7_exit_coherency_flush(all);
/*
* A full outer cache flush could be needed at this point
* on platforms with such a cache, depending on where the
* outer cache sits. In some cases the notion of a "last
* cluster standing" would need to be implemented if the
* outer cache is shared across clusters. In any case, when
* the outer cache needs flushing, there is no concurrent
* access to the cache controller to worry about and no
* special locking besides what is already provided by the
* MCPM state machinery is needed.
*/
/*
* Disable cluster-level coherency by masking
* incoming snoops and DVM messages:
*/
cci_disable_port_by_cpu(read_cpuid_mpidr());
}
static const struct mcpm_platform_ops dcscb_power_ops = {
.cpu_powerup = dcscb_cpu_powerup,
.cluster_powerup = dcscb_cluster_powerup,
.cpu_powerdown_prepare = dcscb_cpu_powerdown_prepare,
.cluster_powerdown_prepare = dcscb_cluster_powerdown_prepare,
.cpu_cache_disable = dcscb_cpu_cache_disable,
.cluster_cache_disable = dcscb_cluster_cache_disable,
};
extern void dcscb_power_up_setup(unsigned int affinity_level);
static int __init dcscb_init(void)
{
struct device_node *node;
unsigned int cfg;
int ret;
if (!cci_probed())
return -ENODEV;
node = of_find_compatible_node(NULL, NULL, "arm,rtsm,dcscb");
if (!node)
return -ENODEV;
dcscb_base = of_iomap(node, 0);
of_node_put(node);
if (!dcscb_base)
return -EADDRNOTAVAIL;
cfg = readl_relaxed(dcscb_base + DCS_CFG_R);
dcscb_allcpus_mask[0] = (1 << (((cfg >> 16) >> (0 << 2)) & 0xf)) - 1;
dcscb_allcpus_mask[1] = (1 << (((cfg >> 16) >> (1 << 2)) & 0xf)) - 1;
ret = mcpm_platform_register(&dcscb_power_ops);
if (!ret)
ret = mcpm_sync_init(dcscb_power_up_setup);
if (ret) {
iounmap(dcscb_base);
return ret;
}
pr_info("VExpress DCSCB support installed\n");
/*
* Future entries into the kernel can now go
* through the cluster entry vectors.
*/
vexpress_flags_set(__pa_symbol(mcpm_entry_point));
return 0;
}
early_initcall(dcscb_init);
-33
View File
@@ -1,33 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Created by: Dave Martin, 2012-06-22
* Copyright: (C) 2012-2013 Linaro Limited
*/
#include <linux/linkage.h>
ENTRY(dcscb_power_up_setup)
cmp r0, #0 @ check affinity level
beq 2f
/*
* Enable cluster-level coherency, in preparation for turning on the MMU.
* The ACTLR SMP bit does not need to be set here, because cpu_resume()
* already restores that.
*
* A15/A7 may not require explicit L2 invalidation on reset, dependent
* on hardware integration decisions.
* For now, this code assumes that L2 is either already invalidated,
* or invalidation is not required.
*/
b cci_enable_port_for_self
2: @ Implementation-specific local CPU setup operations should go here,
@ if any. In this case, there is nothing to do.
bx lr
ENDPROC(dcscb_power_up_setup)
-1
View File
@@ -207,7 +207,6 @@ if ARCH_NXP
config ARCH_LAYERSCAPE
bool "Freescale Layerscape SoC family"
select EDAC_SUPPORT
help
This enables support for the Freescale Layerscape SoC family.
+19 -3
View File
@@ -233,6 +233,8 @@ CONFIG_PCIE_HISI_STB=y
CONFIG_PCIE_ARMADA_8K=y
CONFIG_PCIE_TEGRA194_HOST=m
CONFIG_PCIE_QCOM=y
CONFIG_PCIE_RCAR_GEN4_HOST=m
CONFIG_PCIE_RCAR_GEN4_EP=m
CONFIG_PCIE_ROCKCHIP_DW_HOST=y
CONFIG_PCIE_VISCONTI_HOST=y
CONFIG_PCIE_LAYERSCAPE_GEN4=y
@@ -256,6 +258,7 @@ CONFIG_GOOGLE_CBMEM=m
CONFIG_GOOGLE_COREBOOT_TABLE=m
CONFIG_EFI_CAPSULE_LOADER=y
CONFIG_IMX_SCU=y
CONFIG_QCOM_TZMEM_MODE_SHMBRIDGE=y
CONFIG_QCOM_QSEECOM=y
CONFIG_QCOM_QSEECOM_UEFISECAPP=y
CONFIG_GNSS=m
@@ -279,6 +282,8 @@ CONFIG_MTD_NAND_FSL_IFC=y
CONFIG_MTD_NAND_QCOM=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_UBI=m
CONFIG_MTD_HYPERBUS=m
CONFIG_HBMC_AM654=m
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_NBD=m
CONFIG_VIRTIO_BLK=y
@@ -375,6 +380,7 @@ CONFIG_AQUANTIA_PHY=y
CONFIG_BCM54140_PHY=m
CONFIG_MARVELL_PHY=m
CONFIG_MARVELL_10G_PHY=y
CONFIG_MARVELL_88Q2XXX_PHY=y
CONFIG_MICREL_PHY=y
CONFIG_MICROSEMI_PHY=y
CONFIG_AT803X_PHY=y
@@ -414,6 +420,9 @@ CONFIG_ATH11K_AHB=m
CONFIG_ATH11K_PCI=m
CONFIG_ATH12K=m
CONFIG_BRCMFMAC=m
CONFIG_IWLWIFI=m
CONFIG_IWLDVM=m
CONFIG_IWLMVM=m
CONFIG_MWIFIEX=m
CONFIG_MWIFIEX_SDIO=m
CONFIG_MWIFIEX_PCIE=m
@@ -745,6 +754,7 @@ CONFIG_MFD_SEC_CORE=y
CONFIG_MFD_SL28CPLD=y
CONFIG_RZ_MTU3=y
CONFIG_MFD_TI_AM335X_TSCADC=m
CONFIG_MFD_TI_LP873X=m
CONFIG_MFD_TPS65219=y
CONFIG_MFD_TPS6594_I2C=m
CONFIG_MFD_ROHM_BD718XX=y
@@ -760,6 +770,7 @@ CONFIG_REGULATOR_FAN53555=y
CONFIG_REGULATOR_GPIO=y
CONFIG_REGULATOR_HI6421V530=y
CONFIG_REGULATOR_HI655X=y
CONFIG_REGULATOR_LP873X=m
CONFIG_REGULATOR_MAX77620=y
CONFIG_REGULATOR_MAX8973=y
CONFIG_REGULATOR_MAX20411=m
@@ -1063,6 +1074,7 @@ CONFIG_USB_MTU3=y
CONFIG_USB_MUSB_HDRC=y
CONFIG_USB_MUSB_SUNXI=y
CONFIG_USB_DWC3=y
CONFIG_OMAP_USB2=m
CONFIG_USB_DWC2=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_UDC=y
@@ -1216,6 +1228,7 @@ CONFIG_QCOM_BAM_DMA=y
CONFIG_QCOM_GPI_DMA=m
CONFIG_QCOM_HIDMA_MGMT=y
CONFIG_QCOM_HIDMA=y
CONFIG_DW_EDMA=m
CONFIG_RCAR_DMAC=y
CONFIG_RENESAS_USB_DMAC=m
CONFIG_RZ_DMAC=y
@@ -1334,6 +1347,7 @@ CONFIG_SM_GCC_8650=y
CONFIG_SM_GPUCC_6115=m
CONFIG_SM_GPUCC_8150=y
CONFIG_SM_GPUCC_8250=y
CONFIG_SM_GPUCC_8350=m
CONFIG_SM_GPUCC_8450=m
CONFIG_SM_GPUCC_8550=m
CONFIG_SM_GPUCC_8650=m
@@ -1556,6 +1570,7 @@ CONFIG_ARM_SPE_PMU=m
CONFIG_ARM_DMC620_PMU=m
CONFIG_HISI_PMU=y
CONFIG_ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU=m
CONFIG_NVIDIA_CORESIGHT_PMU_ARCH_SYSTEM_PMU=m
CONFIG_MESON_DDR_PMU=m
CONFIG_NVMEM_LAYOUT_SL28_VPD=m
CONFIG_NVMEM_IMX_OCOTP=y
@@ -1565,6 +1580,7 @@ CONFIG_NVMEM_LAYERSCAPE_SFP=m
CONFIG_NVMEM_MESON_EFUSE=m
CONFIG_NVMEM_MTK_EFUSE=y
CONFIG_NVMEM_QCOM_QFPROM=y
CONFIG_NVMEM_QCOM_SEC_QFPROM=m
CONFIG_NVMEM_RMEM=m
CONFIG_NVMEM_ROCKCHIP_EFUSE=y
CONFIG_NVMEM_ROCKCHIP_OTP=y
@@ -1594,7 +1610,7 @@ CONFIG_INTERCONNECT_IMX8MQ=m
CONFIG_INTERCONNECT_IMX8MP=y
CONFIG_INTERCONNECT_QCOM=y
CONFIG_INTERCONNECT_QCOM_MSM8916=m
CONFIG_INTERCONNECT_QCOM_MSM8996=m
CONFIG_INTERCONNECT_QCOM_MSM8996=y
CONFIG_INTERCONNECT_QCOM_OSM_L3=m
CONFIG_INTERCONNECT_QCOM_QCM2290=y
CONFIG_INTERCONNECT_QCOM_QCS404=m
@@ -1607,9 +1623,9 @@ CONFIG_INTERCONNECT_QCOM_SC8280XP=y
CONFIG_INTERCONNECT_QCOM_SDM845=y
CONFIG_INTERCONNECT_QCOM_SDX75=y
CONFIG_INTERCONNECT_QCOM_SM6115=y
CONFIG_INTERCONNECT_QCOM_SM8150=m
CONFIG_INTERCONNECT_QCOM_SM8150=y
CONFIG_INTERCONNECT_QCOM_SM8250=y
CONFIG_INTERCONNECT_QCOM_SM8350=m
CONFIG_INTERCONNECT_QCOM_SM8350=y
CONFIG_INTERCONNECT_QCOM_SM8450=y
CONFIG_INTERCONNECT_QCOM_SM8550=y
CONFIG_INTERCONNECT_QCOM_SM8650=y
+26
View File
@@ -110,8 +110,10 @@ CONFIG_PCIEPORTBUS=y
CONFIG_PCI_HOST_GENERIC=y
CONFIG_PCIE_XILINX=y
CONFIG_PCIE_FU740=y
CONFIG_PCIE_STARFIVE_HOST=m
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_SIFIVE_CCACHE=y
CONFIG_MTD=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
@@ -143,6 +145,7 @@ CONFIG_RAVB=y
CONFIG_STMMAC_ETH=m
CONFIG_MICREL_PHY=y
CONFIG_MICROSEMI_PHY=y
CONFIG_MOTORCOMM_PHY=y
CONFIG_CAN_RCAR_CANFD=m
CONFIG_INPUT_MOUSEDEV=y
CONFIG_KEYBOARD_SUN4I_LRADC=m
@@ -155,24 +158,35 @@ CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
CONFIG_VIRTIO_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_VIRTIO=y
CONFIG_HW_RANDOM_JH7110=m
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=m
CONFIG_I2C_DESIGNWARE_PLATFORM=y
CONFIG_I2C_MV64XXX=m
CONFIG_I2C_RIIC=y
CONFIG_SPI=y
CONFIG_SPI_CADENCE_QUADSPI=m
CONFIG_SPI_PL022=m
CONFIG_SPI_RSPI=m
CONFIG_SPI_SIFIVE=y
CONFIG_SPI_SUN6I=y
# CONFIG_PTP_1588_CLOCK is not set
CONFIG_GPIO_SIFIVE=y
CONFIG_POWER_RESET_GPIO_RESTART=y
CONFIG_SENSORS_SFCTEMP=m
CONFIG_CPU_THERMAL=y
CONFIG_DEVFREQ_THERMAL=y
CONFIG_RZG2L_THERMAL=y
CONFIG_WATCHDOG=y
CONFIG_SUNXI_WATCHDOG=y
CONFIG_RENESAS_RZG2LWDT=y
CONFIG_MFD_AXP20X_I2C=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_AXP20X=y
CONFIG_REGULATOR_GPIO=y
CONFIG_MEDIA_SUPPORT=m
CONFIG_VIDEO_CADENCE_CSI2RX=m
CONFIG_DRM=m
CONFIG_DRM_RADEON=m
CONFIG_DRM_NOUVEAU=m
@@ -184,6 +198,10 @@ CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_SOC=y
CONFIG_SND_SOC_RZ=m
CONFIG_SND_DESIGNWARE_I2S=m
CONFIG_SND_SOC_STARFIVE=m
CONFIG_SND_SOC_JH7110_PWMDAC=m
CONFIG_SND_SOC_JH7110_TDM=m
CONFIG_SND_SOC_WM8978=m
CONFIG_SND_SIMPLE_CARD=m
CONFIG_USB=y
@@ -197,6 +215,11 @@ CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_RENESAS_USBHS=m
CONFIG_USB_STORAGE=y
CONFIG_USB_UAS=y
CONFIG_USB_CDNS_SUPPORT=m
CONFIG_USB_CDNS3=m
CONFIG_USB_CDNS3_GADGET=y
CONFIG_USB_CDNS3_HOST=y
CONFIG_USB_CDNS3_STARFIVE=m
CONFIG_USB_MUSB_HDRC=m
CONFIG_USB_MUSB_SUNXI=m
CONFIG_NOP_USB_XCEIV=m
@@ -246,6 +269,9 @@ CONFIG_RZG2L_ADC=m
CONFIG_RESET_RZG2L_USBPHY_CTRL=y
CONFIG_PHY_SUN4I_USB=m
CONFIG_PHY_RCAR_GEN3_USB2=y
CONFIG_PHY_STARFIVE_JH7110_DPHY_RX=m
CONFIG_PHY_STARFIVE_JH7110_PCIE=m
CONFIG_PHY_STARFIVE_JH7110_USB=m
CONFIG_LIBNVDIMM=y
CONFIG_NVMEM_SUNXI_SID=y
CONFIG_EXT4_FS=y
+1
View File
@@ -414,4 +414,5 @@ static struct platform_driver vexpress_syscfg_driver = {
.probe = vexpress_syscfg_probe,
};
module_platform_driver(vexpress_syscfg_driver);
MODULE_DESCRIPTION("Versatile Express configuration bus");
MODULE_LICENSE("GPL v2");
+3 -1
View File
@@ -7,6 +7,7 @@
struct device;
struct mmc_host;
struct property_entry;
struct pxamci_platform_data {
unsigned int ocr_mask; /* available voltages */
@@ -18,7 +19,8 @@ struct pxamci_platform_data {
bool gpio_card_ro_invert; /* gpio ro is inverted */
};
extern void pxa_set_mci_info(struct pxamci_platform_data *info);
extern void pxa_set_mci_info(const struct pxamci_platform_data *info,
const struct property_entry *props);
extern void pxa3xx_set_mci2_info(struct pxamci_platform_data *info);
extern void pxa3xx_set_mci3_info(struct pxamci_platform_data *info);