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arm: sunxi: use the right clock phandles for UARTs

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All the UARTs are connected to clock gates; now that our clock driver
is able to handle them, make the switch.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
Emilio López
2013-03-27 18:20:39 -03:00
committed by Maxime Ripard
parent 07c60ef775
commit 9ff49ec75e
2 changed files with 8 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/boot/dts/sun4i-a10.dtsi
+6 -6
View File
@@ -54,7 +54,7 @@
interrupts = <1>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&osc>;
clocks = <&apb1_gates 16>;
status = "disabled";
};
@@ -64,7 +64,7 @@
interrupts = <3>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&osc>;
clocks = <&apb1_gates 18>;
status = "disabled";
};
@@ -74,7 +74,7 @@
interrupts = <17>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&osc>;
clocks = <&apb1_gates 20>;
status = "disabled";
};
@@ -84,7 +84,7 @@
interrupts = <18>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&osc>;
clocks = <&apb1_gates 21>;
status = "disabled";
};
@@ -94,7 +94,7 @@
interrupts = <19>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&osc>;
clocks = <&apb1_gates 22>;
status = "disabled";
};
@@ -104,7 +104,7 @@
interrupts = <20>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&osc>;
clocks = <&apb1_gates 23>;
status = "disabled";
};
};
arch/arm/boot/dts/sunxi.dtsi
+2 -2
View File
@@ -191,7 +191,7 @@
interrupts = <2>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&osc>;
clocks = <&apb1_gates 17>;
status = "disabled";
};
@@ -201,7 +201,7 @@
interrupts = <4>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&osc>;
clocks = <&apb1_gates 19>;
status = "disabled";
};
};