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Merge tag 'dt64-cleanup-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt

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Minor improvements in ARM64 DTS for v6.11

Few cleanups and improvements which were missed by their maintainers:
1. Spreadtrum: correct PMU nodes - split per clusters.
2. HiSilicon: add dedicated compatible to syscon node ("syscon" alone is
   not allowed).
3. APM: add dedicated compatible to syscon node (binding applied to MFD
   tree).

* tag 'dt64-cleanup-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
  arm64: dts: apm: Add dedicated syscon poweroff compatibles
  arm64: dts: hisilicon: hi3660: add dedicated hi3660-usb3-otg-bc compatible
  dt-bindings: soc: hisilicon: document hi3660-usb3-otg-bc
  arm64: dts: sprd: Split PMU nodes for heterogeneous CPUs

Link: https://lore.kernel.org/r/20240702065359.7378-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2024-07-08 16:24:55 +02:00
parent c36a19ed7e c030444661
commit 90a4146de8
6 changed files with 69 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Documentation/devicetree/bindings/soc/hisilicon/hisilicon,hi3660-usb3-otg-bc.yaml
+46
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@@ -0,0 +1,46 @@
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/hisilicon/hisilicon,hi3660-usb3-otg-bc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Hisilicon Kirin 960 USB OTG Battery Charging Syscon
maintainers:
- Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
properties:
compatible:
items:
- const: hisilicon,hi3660-usb3-otg-bc
- const: syscon
- const: simple-mfd
reg:
maxItems: 1
usb-phy:
$ref: /schemas/phy/hisilicon,hi3660-usb3.yaml
description: USB Phy node
required:
- compatible
- reg
- usb-phy
additionalProperties: false
examples:
- |
syscon@ff200000 {
compatible = "hisilicon,hi3660-usb3-otg-bc", "syscon", "simple-mfd";
reg = <0xff200000 0x1000>;
usb-phy {
compatible = "hisilicon,hi3660-usb-phy";
#phy-cells = <0>;
hisilicon,pericrg-syscon = <&crg_ctrl>;
hisilicon,pctrl-syscon = <&pctrl>;
hisilicon,eye-diagram-param = <0x22466e4>;
};
};
arch/arm64/boot/dts/apm/apm-merlin.dts
+1 -1
View File
@@ -32,7 +32,7 @@
};
poweroff_mbox: poweroff_mbox@10548000 {
compatible = "syscon";
compatible = "apm,merlin-poweroff-mailbox", "syscon";
reg = <0x0 0x10548000 0x0 0x30>;
};
arch/arm64/boot/dts/apm/apm-mustang.dts
+1 -1
View File
@@ -32,7 +32,7 @@
};
poweroff_mbox: poweroff_mbox@10548000 {
compatible = "syscon";
compatible = "apm,mustang-poweroff-mailbox", "syscon";
reg = <0x0 0x10548000 0x0 0x30>;
};
arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+1 -1
View File
@@ -1161,7 +1161,7 @@
};
usb3_otg_bc: usb3_otg_bc@ff200000 {
compatible = "syscon", "simple-mfd";
compatible = "hisilicon,hi3660-usb3-otg-bc", "syscon", "simple-mfd";
reg = <0x0 0xff200000 0x0 0x1000>;
usb_phy: usb-phy {
arch/arm64/boot/dts/sprd/ums512.dtsi
+10 -4
View File
@@ -136,16 +136,22 @@
<GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>; /* Hipervisor PPI */
};
pmu {
compatible = "arm,armv8-pmuv3";
pmu-a55 {
compatible = "arm,cortex-a55-pmu";
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&CPU0>, <&CPU1>, <&CPU2>, <&CPU3>, <&CPU4>, <&CPU5>;
};
pmu-a75 {
compatible = "arm,cortex-a75-pmu";
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&CPU6>, <&CPU7>;
};
soc: soc {
arch/arm64/boot/dts/sprd/ums9620.dtsi
+10 -4
View File
@@ -144,16 +144,22 @@
<GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>; /* Hipervisor PPI */
};
pmu {
compatible = "arm,armv8-pmuv3";
pmu-a55 {
compatible = "arm,cortex-a55-pmu";
interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&CPU0>, <&CPU1>, <&CPU2>, <&CPU3>;
};
pmu-a76 {
compatible = "arm,cortex-a76-pmu";
interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&CPU4>, <&CPU5>, <&CPU6>, <&CPU7>;
};
soc: soc {