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FROMLIST: virt: geniezone: Add irqchip support for virtual interrupt injection

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Enable GenieZone to handle virtual interrupt injection request.

Signed-off-by: Yingshiuan Pan <yingshiuan.pan@mediatek.com>
Co-developed-by: Kevenny Hsieh <kevenny.hsieh@mediatek.com>
Signed-off-by: Kevenny Hsieh <kevenny.hsieh@mediatek.com>
Signed-off-by: Yi-De Wu <yi-de.wu@mediatek.com>
Signed-off-by: Liju Chen <liju-clr.chen@mediatek.com>
Change-Id: Ie0277cdae27d58daeb03e27c24ea89b65b899643
Bug: 379230831
Link: https://lore.kernel.org/lkml/20241114100802.4116-10-liju-clr.chen@mediatek.com/
This commit is contained in:
Yingshiuan Pan
2023-04-21 14:34:02 +08:00
committed by Liju-clr Chen
parent f7e453c515
commit 8f6fe3359b
7 changed files with 218 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm64/geniezone/Makefile
+1 -1
View File
@@ -4,6 +4,6 @@
#
include $(srctree)/drivers/virt/geniezone/Makefile
gzvm-y += vm.o vcpu.o
gzvm-y += vm.o vcpu.o vgic.o
obj-$(CONFIG_MTK_GZVM) += gzvm.o
arch/arm64/geniezone/gzvm_arch_common.h
+4
View File
@@ -17,6 +17,8 @@ enum {
GZVM_FUNC_RUN = 5,
GZVM_FUNC_GET_ONE_REG = 8,
GZVM_FUNC_SET_ONE_REG = 9,
GZVM_FUNC_IRQ_LINE = 10,
GZVM_FUNC_CREATE_DEVICE = 11,
GZVM_FUNC_PROBE = 12,
GZVM_FUNC_ENABLE_CAP = 13,
GZVM_FUNC_INFORM_EXIT = 14,
@@ -37,6 +39,8 @@ enum {
#define MT_HVC_GZVM_RUN GZVM_HCALL_ID(GZVM_FUNC_RUN)
#define MT_HVC_GZVM_GET_ONE_REG GZVM_HCALL_ID(GZVM_FUNC_GET_ONE_REG)
#define MT_HVC_GZVM_SET_ONE_REG GZVM_HCALL_ID(GZVM_FUNC_SET_ONE_REG)
#define MT_HVC_GZVM_IRQ_LINE GZVM_HCALL_ID(GZVM_FUNC_IRQ_LINE)
#define MT_HVC_GZVM_CREATE_DEVICE GZVM_HCALL_ID(GZVM_FUNC_CREATE_DEVICE)
#define MT_HVC_GZVM_PROBE GZVM_HCALL_ID(GZVM_FUNC_PROBE)
#define MT_HVC_GZVM_ENABLE_CAP GZVM_HCALL_ID(GZVM_FUNC_ENABLE_CAP)
#define MT_HVC_GZVM_INFORM_EXIT GZVM_HCALL_ID(GZVM_FUNC_INFORM_EXIT)
arch/arm64/geniezone/vgic.c
+50
View File
@@ -0,0 +1,50 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2023 MediaTek Inc.
*/
#include <linux/irqchip/arm-gic-v3.h>
#include <linux/gzvm.h>
#include <linux/soc/mediatek/gzvm_drv.h>
#include "gzvm_arch_common.h"
int gzvm_arch_create_device(u16 vm_id, struct gzvm_create_device *gzvm_dev)
{
struct arm_smccc_res res;
return gzvm_hypcall_wrapper(MT_HVC_GZVM_CREATE_DEVICE, vm_id,
virt_to_phys(gzvm_dev), 0, 0, 0, 0, 0,
&res);
}
/**
* gzvm_arch_inject_irq() - Inject virtual interrupt to a VM
* @gzvm: Pointer to struct gzvm
* @vcpu_idx: vcpu index, only valid if PPI
* @irq: *SPI* irq number (excluding offset value `32`)
* @level: 1 if true else 0
*
* Return:
* * 0 - Success.
* * Negative - Failure.
*/
int gzvm_arch_inject_irq(struct gzvm *gzvm, unsigned int vcpu_idx,
u32 irq, bool level)
{
unsigned long a1 = assemble_vm_vcpu_tuple(gzvm->vm_id, vcpu_idx);
struct arm_smccc_res res;
/*
* VMM's virtual device irq number starts from 0, but ARM's shared peripheral
* interrupt number starts from 32. hypervisor adds offset 32
*/
gzvm_hypcall_wrapper(MT_HVC_GZVM_IRQ_LINE, a1, irq, level,
0, 0, 0, 0, &res);
if (res.a0) {
pr_err("Failed to set IRQ level (%d) to irq#%u on vcpu %d with ret=%d\n",
level, irq, vcpu_idx, (int)res.a0);
return -EFAULT;
}
return 0;
}
drivers/virt/geniezone/gzvm_common.h
+12
View File
@@ -0,0 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2023 MediaTek Inc.
*/
#ifndef __GZ_COMMON_H__
#define __GZ_COMMON_H__
int gzvm_irqchip_inject_irq(struct gzvm *gzvm, unsigned int vcpu_idx,
u32 irq, bool level);
#endif /* __GZVM_COMMON_H__ */
drivers/virt/geniezone/gzvm_vm.c
+81
View File
@@ -11,6 +11,7 @@
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/soc/mediatek/gzvm_drv.h>
#include "gzvm_common.h"
static DEFINE_MUTEX(gzvm_list_lock);
static LIST_HEAD(gzvm_list);
@@ -130,6 +131,72 @@ gzvm_vm_ioctl_set_memory_region(struct gzvm *gzvm,
return register_memslot_addr_range(gzvm, memslot);
}
int gzvm_irqchip_inject_irq(struct gzvm *gzvm, unsigned int vcpu_idx,
u32 irq, bool level)
{
return gzvm_arch_inject_irq(gzvm, vcpu_idx, irq, level);
}
static int gzvm_vm_ioctl_irq_line(struct gzvm *gzvm,
struct gzvm_irq_level *irq_level)
{
u32 irq = irq_level->irq;
u32 vcpu_idx, vcpu2_idx, irq_num;
bool level = irq_level->level;
vcpu_idx = FIELD_GET(GZVM_IRQ_LINE_VCPU, irq);
vcpu2_idx = FIELD_GET(GZVM_IRQ_LINE_VCPU2, irq) * (GZVM_IRQ_VCPU_MASK + 1);
irq_num = FIELD_GET(GZVM_IRQ_LINE_NUM, irq);
return gzvm_irqchip_inject_irq(gzvm, vcpu_idx + vcpu2_idx, irq_num,
level);
}
static int gzvm_vm_ioctl_create_device(struct gzvm *gzvm, void __user *argp)
{
struct gzvm_create_device *gzvm_dev;
void *dev_data = NULL;
int ret;
gzvm_dev = (struct gzvm_create_device *)alloc_pages_exact(PAGE_SIZE,
GFP_KERNEL);
if (!gzvm_dev)
return -ENOMEM;
if (copy_from_user(gzvm_dev, argp, sizeof(*gzvm_dev))) {
ret = -EFAULT;
goto err_free_dev;
}
if (gzvm_dev->attr_addr != 0 && gzvm_dev->attr_size != 0) {
size_t attr_size = gzvm_dev->attr_size;
void __user *attr_addr = u64_to_user_ptr(gzvm_dev->attr_addr);
/* Size of device specific data should not be over a page. */
if (attr_size > PAGE_SIZE)
return -EINVAL;
dev_data = alloc_pages_exact(attr_size, GFP_KERNEL);
if (!dev_data) {
ret = -ENOMEM;
goto err_free_dev;
}
if (copy_from_user(dev_data, attr_addr, attr_size)) {
ret = -EFAULT;
goto err_free_dev_data;
}
gzvm_dev->attr_addr = virt_to_phys(dev_data);
}
ret = gzvm_arch_create_device(gzvm->vm_id, gzvm_dev);
err_free_dev_data:
if (dev_data)
free_pages_exact(dev_data, 0);
err_free_dev:
free_pages_exact(gzvm_dev, 0);
return ret;
}
static int gzvm_vm_ioctl_enable_cap(struct gzvm *gzvm,
struct gzvm_enable_cap *cap,
void __user *argp)
@@ -163,6 +230,20 @@ static long gzvm_vm_ioctl(struct file *filp, unsigned int ioctl,
ret = gzvm_vm_ioctl_set_memory_region(gzvm, &userspace_mem);
break;
}
case GZVM_IRQ_LINE: {
struct gzvm_irq_level irq_event;
if (copy_from_user(&irq_event, argp, sizeof(irq_event))) {
ret = -EFAULT;
goto out;
}
ret = gzvm_vm_ioctl_irq_line(gzvm, &irq_event);
break;
}
case GZVM_CREATE_DEVICE: {
ret = gzvm_vm_ioctl_create_device(gzvm, argp);
break;
}
case GZVM_ENABLE_CAP: {
struct gzvm_enable_cap cap;
include/linux/soc/mediatek/gzvm_drv.h
+4
View File
@@ -161,4 +161,8 @@ int gzvm_arch_vcpu_run(struct gzvm_vcpu *vcpu, __u64 *exit_reason);
int gzvm_arch_destroy_vcpu(u16 vm_id, int vcpuid);
int gzvm_arch_inform_exit(u16 vm_id);
int gzvm_arch_create_device(u16 vm_id, struct gzvm_create_device *gzvm_dev);
int gzvm_arch_inject_irq(struct gzvm *gzvm, unsigned int vcpu_idx,
u32 irq, bool level);
#endif /* __GZVM_DRV_H__ */
include/uapi/linux/gzvm.h
+66
View File
@@ -100,6 +100,72 @@ struct gzvm_userspace_memory_region {
#define GZVM_SET_USER_MEMORY_REGION _IOW(GZVM_IOC_MAGIC, 0x46, \
struct gzvm_userspace_memory_region)
/* for GZVM_IRQ_LINE, irq field index values */
#define GZVM_IRQ_VCPU_MASK 0xff
#define GZVM_IRQ_LINE_TYPE GENMASK(27, 24)
#define GZVM_IRQ_LINE_VCPU GENMASK(23, 16)
#define GZVM_IRQ_LINE_VCPU2 GENMASK(31, 28)
#define GZVM_IRQ_LINE_NUM GENMASK(15, 0)
/* irq_type field */
#define GZVM_IRQ_TYPE_CPU 0
#define GZVM_IRQ_TYPE_SPI 1
#define GZVM_IRQ_TYPE_PPI 2
/* out-of-kernel GIC cpu interrupt injection irq_number field */
#define GZVM_IRQ_CPU_IRQ 0
#define GZVM_IRQ_CPU_FIQ 1
struct gzvm_irq_level {
union {
__u32 irq;
__s32 status;
};
__u32 level;
};
#define GZVM_IRQ_LINE _IOW(GZVM_IOC_MAGIC, 0x61, \
struct gzvm_irq_level)
enum gzvm_device_type {
GZVM_DEV_TYPE_ARM_VGIC_V3_DIST = 0,
GZVM_DEV_TYPE_ARM_VGIC_V3_REDIST = 1,
GZVM_DEV_TYPE_MAX,
};
/**
* struct gzvm_create_device: For GZVM_CREATE_DEVICE.
* @dev_type: Device type.
* @id: Device id.
* @flags: Bypass to hypervisor to handle them and these are flags of virtual
* devices.
* @dev_addr: Device ipa address in VM's view.
* @dev_reg_size: Device register range size.
* @attr_addr: If user -> kernel, this is user virtual address of device
* specific attributes (if needed). If kernel->hypervisor,
* this is ipa.
* @attr_size: This attr_size is the buffer size in bytes of each attribute
* needed from various devices. The attribute here refers to the
* additional data passed from VMM(e.g. Crosvm) to GenieZone
* hypervisor when virtual devices were to be created. Thus,
* we need attr_addr and attr_size in the gzvm_create_device
* structure to keep track of the attribute mentioned.
*
* Store information needed to create device.
*/
struct gzvm_create_device {
__u32 dev_type;
__u32 id;
__u64 flags;
__u64 dev_addr;
__u64 dev_reg_size;
__u64 attr_addr;
__u64 attr_size;
};
#define GZVM_CREATE_DEVICE _IOWR(GZVM_IOC_MAGIC, 0xe0, \
struct gzvm_create_device)
/*
* ioctls for vcpu fds
*/