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Merge tag 'icc-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next

Browse Source 
Georgi writes:

interconnect changes for 6.7

This pull request contains the interconnect changes for the 6.7-rc1 merge
window which contains just driver changes with the following highlights:

Driver changes:
- New interconnect driver for the SDX75 platform.
- Support for coefficients to allow node-specific rate adjustments.
- Update DT bindings according to the recent changes of how we
  represent the SMD and RPM bus clocks on Qualcomm platforms.
- Misc fixes and cleanups.

Signed-off-by: Georgi Djakov <djakov@kernel.org>

* tag 'icc-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc: (36 commits)
  interconnect: qcom: Convert to platform remove callback returning void
  dt-bindings: interconnect: qcom,rpmh: do not require reg on SDX65 MC virt
  interconnect: imx: Replace inclusion of kernel.h in the header
  interconnect: fix error handling in qnoc_probe()
  interconnect: qcom: osm-l3: Replace custom implementation of COUNT_ARGS()
  interconnect: msm8974: Replace custom implementation of COUNT_ARGS()
  interconnect: imx: Replace custom implementation of COUNT_ARGS()
  interconnect: qcom: Add SDX75 interconnect provider driver
  dt-bindings: interconnect: Add compatibles for SDX75
  interconnect: qcom: sm8350: Set ACV enable_mask
  interconnect: qcom: sm8250: Set ACV enable_mask
  interconnect: qcom: sm8150: Set ACV enable_mask
  interconnect: qcom: sm6350: Set ACV enable_mask
  interconnect: qcom: sdm845: Set ACV enable_mask
  interconnect: qcom: sdm670: Set ACV enable_mask
  interconnect: qcom: sc8280xp: Set ACV enable_mask
  interconnect: qcom: sc8180x: Set ACV enable_mask
  interconnect: qcom: sc7280: Set ACV enable_mask
  interconnect: qcom: sc7180: Set ACV enable_mask
  interconnect: qcom: qdu1000: Set ACV enable_mask
  ...
This commit is contained in:
Greg Kroah-Hartman
2023-10-27 11:35:06 +02:00
parent 40ea89fb19 d4c720a19e
commit 800dce4277
40 changed files with 1916 additions and 337 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Documentation/devicetree/bindings/interconnect/qcom,msm8939.yaml
+74
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@@ -0,0 +1,74 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,msm8939.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm MSM8939 Network-On-Chip interconnect
maintainers:
- Konrad Dybcio <konradybcio@kernel.org>
description: |
The Qualcomm MSM8939 interconnect providers support adjusting the
bandwidth requirements between the various NoC fabrics.
allOf:
- $ref: qcom,rpm-common.yaml#
properties:
compatible:
enum:
- qcom,msm8939-bimc
- qcom,msm8939-pcnoc
- qcom,msm8939-snoc
reg:
maxItems: 1
patternProperties:
'^interconnect-[a-z0-9\-]+$':
type: object
$ref: qcom,rpm-common.yaml#
description:
The interconnect providers do not have a separate QoS register space,
but share parent's space.
allOf:
- $ref: qcom,rpm-common.yaml#
properties:
compatible:
const: qcom,msm8939-snoc-mm
required:
- compatible
unevaluatedProperties: false
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,rpmcc.h>
snoc: interconnect@580000 {
compatible = "qcom,msm8939-snoc";
reg = <0x00580000 0x14000>;
#interconnect-cells = <1>;
};
bimc: interconnect@400000 {
compatible = "qcom,msm8939-bimc";
reg = <0x00400000 0x62000>;
#interconnect-cells = <1>;
snoc_mm: interconnect-snoc {
compatible = "qcom,msm8939-snoc-mm";
#interconnect-cells = <1>;
};
};
Documentation/devicetree/bindings/interconnect/qcom,msm8996.yaml
+126
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@@ -0,0 +1,126 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,msm8996.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm MSM8996 Network-On-Chip interconnect
maintainers:
- Konrad Dybcio <konradybcio@kernel.org>
description: |
The Qualcomm MSM8996 interconnect providers support adjusting the
bandwidth requirements between the various NoC fabrics.
properties:
compatible:
enum:
- qcom,msm8996-a0noc
- qcom,msm8996-a1noc
- qcom,msm8996-a2noc
- qcom,msm8996-bimc
- qcom,msm8996-cnoc
- qcom,msm8996-mnoc
- qcom,msm8996-pnoc
- qcom,msm8996-snoc
reg:
maxItems: 1
clock-names:
minItems: 1
maxItems: 3
clocks:
minItems: 1
maxItems: 3
power-domains:
maxItems: 1
required:
- compatible
- reg
unevaluatedProperties: false
allOf:
- $ref: qcom,rpm-common.yaml#
- if:
properties:
compatible:
const: qcom,msm8996-a0noc
then:
properties:
clocks:
items:
- description: Aggregate0 System NoC AXI Clock.
- description: Aggregate0 Config NoC AHB Clock.
- description: Aggregate0 NoC MPU Clock.
clock-names:
items:
- const: aggre0_snoc_axi
- const: aggre0_cnoc_ahb
- const: aggre0_noc_mpu_cfg
required:
- power-domains
- if:
properties:
compatible:
const: qcom,msm8996-mnoc
then:
properties:
clocks:
items:
- description: CPU-NoC High-performance Bus Clock.
clock-names:
const: iface
- if:
properties:
compatible:
const: qcom,msm8996-a2noc
then:
properties:
clocks:
items:
- description: Aggregate2 NoC UFS AXI Clock
- description: UFS AXI Clock
clock-names:
items:
- const: aggre2_ufs_axi
- const: ufs_axi
examples:
- |
#include <dt-bindings/clock/qcom,gcc-msm8996.h>
#include <dt-bindings/clock/qcom,mmcc-msm8996.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
bimc: interconnect@408000 {
compatible = "qcom,msm8996-bimc";
reg = <0x00408000 0x5a000>;
#interconnect-cells = <1>;
};
a0noc: interconnect@543000 {
compatible = "qcom,msm8996-a0noc";
reg = <0x00543000 0x6000>;
#interconnect-cells = <1>;
clocks = <&gcc GCC_AGGRE0_SNOC_AXI_CLK>,
<&gcc GCC_AGGRE0_CNOC_AHB_CLK>,
<&gcc GCC_AGGRE0_NOC_MPU_CFG_AHB_CLK>;
clock-names = "aggre0_snoc_axi",
"aggre0_cnoc_ahb",
"aggre0_noc_mpu_cfg";
power-domains = <&gcc AGGRE0_NOC_GDSC>;
};
Documentation/devicetree/bindings/interconnect/qcom,qcm2290.yaml
+8 -52
View File
@@ -13,6 +13,9 @@ description: |
The Qualcomm QCM2290 interconnect providers support adjusting the
bandwidth requirements between the various NoC fabrics.
allOf:
- $ref: qcom,rpm-common.yaml#
properties:
reg:
maxItems: 1
@@ -23,19 +26,6 @@ properties:
- qcom,qcm2290-cnoc
- qcom,qcm2290-snoc
'#interconnect-cells':
const: 1
clock-names:
items:
- const: bus
- const: bus_a
clocks:
items:
- description: Bus Clock
- description: Bus A Clock
# Child node's properties
patternProperties:
'^interconnect-[a-z0-9]+$':
@@ -44,6 +34,9 @@ patternProperties:
The interconnect providers do not have a separate QoS register space,
but share parent's space.
allOf:
- $ref: qcom,rpm-common.yaml#
properties:
compatible:
enum:
@@ -51,35 +44,16 @@ patternProperties:
- qcom,qcm2290-mmrt-virt
- qcom,qcm2290-mmnrt-virt
'#interconnect-cells':
const: 1
clock-names:
items:
- const: bus
- const: bus_a
clocks:
items:
- description: Bus Clock
- description: Bus A Clock
required:
- compatible
- '#interconnect-cells'
- clock-names
- clocks
additionalProperties: false
unevaluatedProperties: false
required:
- compatible
- reg
- '#interconnect-cells'
- clock-names
- clocks
additionalProperties: false
unevaluatedProperties: false
examples:
- |
@@ -89,32 +63,20 @@ examples:
compatible = "qcom,qcm2290-snoc";
reg = <0x01880000 0x60200>;
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
<&rpmcc RPM_SMD_SNOC_A_CLK>;
qup_virt: interconnect-qup {
compatible = "qcom,qcm2290-qup-virt";
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_QUP_CLK>,
<&rpmcc RPM_SMD_QUP_A_CLK>;
};
mmnrt_virt: interconnect-mmnrt {
compatible = "qcom,qcm2290-mmnrt-virt";
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_MMNRT_CLK>,
<&rpmcc RPM_SMD_MMNRT_A_CLK>;
};
mmrt_virt: interconnect-mmrt {
compatible = "qcom,qcm2290-mmrt-virt";
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_MMRT_CLK>,
<&rpmcc RPM_SMD_MMRT_A_CLK>;
};
};
@@ -122,16 +84,10 @@ examples:
compatible = "qcom,qcm2290-cnoc";
reg = <0x01900000 0x8200>;
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
<&rpmcc RPM_SMD_CNOC_A_CLK>;
};
bimc: interconnect@4480000 {
compatible = "qcom,qcm2290-bimc";
reg = <0x04480000 0x80000>;
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
<&rpmcc RPM_SMD_BIMC_A_CLK>;
};
Documentation/devicetree/bindings/interconnect/qcom,rpm-common.yaml
+28
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@@ -0,0 +1,28 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,rpm-common.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm RPMh Network-On-Chip Interconnect
maintainers:
- Konrad Dybcio <konradybcio@kernel.org>
description:
RPM interconnect providers support for managing system bandwidth requirements
through manual requests based on either predefined values or as indicated by
the bus monitor hardware. Each provider node represents a NoC bus master,
driven by a dedicated clock source.
properties:
'#interconnect-cells':
oneOf:
- const: 2
- const: 1
deprecated: true
required:
- '#interconnect-cells'
additionalProperties: true
Documentation/devicetree/bindings/interconnect/qcom,rpm.yaml
+8 -242
View File
@@ -7,13 +7,16 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm RPM Network-On-Chip Interconnect
maintainers:
- Georgi Djakov <georgi.djakov@linaro.org>
- Georgi Djakov <djakov@kernel.org>
description: |
RPM interconnect providers support system bandwidth requirements through
RPM processor. The provider is able to communicate with the RPM through
the RPM shared memory device.
allOf:
- $ref: qcom,rpm-common.yaml#
properties:
reg:
maxItems: 1
@@ -23,259 +26,22 @@ properties:
- qcom,msm8916-bimc
- qcom,msm8916-pcnoc
- qcom,msm8916-snoc
- qcom,msm8939-bimc
- qcom,msm8939-pcnoc
- qcom,msm8939-snoc
- qcom,msm8996-a0noc
- qcom,msm8996-a1noc
- qcom,msm8996-a2noc
- qcom,msm8996-bimc
- qcom,msm8996-cnoc
- qcom,msm8996-mnoc
- qcom,msm8996-pnoc
- qcom,msm8996-snoc
- qcom,qcs404-bimc
- qcom,qcs404-pcnoc
- qcom,qcs404-snoc
- qcom,sdm660-a2noc
- qcom,sdm660-bimc
- qcom,sdm660-cnoc
- qcom,sdm660-gnoc
- qcom,sdm660-mnoc
- qcom,sdm660-snoc
'#interconnect-cells':
description: |
Value: <1> is one cell in an interconnect specifier for the
interconnect node id, <2> requires the interconnect node id and an
extra path tag.
enum: [ 1, 2 ]
clocks:
minItems: 2
maxItems: 7
clock-names:
minItems: 2
maxItems: 7
power-domains:
maxItems: 1
# Child node's properties
patternProperties:
'^interconnect-[a-z0-9]+$':
type: object
additionalProperties: false
description:
snoc-mm is a child of snoc, sharing snoc's register address space.
properties:
compatible:
enum:
- qcom,msm8939-snoc-mm
'#interconnect-cells':
const: 1
clock-names:
items:
- const: bus
- const: bus_a
clocks:
items:
- description: Bus Clock
- description: Bus A Clock
required:
- compatible
- '#interconnect-cells'
- clock-names
- clocks
required:
- compatible
- reg
- '#interconnect-cells'
- clock-names
- clocks
additionalProperties: false
allOf:
- if:
properties:
compatible:
contains:
enum:
- qcom,msm8916-bimc
- qcom,msm8916-pcnoc
- qcom,msm8916-snoc
- qcom,msm8939-bimc
- qcom,msm8939-pcnoc
- qcom,msm8939-snoc
- qcom,msm8996-a1noc
- qcom,msm8996-bimc
- qcom,msm8996-cnoc
- qcom,msm8996-pnoc
- qcom,msm8996-snoc
- qcom,qcs404-bimc
- qcom,qcs404-pcnoc
- qcom,qcs404-snoc
- qcom,sdm660-bimc
- qcom,sdm660-cnoc
- qcom,sdm660-gnoc
- qcom,sdm660-snoc
then:
properties:
clock-names:
items:
- const: bus
- const: bus_a
clocks:
items:
- description: Bus Clock
- description: Bus A Clock
- if:
properties:
compatible:
contains:
enum:
- qcom,msm8996-mnoc
- qcom,sdm660-mnoc
then:
properties:
clock-names:
items:
- const: bus
- const: bus_a
- const: iface
clocks:
items:
- description: Bus Clock.
- description: Bus A Clock.
- description: CPU-NoC High-performance Bus Clock.
- if:
properties:
compatible:
contains:
enum:
- qcom,msm8996-a0noc
then:
properties:
clock-names:
items:
- const: aggre0_snoc_axi
- const: aggre0_cnoc_ahb
- const: aggre0_noc_mpu_cfg
clocks:
items:
- description: Aggregate0 System NoC AXI Clock.
- description: Aggregate0 Config NoC AHB Clock.
- description: Aggregate0 NoC MPU Clock.
required:
- power-domains
- if:
properties:
compatible:
contains:
enum:
- qcom,msm8996-a2noc
then:
properties:
clock-names:
items:
- const: bus
- const: bus_a
- const: aggre2_ufs_axi
- const: ufs_axi
clocks:
items:
- description: Bus Clock
- description: Bus A Clock
- description: Aggregate2 NoC UFS AXI Clock
- description: UFS AXI Clock
- if:
properties:
compatible:
contains:
enum:
- qcom,sdm660-a2noc
then:
properties:
clock-names:
items:
- const: bus
- const: bus_a
- const: ipa
- const: ufs_axi
- const: aggre2_ufs_axi
- const: aggre2_usb3_axi
- const: cfg_noc_usb2_axi
clocks:
items:
- description: Bus Clock.
- description: Bus A Clock.
- description: IPA Clock.
- description: UFS AXI Clock.
- description: Aggregate2 UFS AXI Clock.
- description: Aggregate2 USB3 AXI Clock.
- description: Config NoC USB2 AXI Clock.
- if:
not:
properties:
compatible:
contains:
enum:
- qcom,msm8939-snoc
then:
patternProperties:
'^interconnect-[a-z0-9]+$': false
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,rpmcc.h>
bimc: interconnect@400000 {
compatible = "qcom,msm8916-bimc";
reg = <0x00400000 0x62000>;
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
<&rpmcc RPM_SMD_BIMC_A_CLK>;
};
pcnoc: interconnect@500000 {
compatible = "qcom,msm8916-pcnoc";
reg = <0x00500000 0x11000>;
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_PCNOC_CLK>,
<&rpmcc RPM_SMD_PCNOC_A_CLK>;
};
snoc: interconnect@580000 {
compatible = "qcom,msm8916-snoc";
reg = <0x00580000 0x14000>;
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
<&rpmcc RPM_SMD_SNOC_A_CLK>;
compatible = "qcom,msm8916-bimc";
reg = <0x00400000 0x62000>;
#interconnect-cells = <1>;
};
Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
+1
View File
@@ -113,6 +113,7 @@ allOf:
properties:
compatible:
enum:
- qcom,sdx65-mc-virt
- qcom,sm8250-qup-virt
then:
required:
Documentation/devicetree/bindings/interconnect/qcom,sdm660.yaml
+108
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@@ -0,0 +1,108 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,sdm660.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm SDM660 Network-On-Chip interconnect
maintainers:
- Konrad Dybcio <konradybcio@kernel.org>
description: |
The Qualcomm SDM660 interconnect providers support adjusting the
bandwidth requirements between the various NoC fabrics.
properties:
compatible:
enum:
- qcom,sdm660-a2noc
- qcom,sdm660-bimc
- qcom,sdm660-cnoc
- qcom,sdm660-gnoc
- qcom,sdm660-mnoc
- qcom,sdm660-snoc
reg:
maxItems: 1
clock-names:
minItems: 1
maxItems: 5
clocks:
minItems: 1
maxItems: 5
required:
- compatible
- reg
unevaluatedProperties: false
allOf:
- $ref: qcom,rpm-common.yaml#
- if:
properties:
compatible:
const: qcom,sdm660-mnoc
then:
properties:
clocks:
items:
- description: CPU-NoC High-performance Bus Clock.
clock-names:
const: iface
- if:
properties:
compatible:
const: qcom,sdm660-a2noc
then:
properties:
clocks:
items:
- description: IPA Clock.
- description: UFS AXI Clock.
- description: Aggregate2 UFS AXI Clock.
- description: Aggregate2 USB3 AXI Clock.
- description: Config NoC USB2 AXI Clock.
clock-names:
items:
- const: ipa
- const: ufs_axi
- const: aggre2_ufs_axi
- const: aggre2_usb3_axi
- const: cfg_noc_usb2_axi
examples:
- |
#include <dt-bindings/clock/qcom,gcc-sdm660.h>
#include <dt-bindings/clock/qcom,mmcc-sdm660.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
bimc: interconnect@1008000 {
compatible = "qcom,sdm660-bimc";
reg = <0x01008000 0x78000>;
#interconnect-cells = <1>;
};
a2noc: interconnect@1704000 {
compatible = "qcom,sdm660-a2noc";
reg = <0x01704000 0xc100>;
#interconnect-cells = <1>;
clocks = <&rpmcc RPM_SMD_IPA_CLK>,
<&gcc GCC_UFS_AXI_CLK>,
<&gcc GCC_AGGRE2_UFS_AXI_CLK>,
<&gcc GCC_AGGRE2_USB3_AXI_CLK>,
<&gcc GCC_CFG_NOC_USB2_AXI_CLK>;
clock-names = "ipa",
"ufs_axi",
"aggre2_ufs_axi",
"aggre2_usb3_axi",
"cfg_noc_usb2_axi";
};
Documentation/devicetree/bindings/interconnect/qcom,sdx75-rpmh.yaml
+92
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@@ -0,0 +1,92 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,sdx75-rpmh.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm RPMh Network-On-Chip Interconnect on SDX75
maintainers:
- Rohit Agarwal <quic_rohiagar@quicinc.com>
description:
RPMh interconnect providers support system bandwidth requirements through
RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
able to communicate with the BCM through the Resource State Coordinator (RSC)
associated with each execution environment. Provider nodes must point to at
least one RPMh device child node pertaining to their RSC and each provider
can map to multiple RPMh resources.
properties:
compatible:
enum:
- qcom,sdx75-clk-virt
- qcom,sdx75-dc-noc
- qcom,sdx75-gem-noc
- qcom,sdx75-mc-virt
- qcom,sdx75-pcie-anoc
- qcom,sdx75-system-noc
'#interconnect-cells': true
reg:
maxItems: 1
clocks:
maxItems: 1
required:
- compatible
allOf:
- $ref: qcom,rpmh-common.yaml#
- if:
properties:
compatible:
contains:
enum:
- qcom,sdx75-clk-virt
- qcom,sdx75-mc-virt
then:
properties:
reg: false
else:
required:
- reg
- if:
properties:
compatible:
contains:
enum:
- qcom,sdx75-clk-virt
then:
properties:
clocks:
items:
- description: RPMH CC QPIC Clock
required:
- clocks
else:
properties:
clocks: false
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,rpmh.h>
clk_virt: interconnect-0 {
compatible = "qcom,sdx75-clk-virt";
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
clocks = <&rpmhcc RPMH_QPIC_CLK>;
};
system_noc: interconnect@1640000 {
compatible = "qcom,sdx75-system-noc";
reg = <0x1640000 0x4b400>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
drivers/interconnect/imx/imx.h
+7 -2
View File
@@ -10,8 +10,13 @@
#ifndef __DRIVERS_INTERCONNECT_IMX_H
#define __DRIVERS_INTERCONNECT_IMX_H
#include <linux/args.h>
#include <linux/bits.h>
#include <linux/types.h>
#include <linux/interconnect-provider.h>
#include <linux/kernel.h>
struct platform_device;
#define IMX_ICC_MAX_LINKS 4
@@ -89,7 +94,7 @@ struct imx_icc_noc_setting {
.id = _id, \
.name = _name, \
.adj = _adj, \
.num_links = ARRAY_SIZE(((int[]){ __VA_ARGS__ })), \
.num_links = COUNT_ARGS(__VA_ARGS__), \
.links = { __VA_ARGS__ }, \
}
drivers/interconnect/qcom/Kconfig
+9
View File
@@ -182,6 +182,15 @@ config INTERCONNECT_QCOM_SDX65
This is a driver for the Qualcomm Network-on-Chip on sdx65-based
platforms.
config INTERCONNECT_QCOM_SDX75
tristate "Qualcomm SDX75 interconnect driver"
depends on INTERCONNECT_QCOM_RPMH_POSSIBLE
select INTERCONNECT_QCOM_RPMH
select INTERCONNECT_QCOM_BCM_VOTER
help
This is a driver for the Qualcomm Network-on-Chip on sdx75-based
platforms.
config INTERCONNECT_QCOM_SM6350
tristate "Qualcomm SM6350 interconnect driver"
depends on INTERCONNECT_QCOM_RPMH_POSSIBLE
drivers/interconnect/qcom/Makefile
+2
View File
@@ -23,6 +23,7 @@ qnoc-sdm670-objs := sdm670.o
qnoc-sdm845-objs := sdm845.o
qnoc-sdx55-objs := sdx55.o
qnoc-sdx65-objs := sdx65.o
qnoc-sdx75-objs := sdx75.o
qnoc-sm6350-objs := sm6350.o
qnoc-sm8150-objs := sm8150.o
qnoc-sm8250-objs := sm8250.o
@@ -51,6 +52,7 @@ obj-$(CONFIG_INTERCONNECT_QCOM_SDM670) += qnoc-sdm670.o
obj-$(CONFIG_INTERCONNECT_QCOM_SDM845) += qnoc-sdm845.o
obj-$(CONFIG_INTERCONNECT_QCOM_SDX55) += qnoc-sdx55.o
obj-$(CONFIG_INTERCONNECT_QCOM_SDX65) += qnoc-sdx65.o
obj-$(CONFIG_INTERCONNECT_QCOM_SDX75) += qnoc-sdx75.o
obj-$(CONFIG_INTERCONNECT_QCOM_SM6350) += qnoc-sm6350.o
obj-$(CONFIG_INTERCONNECT_QCOM_SM8150) += qnoc-sm8150.o
obj-$(CONFIG_INTERCONNECT_QCOM_SM8250) += qnoc-sm8250.o
drivers/interconnect/qcom/icc-rpm-clocks.c
+6
View File
@@ -25,6 +25,12 @@ const struct rpm_clk_resource bimc_clk = {
};
EXPORT_SYMBOL_GPL(bimc_clk);
const struct rpm_clk_resource mem_1_clk = {
.resource_type = QCOM_SMD_RPM_MEM_CLK,
.clock_id = 1,
};
EXPORT_SYMBOL_GPL(mem_1_clk);
const struct rpm_clk_resource bus_0_clk = {
.resource_type = QCOM_SMD_RPM_BUS_CLK,
.clock_id = 0,
drivers/interconnect/qcom/icc-rpm.c
+74 -16
View File
@@ -291,6 +291,32 @@ static int qcom_icc_bw_aggregate(struct icc_node *node, u32 tag, u32 avg_bw,
return 0;
}
static u64 qcom_icc_calc_rate(struct qcom_icc_provider *qp, struct qcom_icc_node *qn, int ctx)
{
u64 agg_avg_rate, agg_peak_rate, agg_rate;
if (qn->channels)
agg_avg_rate = div_u64(qn->sum_avg[ctx], qn->channels);
else
agg_avg_rate = qn->sum_avg[ctx];
if (qn->ab_coeff) {
agg_avg_rate = agg_avg_rate * qn->ab_coeff;
agg_avg_rate = div_u64(agg_avg_rate, 100);
}
if (qn->ib_coeff) {
agg_peak_rate = qn->max_peak[ctx] * 100;
agg_peak_rate = div_u64(qn->max_peak[ctx], qn->ib_coeff);
} else {
agg_peak_rate = qn->max_peak[ctx];
}
agg_rate = max_t(u64, agg_avg_rate, agg_peak_rate);
return div_u64(agg_rate, qn->buswidth);
}
/**
* qcom_icc_bus_aggregate - calculate bus clock rates by traversing all nodes
* @provider: generic interconnect provider
@@ -298,10 +324,10 @@ static int qcom_icc_bw_aggregate(struct icc_node *node, u32 tag, u32 avg_bw,
*/
static void qcom_icc_bus_aggregate(struct icc_provider *provider, u64 *agg_clk_rate)
{
u64 agg_avg_rate, agg_rate;
struct qcom_icc_provider *qp = to_qcom_provider(provider);
struct qcom_icc_node *qn;
struct icc_node *node;
int i;
int ctx;
/*
* Iterate nodes on the provider, aggregate bandwidth requests for
@@ -309,16 +335,9 @@ static void qcom_icc_bus_aggregate(struct icc_provider *provider, u64 *agg_clk_r
*/
list_for_each_entry(node, &provider->nodes, node_list) {
qn = node->data;
for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) {
if (qn->channels)
agg_avg_rate = div_u64(qn->sum_avg[i], qn->channels);
else
agg_avg_rate = qn->sum_avg[i];
agg_rate = max_t(u64, agg_avg_rate, qn->max_peak[i]);
do_div(agg_rate, qn->buswidth);
agg_clk_rate[i] = max_t(u64, agg_clk_rate[i], agg_rate);
for (ctx = 0; ctx < QCOM_SMD_RPM_STATE_NUM; ctx++) {
agg_clk_rate[ctx] = max_t(u64, agg_clk_rate[ctx],
qcom_icc_calc_rate(qp, qn, ctx));
}
}
}
@@ -395,6 +414,33 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst)
qp->bus_clk_rate[QCOM_SMD_RPM_SLEEP_STATE] = sleep_rate;
}
/* Handle the node-specific clock */
if (!src_qn->bus_clk_desc)
return 0;
active_rate = qcom_icc_calc_rate(qp, src_qn, QCOM_SMD_RPM_ACTIVE_STATE);
sleep_rate = qcom_icc_calc_rate(qp, src_qn, QCOM_SMD_RPM_SLEEP_STATE);
if (active_rate != src_qn->bus_clk_rate[QCOM_SMD_RPM_ACTIVE_STATE]) {
ret = qcom_icc_rpm_set_bus_rate(src_qn->bus_clk_desc, QCOM_SMD_RPM_ACTIVE_STATE,
active_rate);
if (ret)
return ret;
/* Cache the rate after we've successfully committed it to RPM */
src_qn->bus_clk_rate[QCOM_SMD_RPM_ACTIVE_STATE] = active_rate;
}
if (sleep_rate != src_qn->bus_clk_rate[QCOM_SMD_RPM_SLEEP_STATE]) {
ret = qcom_icc_rpm_set_bus_rate(src_qn->bus_clk_desc, QCOM_SMD_RPM_SLEEP_STATE,
sleep_rate);
if (ret)
return ret;
/* Cache the rate after we've successfully committed it to RPM */
src_qn->bus_clk_rate[QCOM_SMD_RPM_SLEEP_STATE] = sleep_rate;
}
return 0;
}
@@ -497,7 +543,7 @@ regmap_done:
ret = devm_clk_bulk_get(dev, qp->num_intf_clks, qp->intf_clks);
if (ret)
return ret;
goto err_disable_unprepare_clk;
provider = &qp->provider;
provider->dev = dev;
@@ -512,13 +558,21 @@ regmap_done:
/* If this fails, bus accesses will crash the platform! */
ret = clk_bulk_prepare_enable(qp->num_intf_clks, qp->intf_clks);
if (ret)
return ret;
goto err_disable_unprepare_clk;
for (i = 0; i < num_nodes; i++) {
size_t j;
if (!qnodes[i]->ab_coeff)
qnodes[i]->ab_coeff = qp->ab_coeff;
if (!qnodes[i]->ib_coeff)
qnodes[i]->ib_coeff = qp->ib_coeff;
node = icc_node_create(qnodes[i]->id);
if (IS_ERR(node)) {
clk_bulk_disable_unprepare(qp->num_intf_clks,
qp->intf_clks);
ret = PTR_ERR(node);
goto err_remove_nodes;
}
@@ -534,8 +588,11 @@ regmap_done:
if (qnodes[i]->qos.ap_owned &&
qnodes[i]->qos.qos_mode != NOC_QOS_MODE_INVALID) {
ret = qcom_icc_qos_set(node);
if (ret)
return ret;
if (ret) {
clk_bulk_disable_unprepare(qp->num_intf_clks,
qp->intf_clks);
goto err_remove_nodes;
}
}
data->nodes[i] = node;
@@ -563,6 +620,7 @@ err_deregister_provider:
icc_provider_deregister(provider);
err_remove_nodes:
icc_nodes_remove(provider);
err_disable_unprepare_clk:
clk_disable_unprepare(qp->bus_clk);
return ret;
drivers/interconnect/qcom/icc-rpm.h
+15
View File
@@ -44,6 +44,8 @@ struct rpm_clk_resource {
* @type: the ICC provider type
* @regmap: regmap for QoS registers read/write access
* @qos_offset: offset to QoS registers
* @ab_coeff: a percentage-based coefficient for compensating the AB calculations
* @ib_coeff: an inverse-percentage-based coefficient for compensating the IB calculations
* @bus_clk_rate: bus clock rate in Hz
* @bus_clk_desc: a pointer to a rpm_clk_resource description of bus clocks
* @bus_clk: a pointer to a HLOS-owned bus clock
@@ -57,6 +59,8 @@ struct qcom_icc_provider {
enum qcom_icc_type type;
struct regmap *regmap;
unsigned int qos_offset;
u16 ab_coeff;
u16 ib_coeff;
u32 bus_clk_rate[QCOM_SMD_RPM_STATE_NUM];
const struct rpm_clk_resource *bus_clk_desc;
struct clk *bus_clk;
@@ -93,11 +97,15 @@ struct qcom_icc_qos {
* @num_links: the total number of @links
* @channels: number of channels at this node (e.g. DDR channels)
* @buswidth: width of the interconnect between a node and the bus (bytes)
* @bus_clk_desc: a pointer to a rpm_clk_resource description of bus clocks
* @sum_avg: current sum aggregate value of all avg bw requests
* @max_peak: current max aggregate value of all peak bw requests
* @mas_rpm_id: RPM id for devices that are bus masters
* @slv_rpm_id: RPM id for devices that are bus slaves
* @qos: NoC QoS setting parameters
* @ab_coeff: a percentage-based coefficient for compensating the AB calculations
* @ib_coeff: an inverse-percentage-based coefficient for compensating the IB calculations
* @bus_clk_rate: a pointer to an array containing bus clock rates in Hz
*/
struct qcom_icc_node {
unsigned char *name;
@@ -106,11 +114,15 @@ struct qcom_icc_node {
u16 num_links;
u16 channels;
u16 buswidth;
const struct rpm_clk_resource *bus_clk_desc;
u64 sum_avg[QCOM_SMD_RPM_STATE_NUM];
u64 max_peak[QCOM_SMD_RPM_STATE_NUM];
int mas_rpm_id;
int slv_rpm_id;
struct qcom_icc_qos qos;
u16 ab_coeff;
u16 ib_coeff;
u32 bus_clk_rate[QCOM_SMD_RPM_STATE_NUM];
};
struct qcom_icc_desc {
@@ -123,6 +135,8 @@ struct qcom_icc_desc {
enum qcom_icc_type type;
const struct regmap_config *regmap_cfg;
unsigned int qos_offset;
u16 ab_coeff;
u16 ib_coeff;
};
/* Valid for all bus types */
@@ -138,6 +152,7 @@ extern const struct rpm_clk_resource bimc_clk;
extern const struct rpm_clk_resource bus_0_clk;
extern const struct rpm_clk_resource bus_1_clk;
extern const struct rpm_clk_resource bus_2_clk;
extern const struct rpm_clk_resource mem_1_clk;
extern const struct rpm_clk_resource mmaxi_0_clk;
extern const struct rpm_clk_resource mmaxi_1_clk;
extern const struct rpm_clk_resource qup_clk;
drivers/interconnect/qcom/icc-rpmh.c
+1 -3
View File
@@ -253,14 +253,12 @@ err_remove_nodes:
}
EXPORT_SYMBOL_GPL(qcom_icc_rpmh_probe);
int qcom_icc_rpmh_remove(struct platform_device *pdev)
void qcom_icc_rpmh_remove(struct platform_device *pdev)
{
struct qcom_icc_provider *qp = platform_get_drvdata(pdev);
icc_provider_deregister(&qp->provider);
icc_nodes_remove(&qp->provider);
return 0;
}
EXPORT_SYMBOL_GPL(qcom_icc_rpmh_remove);
drivers/interconnect/qcom/icc-rpmh.h
+1 -1
View File
@@ -126,6 +126,6 @@ int qcom_icc_set(struct icc_node *src, struct icc_node *dst);
int qcom_icc_bcm_init(struct qcom_icc_bcm *bcm, struct device *dev);
void qcom_icc_pre_aggregate(struct icc_node *node);
int qcom_icc_rpmh_probe(struct platform_device *pdev);
int qcom_icc_rpmh_remove(struct platform_device *pdev);
void qcom_icc_rpmh_remove(struct platform_device *pdev);
#endif
drivers/interconnect/qcom/msm8974.c
+3 -1
View File
@@ -28,6 +28,8 @@
*/
#include <dt-bindings/interconnect/qcom,msm8974.h>
#include <linux/args.h>
#include <linux/clk.h>
#include <linux/device.h>
#include <linux/interconnect-provider.h>
@@ -231,7 +233,7 @@ struct msm8974_icc_desc {
.buswidth = _buswidth, \
.mas_rpm_id = _mas_rpm_id, \
.slv_rpm_id = _slv_rpm_id, \
.num_links = ARRAY_SIZE(((int[]){ __VA_ARGS__ })), \
.num_links = COUNT_ARGS(__VA_ARGS__), \
.links = { __VA_ARGS__ }, \
}
drivers/interconnect/qcom/msm8996.c
+6 -2
View File
@@ -448,6 +448,7 @@ static struct qcom_icc_node mas_mdp_p0 = {
.name = "mas_mdp_p0",
.id = MSM8996_MASTER_MDP_PORT0,
.buswidth = 32,
.ib_coeff = 25,
.mas_rpm_id = 8,
.slv_rpm_id = -1,
.qos.ap_owned = true,
@@ -463,6 +464,7 @@ static struct qcom_icc_node mas_mdp_p1 = {
.name = "mas_mdp_p1",
.id = MSM8996_MASTER_MDP_PORT1,
.buswidth = 32,
.ib_coeff = 25,
.mas_rpm_id = 61,
.slv_rpm_id = -1,
.qos.ap_owned = true,
@@ -1889,7 +1891,8 @@ static const struct qcom_icc_desc msm8996_bimc = {
.nodes = bimc_nodes,
.num_nodes = ARRAY_SIZE(bimc_nodes),
.bus_clk_desc = &bimc_clk,
.regmap_cfg = &msm8996_bimc_regmap_config
.regmap_cfg = &msm8996_bimc_regmap_config,
.ab_coeff = 154,
};
static struct qcom_icc_node * const cnoc_nodes[] = {
@@ -2004,7 +2007,8 @@ static const struct qcom_icc_desc msm8996_mnoc = {
.bus_clk_desc = &mmaxi_0_clk,
.intf_clocks = mm_intf_clocks,
.num_intf_clocks = ARRAY_SIZE(mm_intf_clocks),
.regmap_cfg = &msm8996_mnoc_regmap_config
.regmap_cfg = &msm8996_mnoc_regmap_config,
.ab_coeff = 154,
};
static struct qcom_icc_node * const pnoc_nodes[] = {
drivers/interconnect/qcom/osm-l3.c
+2 -1
View File
@@ -3,6 +3,7 @@
* Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
*/
#include <linux/args.h>
#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/interconnect-provider.h>
@@ -78,7 +79,7 @@ enum {
.name = #_name, \
.id = _id, \
.buswidth = _buswidth, \
.num_links = ARRAY_SIZE(((int[]){ __VA_ARGS__ })), \
.num_links = COUNT_ARGS(__VA_ARGS__), \
.links = { __VA_ARGS__ }, \
}
drivers/interconnect/qcom/qcm2290.c
+8 -1
View File
@@ -112,6 +112,9 @@ static struct qcom_icc_node mas_appss_proc = {
.qos.qos_mode = NOC_QOS_MODE_FIXED,
.qos.prio_level = 0,
.qos.areq_prio = 0,
.bus_clk_desc = &mem_1_clk,
.ab_coeff = 159,
.ib_coeff = 96,
.mas_rpm_id = 0,
.slv_rpm_id = -1,
.num_links = ARRAY_SIZE(mas_appss_proc_links),
@@ -675,7 +678,8 @@ static struct qcom_icc_node mas_gfx3d = {
static struct qcom_icc_node slv_ebi1 = {
.name = "slv_ebi1",
.id = QCM2290_SLAVE_EBI1,
.buswidth = 8,
.buswidth = 4,
.channels = 2,
.mas_rpm_id = -1,
.slv_rpm_id = 0,
};
@@ -1199,6 +1203,7 @@ static const struct qcom_icc_desc qcm2290_bimc = {
.keep_alive = true,
/* M_REG_BASE() in vendor msm_bus_bimc_adhoc driver */
.qos_offset = 0x8000,
.ab_coeff = 153,
};
static struct qcom_icc_node * const qcm2290_cnoc_nodes[] = {
@@ -1329,6 +1334,7 @@ static const struct qcom_icc_desc qcm2290_mmnrt_virt = {
.regmap_cfg = &qcm2290_snoc_regmap_config,
.keep_alive = true,
.qos_offset = 0x15000,
.ab_coeff = 142,
};
static struct qcom_icc_node * const qcm2290_mmrt_virt_nodes[] = {
@@ -1345,6 +1351,7 @@ static const struct qcom_icc_desc qcm2290_mmrt_virt = {
.regmap_cfg = &qcm2290_snoc_regmap_config,
.keep_alive = true,
.qos_offset = 0x15000,
.ab_coeff = 139,
};
static const struct of_device_id qcm2290_noc_of_match[] = {
drivers/interconnect/qcom/qdu1000.c
+2 -1
View File
@@ -769,6 +769,7 @@ static struct qcom_icc_node xs_sys_tcu_cfg = {
static struct qcom_icc_bcm bcm_acv = {
.name = "ACV",
.enable_mask = BIT(3),
.num_nodes = 1,
.nodes = { &ebi },
};
@@ -1045,7 +1046,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qnoc_probe,
.remove = qcom_icc_rpmh_remove,
.remove_new = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-qdu1000",
.of_match_table = qnoc_of_match,
drivers/interconnect/qcom/sa8775p.c
+1 -1
View File
@@ -2519,7 +2519,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove = qcom_icc_rpmh_remove,
.remove_new = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sa8775p",
.of_match_table = qnoc_of_match,
drivers/interconnect/qcom/sc7180.c
+2 -1
View File
@@ -1238,6 +1238,7 @@ static struct qcom_icc_node xs_sys_tcu_cfg = {
static struct qcom_icc_bcm bcm_acv = {
.name = "ACV",
.enable_mask = BIT(3),
.keepalive = false,
.num_nodes = 1,
.nodes = { &ebi },
@@ -1806,7 +1807,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove = qcom_icc_rpmh_remove,
.remove_new = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sc7180",
.of_match_table = qnoc_of_match,
drivers/interconnect/qcom/sc7280.c
+2 -1
View File
@@ -1285,6 +1285,7 @@ static struct qcom_icc_node srvc_snoc = {
static struct qcom_icc_bcm bcm_acv = {
.name = "ACV",
.enable_mask = BIT(3),
.num_nodes = 1,
.nodes = { &ebi },
};
@@ -1834,7 +1835,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove = qcom_icc_rpmh_remove,
.remove_new = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sc7280",
.of_match_table = qnoc_of_match,
drivers/interconnect/qcom/sc8180x.c
+2 -1
View File
@@ -1345,6 +1345,7 @@ static struct qcom_icc_node slv_qup_core_2 = {
static struct qcom_icc_bcm bcm_acv = {
.name = "ACV",
.enable_mask = BIT(3),
.num_nodes = 1,
.nodes = { &slv_ebi }
};
@@ -1887,7 +1888,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove = qcom_icc_rpmh_remove,
.remove_new = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sc8180x",
.of_match_table = qnoc_of_match,
drivers/interconnect/qcom/sc8280xp.c
+2 -1
View File
@@ -1712,6 +1712,7 @@ static struct qcom_icc_node srvc_snoc = {
static struct qcom_icc_bcm bcm_acv = {
.name = "ACV",
.enable_mask = BIT(3),
.num_nodes = 1,
.nodes = { &ebi },
};
@@ -2390,7 +2391,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove = qcom_icc_rpmh_remove,
.remove_new = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sc8280xp",
.of_match_table = qnoc_of_match,
drivers/interconnect/qcom/sdm660.c
+4
View File
@@ -602,6 +602,7 @@ static struct qcom_icc_node mas_mdp_p0 = {
.name = "mas_mdp_p0",
.id = SDM660_MASTER_MDP_P0,
.buswidth = 16,
.ib_coeff = 50,
.mas_rpm_id = 8,
.slv_rpm_id = -1,
.qos.ap_owned = true,
@@ -621,6 +622,7 @@ static struct qcom_icc_node mas_mdp_p1 = {
.name = "mas_mdp_p1",
.id = SDM660_MASTER_MDP_P1,
.buswidth = 16,
.ib_coeff = 50,
.mas_rpm_id = 61,
.slv_rpm_id = -1,
.qos.ap_owned = true,
@@ -1540,6 +1542,7 @@ static const struct qcom_icc_desc sdm660_bimc = {
.num_nodes = ARRAY_SIZE(sdm660_bimc_nodes),
.bus_clk_desc = &bimc_clk,
.regmap_cfg = &sdm660_bimc_regmap_config,
.ab_coeff = 153,
};
static struct qcom_icc_node * const sdm660_cnoc_nodes[] = {
@@ -1659,6 +1662,7 @@ static const struct qcom_icc_desc sdm660_mnoc = {
.intf_clocks = mm_intf_clocks,
.num_intf_clocks = ARRAY_SIZE(mm_intf_clocks),
.regmap_cfg = &sdm660_mnoc_regmap_config,
.ab_coeff = 153,
};
static struct qcom_icc_node * const sdm660_snoc_nodes[] = {
drivers/interconnect/qcom/sdm670.c
+2 -1
View File
@@ -1047,6 +1047,7 @@ static struct qcom_icc_node xs_sys_tcu_cfg = {
static struct qcom_icc_bcm bcm_acv = {
.name = "ACV",
.enable_mask = BIT(3),
.keepalive = false,
.num_nodes = 1,
.nodes = { &ebi },
@@ -1532,7 +1533,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove = qcom_icc_rpmh_remove,
.remove_new = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sdm670",
.of_match_table = qnoc_of_match,
drivers/interconnect/qcom/sdm845.c
+2 -1
View File
@@ -1265,6 +1265,7 @@ static struct qcom_icc_node xs_sys_tcu_cfg = {
static struct qcom_icc_bcm bcm_acv = {
.name = "ACV",
.enable_mask = BIT(3),
.keepalive = false,
.num_nodes = 1,
.nodes = { &ebi },
@@ -1801,7 +1802,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove = qcom_icc_rpmh_remove,
.remove_new = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sdm845",
.of_match_table = qnoc_of_match,
drivers/interconnect/qcom/sdx55.c
+1 -1
View File
@@ -913,7 +913,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove = qcom_icc_rpmh_remove,
.remove_new = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sdx55",
.of_match_table = qnoc_of_match,
drivers/interconnect/qcom/sdx65.c
+1 -1
View File
@@ -897,7 +897,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove = qcom_icc_rpmh_remove,
.remove_new = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sdx65",
.of_match_table = qnoc_of_match,
drivers/interconnect/qcom/sdx75.c
+1107
View File
File diff suppressed because it is too large Load Diff
drivers/interconnect/qcom/sdx75.h
+97
View File
@@ -0,0 +1,97 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __DRIVERS_INTERCONNECT_QCOM_SDX75_H
#define __DRIVERS_INTERCONNECT_QCOM_SDX75_H
#define SDX75_MASTER_ANOC_PCIE_GEM_NOC 0
#define SDX75_MASTER_ANOC_SNOC 1
#define SDX75_MASTER_APPSS_PROC 2
#define SDX75_MASTER_AUDIO 3
#define SDX75_MASTER_CNOC_DC_NOC 4
#define SDX75_MASTER_CRYPTO 5
#define SDX75_MASTER_EMAC_0 6
#define SDX75_MASTER_EMAC_1 7
#define SDX75_MASTER_GEM_NOC_CFG 8
#define SDX75_MASTER_GEM_NOC_CNOC 9
#define SDX75_MASTER_GEM_NOC_PCIE_SNOC 10
#define SDX75_MASTER_GIC 11
#define SDX75_MASTER_GIC_AHB 12
#define SDX75_MASTER_IPA 13
#define SDX75_MASTER_IPA_PCIE 14
#define SDX75_MASTER_LLCC 15
#define SDX75_MASTER_MSS_PROC 16
#define SDX75_MASTER_MVMSS 17
#define SDX75_MASTER_PCIE_0 18
#define SDX75_MASTER_PCIE_1 19
#define SDX75_MASTER_PCIE_2 20
#define SDX75_MASTER_PCIE_ANOC_CFG 21
#define SDX75_MASTER_PCIE_RSCC 22
#define SDX75_MASTER_QDSS_BAM 23
#define SDX75_MASTER_QDSS_ETR 24
#define SDX75_MASTER_QDSS_ETR_1 25
#define SDX75_MASTER_QPIC 26
#define SDX75_MASTER_QPIC_CORE 27
#define SDX75_MASTER_QUP_0 28
#define SDX75_MASTER_QUP_CORE_0 29
#define SDX75_MASTER_SDCC_1 30
#define SDX75_MASTER_SDCC_4 31
#define SDX75_MASTER_SNOC_CFG 32
#define SDX75_MASTER_SNOC_SF_MEM_NOC 33
#define SDX75_MASTER_SYS_TCU 34
#define SDX75_MASTER_USB3_0 35
#define SDX75_SLAVE_A1NOC_CFG 36
#define SDX75_SLAVE_ANOC_PCIE_GEM_NOC 37
#define SDX75_SLAVE_AUDIO 38
#define SDX75_SLAVE_CLK_CTL 39
#define SDX75_SLAVE_CRYPTO_0_CFG 40
#define SDX75_SLAVE_CNOC_MSS 41
#define SDX75_SLAVE_DDRSS_CFG 42
#define SDX75_SLAVE_EBI1 43
#define SDX75_SLAVE_ETH0_CFG 44
#define SDX75_SLAVE_ETH1_CFG 45
#define SDX75_SLAVE_GEM_NOC_CFG 46
#define SDX75_SLAVE_GEM_NOC_CNOC 47
#define SDX75_SLAVE_ICBDI_MVMSS_CFG 48
#define SDX75_SLAVE_IMEM 49
#define SDX75_SLAVE_IMEM_CFG 50
#define SDX75_SLAVE_IPA_CFG 51
#define SDX75_SLAVE_IPC_ROUTER_CFG 52
#define SDX75_SLAVE_LAGG_CFG 53
#define SDX75_SLAVE_LLCC 54
#define SDX75_SLAVE_MCCC_MASTER 55
#define SDX75_SLAVE_MEM_NOC_PCIE_SNOC 56
#define SDX75_SLAVE_PCIE_0 57
#define SDX75_SLAVE_PCIE_1 58
#define SDX75_SLAVE_PCIE_2 59
#define SDX75_SLAVE_PCIE_0_CFG 60
#define SDX75_SLAVE_PCIE_1_CFG 61
#define SDX75_SLAVE_PCIE_2_CFG 62
#define SDX75_SLAVE_PCIE_ANOC_CFG 63
#define SDX75_SLAVE_PCIE_RSC_CFG 64
#define SDX75_SLAVE_PDM 65
#define SDX75_SLAVE_PRNG 66
#define SDX75_SLAVE_QDSS_CFG 67
#define SDX75_SLAVE_QDSS_STM 68
#define SDX75_SLAVE_QPIC 69
#define SDX75_SLAVE_QPIC_CORE 70
#define SDX75_SLAVE_QUP_0 71
#define SDX75_SLAVE_QUP_CORE_0 72
#define SDX75_SLAVE_SDCC_1 73
#define SDX75_SLAVE_SDCC_4 74
#define SDX75_SLAVE_SERVICE_GEM_NOC 75
#define SDX75_SLAVE_SERVICE_PCIE_ANOC 76
#define SDX75_SLAVE_SERVICE_SNOC 77
#define SDX75_SLAVE_SNOC_CFG 78
#define SDX75_SLAVE_SNOC_GEM_NOC_SF 79
#define SDX75_SLAVE_SNOOP_BWMON 80
#define SDX75_SLAVE_SPMI_VGI_COEX 81
#define SDX75_SLAVE_TCSR 82
#define SDX75_SLAVE_TCU 83
#define SDX75_SLAVE_TLMM 84
#define SDX75_SLAVE_USB3 85
#define SDX75_SLAVE_USB3_PHY_CFG 86
#endif
drivers/interconnect/qcom/sm6350.c
+2 -1
View File
@@ -1164,6 +1164,7 @@ static struct qcom_icc_node xs_sys_tcu_cfg = {
static struct qcom_icc_bcm bcm_acv = {
.name = "ACV",
.enable_mask = BIT(3),
.keepalive = false,
.num_nodes = 1,
.nodes = { &ebi },
@@ -1701,7 +1702,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove = qcom_icc_rpmh_remove,
.remove_new = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sm6350",
.of_match_table = qnoc_of_match,
drivers/interconnect/qcom/sm8150.c
+2 -1
View File
@@ -1282,6 +1282,7 @@ static struct qcom_icc_node xs_sys_tcu_cfg = {
static struct qcom_icc_bcm bcm_acv = {
.name = "ACV",
.enable_mask = BIT(3),
.keepalive = false,
.num_nodes = 1,
.nodes = { &ebi },
@@ -1863,7 +1864,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove = qcom_icc_rpmh_remove,
.remove_new = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sm8150",
.of_match_table = qnoc_of_match,
drivers/interconnect/qcom/sm8250.c
+2 -1
View File
@@ -1397,6 +1397,7 @@ static struct qcom_icc_node qup2_core_slave = {
static struct qcom_icc_bcm bcm_acv = {
.name = "ACV",
.enable_mask = BIT(3),
.keepalive = false,
.num_nodes = 1,
.nodes = { &ebi },
@@ -1990,7 +1991,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove = qcom_icc_rpmh_remove,
.remove_new = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sm8250",
.of_match_table = qnoc_of_match,
drivers/interconnect/qcom/sm8350.c
+2 -1
View File
@@ -1356,6 +1356,7 @@ static struct qcom_icc_node qns_mem_noc_sf_disp = {
static struct qcom_icc_bcm bcm_acv = {
.name = "ACV",
.enable_mask = BIT(3),
.keepalive = false,
.num_nodes = 1,
.nodes = { &ebi },
@@ -1960,7 +1961,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove = qcom_icc_rpmh_remove,
.remove_new = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sm8350",
.of_match_table = qnoc_of_match,
drivers/interconnect/qcom/sm8450.c
+1 -1
View File
@@ -1884,7 +1884,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove = qcom_icc_rpmh_remove,
.remove_new = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sm8450",
.of_match_table = qnoc_of_match,
drivers/interconnect/qcom/sm8550.c
+1 -1
View File
@@ -2219,7 +2219,7 @@ MODULE_DEVICE_TABLE(of, qnoc_of_match);
static struct platform_driver qnoc_driver = {
.probe = qcom_icc_rpmh_probe,
.remove = qcom_icc_rpmh_remove,
.remove_new = qcom_icc_rpmh_remove,
.driver = {
.name = "qnoc-sm8550",
.of_match_table = qnoc_of_match,
include/dt-bindings/interconnect/qcom,sdx75.h
+102
View File
@@ -0,0 +1,102 @@
/* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */
/*
* Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SDX75_H
#define __DT_BINDINGS_INTERCONNECT_QCOM_SDX75_H
#define MASTER_QPIC_CORE 0
#define MASTER_QUP_CORE_0 1
#define SLAVE_QPIC_CORE 2
#define SLAVE_QUP_CORE_0 3
#define MASTER_LLCC 0
#define SLAVE_EBI1 1
#define MASTER_CNOC_DC_NOC 0
#define SLAVE_LAGG_CFG 1
#define SLAVE_MCCC_MASTER 2
#define SLAVE_GEM_NOC_CFG 3
#define SLAVE_SNOOP_BWMON 4
#define MASTER_SYS_TCU 0
#define MASTER_APPSS_PROC 1
#define MASTER_GEM_NOC_CFG 2
#define MASTER_MSS_PROC 3
#define MASTER_ANOC_PCIE_GEM_NOC 4
#define MASTER_SNOC_SF_MEM_NOC 5
#define MASTER_GIC 6
#define MASTER_IPA_PCIE 7
#define SLAVE_GEM_NOC_CNOC 8
#define SLAVE_LLCC 9
#define SLAVE_MEM_NOC_PCIE_SNOC 10
#define SLAVE_SERVICE_GEM_NOC 11
#define MASTER_PCIE_0 0
#define MASTER_PCIE_1 1
#define MASTER_PCIE_2 2
#define SLAVE_ANOC_PCIE_GEM_NOC 3
#define MASTER_AUDIO 0
#define MASTER_GIC_AHB 1
#define MASTER_PCIE_RSCC 2
#define MASTER_QDSS_BAM 3
#define MASTER_QPIC 4
#define MASTER_QUP_0 5
#define MASTER_ANOC_SNOC 6
#define MASTER_GEM_NOC_CNOC 7
#define MASTER_GEM_NOC_PCIE_SNOC 8
#define MASTER_SNOC_CFG 9
#define MASTER_PCIE_ANOC_CFG 10
#define MASTER_CRYPTO 11
#define MASTER_IPA 12
#define MASTER_MVMSS 13
#define MASTER_EMAC_0 14
#define MASTER_EMAC_1 15
#define MASTER_QDSS_ETR 16
#define MASTER_QDSS_ETR_1 17
#define MASTER_SDCC_1 18
#define MASTER_SDCC_4 19
#define MASTER_USB3_0 20
#define SLAVE_ETH0_CFG 21
#define SLAVE_ETH1_CFG 22
#define SLAVE_AUDIO 23
#define SLAVE_CLK_CTL 24
#define SLAVE_CRYPTO_0_CFG 25
#define SLAVE_IMEM_CFG 26
#define SLAVE_IPA_CFG 27
#define SLAVE_IPC_ROUTER_CFG 28
#define SLAVE_CNOC_MSS 29
#define SLAVE_ICBDI_MVMSS_CFG 30
#define SLAVE_PCIE_0_CFG 31
#define SLAVE_PCIE_1_CFG 32
#define SLAVE_PCIE_2_CFG 33
#define SLAVE_PCIE_RSC_CFG 34
#define SLAVE_PDM 35
#define SLAVE_PRNG 36
#define SLAVE_QDSS_CFG 37
#define SLAVE_QPIC 38
#define SLAVE_QUP_0 39
#define SLAVE_SDCC_1 40
#define SLAVE_SDCC_4 41
#define SLAVE_SPMI_VGI_COEX 42
#define SLAVE_TCSR 43
#define SLAVE_TLMM 44
#define SLAVE_USB3 45
#define SLAVE_USB3_PHY_CFG 46
#define SLAVE_A1NOC_CFG 47
#define SLAVE_DDRSS_CFG 48
#define SLAVE_SNOC_GEM_NOC_SF 49
#define SLAVE_SNOC_CFG 50
#define SLAVE_PCIE_ANOC_CFG 51
#define SLAVE_IMEM 52
#define SLAVE_SERVICE_PCIE_ANOC 53
#define SLAVE_SERVICE_SNOC 54
#define SLAVE_PCIE_0 55
#define SLAVE_PCIE_1 56
#define SLAVE_PCIE_2 57
#define SLAVE_QDSS_STM 58
#define SLAVE_TCU 59
#endif