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This commit is contained in:
Thomas Makin
2025-08-04 13:39:04 -05:00
parent f945965e63
commit 7513c71045
3 changed files with 151 additions and 105 deletions
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2
arch/arm64/boot/dts/nvidia/tegra210-nx.dtsi
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@@ -56,7 +56,7 @@
status = "okay";
panel@0 {
compatible = "jdi,lpm062m326a";
compatible = "nintendo,panel-nx-dsi";
reset-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
backlight = <&backlight>;
vdd1-supply = <&v_pavdd_5v0>;

250
arch/arm64/boot/dts/nvidia/tegra210b01-nx.dtsi
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@@ -19,104 +19,10 @@
reg = <0x0 0x80000000 0x0 0xc0000000>;
};
// /* SDMMC4 for EMMC */
// sdhci@700b0600 {
// cd-gpios = <&gpio TEGRA_GPIO(Z, 1) 0>;
// cd-debounce = <128>;
// bus-width = <8>;
// uhs-mask = <0x0>; /* All modes */
// tap-delay = <11>;
// trim-delay = <13>;
// only-1-8-v;
// no-sdio;
// no-sd;
// max-clk-limit = <200000000>;
// disable-dynamic-host-clk-gating;
// adma-xfer-size = <8388608>; /* 8MiB */
// pll_source = "pll_p", "pll_c4_out2";
// clocks = <&tegra_car TEGRA210_CLK_SDMMC4>,
// <&tegra_car TEGRA210_CLK_PLL_P>,
// <&tegra_car TEGRA210_CLK_PLL_C4_OUT2>,
// <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
// clock-names = "sdmmc", "pll_p", "pll_c4_out2", "sdmmc_legacy_tm";
// status = "disabled";
// };
// /* SDMMC3 Unused */
// sdhci@700b0400 {
// status = "disabled";
// };
// /* SDMMC2 for Gamecard */
// sdhci@700b0200 {
// uhs-mask = <0x0>; /* All modes */
// tap-delay = <11>;
// trim-delay = <13>;
// nvidia,is-ddr-tap-delay;
// nvidia,ddr-tap-delay = <0>;
// mmc-ocr-mask = <0>;
// dqs-trim-delay = <17>;
// dqs-trim-delay-hs533 = <24>;
// max-clk-limit = <200000000>;
// bus-width = <8>;
// built-in;
// calib-3v3-offsets = <0x0505>;
// calib-1v8-offsets = <0x0505>;
// compad-vref-3v3 = <0x7>;
// compad-vref-1v8 = <0x7>;
// nvidia,en-io-trim-volt;
// nvidia,is-emmc;
// nvidia,enable-cq;
// ignore-pm-notify;
// keep-power-in-suspend;
// non-removable;
// cap-mmc-highspeed;
// cap-sd-highspeed;
// mmc-ddr-1_8v;
// mmc-hs200-1_8v;
// mmc-hs400-1_8v;
// nvidia,enable-strobe-mode;
// pll_source = "pll_p", "pll_c4_out2";
// clocks = <&tegra_car TEGRA210_CLK_SDMMC2>,
// <&tegra_car TEGRA210_CLK_PLL_P>,
// <&tegra_car TEGRA210_CLK_PLL_C4_OUT2>;
// clock-names = "sdmmc", "pll_p", "pll_c4_out2";
// status = "disabled";
// };
// /* SDMMC1 for uSD card */
// sdhci@700b0000 {
// uhs-mask = <0x0c>; /* Disable SDR50/DDR50 */
// tap-delay = <11>;
// trim-delay = <14>;
// power-off-rail;
// nvidia,update-pinctrl-settings;
// nvidia,sd-device;
// no-sdio;
// no-mmc;
// max-current-800ma;
// max-clk-limit = <208000000>;
// sdr50-clk-limit = <100000000>;
// sdr104-hs200-clk-limit = <200000000>;
// ddr-clk-limit = <208000000>; /* 416 MHz for host */
// ddr50-clk-limit = <48000000>; /* 86 MHz for host */
// ddr200-clk-limit = <200000000>; /* 400 MHz for host */
// disable-dynamic-host-clk-gating;
// adma-xfer-size = <8388608>; /* 8MiB */
// default-drv-type = <1>;
// pll_source = "pll_p", "pll_c4_out2", "pll_c4_out0";
// clocks = <&tegra_car TEGRA210_CLK_SDMMC1>,
// <&tegra_car TEGRA210_CLK_PLL_P>,
// <&tegra_car TEGRA210_CLK_PLL_C4_OUT2>,
// <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>,
// <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
// clock-names = "sdmmc", "pll_p", "pll_c4_out2", "pll_c4_out0", "sdmmc_legacy_tm";
// nvidia,cd-wakeup-capable;
// status = "okay";
// // nvidia,pmc-wakeup = <&tegra_pmc
// // PMC_WAKE_TYPE_EVENT 35 (PMC_TRIGGER_TYPE_RISING | PMC_TRIGGER_TYPE_FALLING)>; /* gpio_pz1_IB */
// };
pwm@7000a000 {
status = "okay";
#pwm-cells = <2>;
};
serial@70006000 {
/delete-property/ dmas;
@@ -124,6 +30,111 @@
status = "okay";
};
backlight: backlight {
status = "okay";
compatible = "pwm-backlight";
pwms = <&pwm 0 33898>;
pwm-names = "backlight";
brightness-levels = <
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
17 18 19 20 21 22 23 24 25 26 27 28 29 30
31 32 33 34 35 36 37 38 39 40 41 42 43 44
45 46 47 48 49 50 51 52 53 54 55 56 57 58
59 60 61 62 63 64 65 66 67 68 69 70 71 72
73 74 75 76 77 78 79 80 81 82 83 84 85 86
87 88 89 90 91 92 93 94 95 96 97 98 99 100
>;
default-brightness-level = <50>;
enable-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
power-supply = <&max77620_sd3>;
};
/* Fixed regulators */
battery_reg: vdd-ac-bat {
compatible = "regulator-fixed";
status = "okay";
regulator-name = "vdd-ac-bat";
regulator-min-microvolt = <4800000>;
regulator-max-microvolt = <4800000>;
regulator-always-on;
regulator-boot-on;
};
vdd_3v3: vdd-3v3 {
compatible = "regulator-fixed";
regulator-name = "vdd-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
gpio = <&pmic_b 3 0>;
enable-active-high;
regulator-enable-ramp-delay = <160>;
regulator-disable-ramp-delay = <10000>;
};
max77620_gpio7: avdd-dsi-csi-1v2 {
compatible = "regulator-fixed";
regulator-name = "max77620-gpio7";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-boot-on; /* Must be set for seamless display */
gpio = <&pmic_b 7 0>;
enable-active-high;
regulator-enable-ramp-delay = <240>;
regulator-disable-ramp-delay = <11340>;
vin-supply = <&max77620_ldo0>;
};
// lcd_bl_en: lcd-bl-en {
// compatible = "regulator-fixed";
// regulator-name = "lcd-bl-en";
// regulator-min-microvolt = <1800000>;
// regulator-max-microvolt = <1800000>;
// gpio = <&gpio TEGRA_GPIO(V, 1) 0>;
// regulator-boot-on; /* Must be set for seamless display */
// enable-active-high;
// regulator-always-on;
// regulator-state-mem {
// regulator-off-in-suspend;
// };
// };
en_vdd_sd: en-vdd-sd {
compatible = "regulator-fixed";
regulator-name = "en-vdd-sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio TEGRA_GPIO(E, 4) 0>;
enable-active-high;
regulator-enable-ramp-delay = <472>;
regulator-disable-ramp-delay = <4880>;
vin-supply = <&vdd_3v3>;
};
/* LCD Power Enable +5V. Rohm BD8316GWL. */
v_pavdd_5v0: v-pavdd-5v0 {
compatible = "regulator-fixed";
regulator-name = "v_pavdd_5v0";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio TEGRA_GPIO(I, 0) 0>;
enable-active-high;
regulator-boot-on; /* Must be set for seamless display */
regulator-enable-ramp-delay = <232>;
};
/* LCD Power Enable -5V. Rohm BD8316GWL. */
v_navdd_5v0: v-navdd-5v0 {
compatible = "regulator-fixed";
regulator-name = "v_navdd_5v0";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio TEGRA_GPIO(I, 1) 0>;
enable-active-high;
regulator-boot-on; /* Must be set for seamless display */
regulator-enable-ramp-delay = <232>;
};
soctherm@700E2000 {
throttle-cfgs {
/* PG/ACOK/USB OC pin. CLK_32K_OUT. Used for LED PWM on Vali. */
@@ -450,13 +461,44 @@
};
host1x@50000000 {
dsia: dsi@54300000 {
status = "okay";
avdd-dsi-csi-supply = <&max77620_ldo0>;
panel@0 {
reg = <0>;
status = "okay";
compatible = "nintendo,nx-dsi";
reset-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
backlight = <&backlight>;
vdd1-supply = <&v_pavdd_5v0>;
vdd2-supply = <&v_navdd_5v0>;
};
};
dc@54200000 {
pinctrl-names = "pad_ab_default", "pad_ab_idle",
"pad_cd_default", "pad_cd_idle";
pinctrl-0 = <&dsi_ab_pad_default>;
pinctrl-1 = <&dsi_ab_pad_idle>;
pinctrl-2 = <&dsi_cd_pad_default>;
pinctrl-3 = <&dsi_cd_pad_idle>;
status = "okay";
// pinctrl-names = "pad_ab_default", "pad_ab_idle",
// "pad_cd_default", "pad_cd_idle";
// pinctrl-0 = <&dsi_ab_pad_default>;
// pinctrl-1 = <&dsi_ab_pad_idle>;
// pinctrl-2 = <&dsi_cd_pad_default>;
// pinctrl-3 = <&dsi_cd_pad_idle>;
//nvidia,outputs = <&dsia>;
};
/* tegradc.1: DP */
dc@54240000 {
status = "okay";
//extcon-cables = <&bm92t 3>;
//extcon-cable-names = "typec1";
//nvidia,outputs = <&sor1>;pa
};
};

4
arch/arm64/boot/dts/nvidia/tegra210b01.dtsi
View File

@@ -8,6 +8,10 @@
/delete-node/ sor@54540000;
/delete-node/ dpaux@545c0000;
dsi@54300000 {
compatible = "nvidia,tegra210b01-dsi";
};
dc@54200000 {
nvidia,outputs = <&dsia &dsib &sor1>;
};