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Merge 77f5878967 ("Merge tag 'arm-fixes-6.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc") into android-mainline

Browse Source 
Steps on the way to 6.11

Change-Id: If8fbebbebfd889059317df052a858e4498f40a9d
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Kroah-Hartman
2024-09-13 07:25:08 +02:00
parent 8c166be2fa 77f5878967
commit 73a6d174fe
11 changed files with 83 additions and 21 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Documentation/devicetree/bindings/soc/rockchip/grf.yaml
+9 -1
View File
@@ -31,10 +31,16 @@ properties:
- rockchip,rk3588-pcie3-pipe-grf
- rockchip,rk3588-usb-grf
- rockchip,rk3588-usbdpphy-grf
- rockchip,rk3588-vo-grf
- rockchip,rk3588-vo0-grf
- rockchip,rk3588-vo1-grf
- rockchip,rk3588-vop-grf
- rockchip,rv1108-usbgrf
- const: syscon
- items:
- const: rockchip,rk3588-vo-grf
- const: syscon
deprecated: true
description: Use rockchip,rk3588-vo{0,1}-grf instead.
- items:
- enum:
- rockchip,px30-grf
@@ -262,6 +268,8 @@ allOf:
contains:
enum:
- rockchip,rk3588-vo-grf
- rockchip,rk3588-vo0-grf
- rockchip,rk3588-vo1-grf
then:
required:
arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts
+1 -1
View File
@@ -387,7 +387,7 @@
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
+33 -3
View File
@@ -154,6 +154,22 @@
};
};
&gpio3 {
/*
* The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module
* eMMC and SPI flash powered-down initially (in fact it keeps the
* reset signal asserted). BIOS_DISABLE_OVERRIDE pin allows to override
* that signal so that eMMC and SPI can be used regardless of the state
* of the signal.
*/
bios-disable-override-hog {
gpios = <RK_PD5 GPIO_ACTIVE_LOW>;
gpio-hog;
line-name = "bios_disable_override";
output-high;
};
};
&gmac {
assigned-clocks = <&cru SCLK_RMII_SRC>;
assigned-clock-parents = <&clkin_gmac>;
@@ -409,6 +425,7 @@
&i2s0 {
pinctrl-0 = <&i2s0_2ch_bus>;
pinctrl-1 = <&i2s0_2ch_bus_bclk_off>;
rockchip,playback-channels = <2>;
rockchip,capture-channels = <2>;
status = "okay";
@@ -417,8 +434,8 @@
/*
* As Q7 does not specify neither a global nor a RX clock for I2S these
* signals are not used. Furthermore I2S0_LRCK_RX is used as GPIO.
* Therefore we have to redefine the i2s0_2ch_bus definition to prevent
* conflicts.
* Therefore we have to redefine the i2s0_2ch_bus and i2s0_2ch_bus_bclk_off
* definitions to prevent conflicts.
*/
&i2s0_2ch_bus {
rockchip,pins =
@@ -428,6 +445,14 @@
<3 RK_PD7 1 &pcfg_pull_none>;
};
&i2s0_2ch_bus_bclk_off {
rockchip,pins =
<3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>,
<3 RK_PD2 1 &pcfg_pull_none>,
<3 RK_PD3 1 &pcfg_pull_none>,
<3 RK_PD7 1 &pcfg_pull_none>;
};
&io_domains {
status = "okay";
bt656-supply = <&vcc_1v8>;
@@ -449,9 +474,14 @@
&pinctrl {
pinctrl-names = "default";
pinctrl-0 = <&q7_thermal_pin>;
pinctrl-0 = <&q7_thermal_pin &bios_disable_override_hog_pin>;
gpios {
bios_disable_override_hog_pin: bios-disable-override-hog-pin {
rockchip,pins =
<3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>;
};
q7_thermal_pin: q7-thermal-pin {
rockchip,pins =
<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
arch/arm64/boot/dts/rockchip/rk356x.dtsi
+3 -4
View File
@@ -1592,10 +1592,9 @@
<&cru SRST_TSADCPHY>;
rockchip,grf = <&grf>;
rockchip,hw-tshut-temp = <95000>;
pinctrl-names = "init", "default", "sleep";
pinctrl-0 = <&tsadc_pin>;
pinctrl-1 = <&tsadc_shutorg>;
pinctrl-2 = <&tsadc_pin>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&tsadc_shutorg>;
pinctrl-1 = <&tsadc_pin>;
#thermal-sensor-cells = <1>;
status = "disabled";
};
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
+3 -3
View File
@@ -582,14 +582,14 @@
};
vo0_grf: syscon@fd5a6000 {
compatible = "rockchip,rk3588-vo-grf", "syscon";
compatible = "rockchip,rk3588-vo0-grf", "syscon";
reg = <0x0 0xfd5a6000 0x0 0x2000>;
clocks = <&cru PCLK_VO0GRF>;
};
vo1_grf: syscon@fd5a8000 {
compatible = "rockchip,rk3588-vo-grf", "syscon";
reg = <0x0 0xfd5a8000 0x0 0x100>;
compatible = "rockchip,rk3588-vo1-grf", "syscon";
reg = <0x0 0xfd5a8000 0x0 0x4000>;
clocks = <&cru PCLK_VO1GRF>;
};
arch/riscv/boot/dts/starfive/jh7110-common.dtsi
+6
View File
@@ -365,6 +365,12 @@
};
};
&syscrg {
assigned-clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>,
<&pllclk JH7110_PLLCLK_PLL0_OUT>;
assigned-clock-rates = <500000000>, <1500000000>;
};
&sysgpio {
i2c0_pins: i2c0-0 {
i2c-pins {
drivers/firmware/qcom/qcom_qseecom_uefisecapp.c
+4
View File
@@ -715,6 +715,10 @@ static int qcuefi_set_reference(struct qcuefi_client *qcuefi)
static struct qcuefi_client *qcuefi_acquire(void)
{
mutex_lock(&__qcuefi_lock);
if (!__qcuefi) {
mutex_unlock(&__qcuefi_lock);
return NULL;
}
return __qcuefi;
}
drivers/md/dm-integrity.c
+3 -1
View File
@@ -2174,6 +2174,7 @@ static void dm_integrity_map_continue(struct dm_integrity_io *dio, bool from_map
struct bio *bio = dm_bio_from_per_bio_data(dio, sizeof(struct dm_integrity_io));
unsigned int journal_section, journal_entry;
unsigned int journal_read_pos;
sector_t recalc_sector;
struct completion read_comp;
bool discard_retried = false;
bool need_sync_io = ic->internal_hash && dio->op == REQ_OP_READ;
@@ -2314,6 +2315,7 @@ offload_to_thread:
goto lock_retry;
}
}
recalc_sector = le64_to_cpu(ic->sb->recalc_sector);
spin_unlock_irq(&ic->endio_wait.lock);
if (unlikely(journal_read_pos != NOT_FOUND)) {
@@ -2368,7 +2370,7 @@ offload_to_thread:
if (need_sync_io) {
wait_for_completion_io(&read_comp);
if (ic->sb->flags & cpu_to_le32(SB_FLAG_RECALCULATING) &&
dio->range.logical_sector + dio->range.n_sectors > le64_to_cpu(ic->sb->recalc_sector))
dio->range.logical_sector + dio->range.n_sectors > recalc_sector)
goto skip_check;
if (ic->mode == 'B') {
if (!block_bitmap_op(ic, ic->recalc_bitmap, dio->range.logical_sector,
drivers/platform/cznic/Kconfig
+1 -1
View File
@@ -70,7 +70,7 @@ config TURRIS_OMNIA_MCU_TRNG
bool "Turris Omnia MCU true random number generator"
default y
depends on TURRIS_OMNIA_MCU_GPIO
depends on HW_RANDOM
depends on HW_RANDOM=y || HW_RANDOM=TURRIS_OMNIA_MCU
help
Say Y here to add support for the true random number generator
provided by CZ.NIC's Turris Omnia MCU.
drivers/staging/media/atomisp/pci/sh_css_frac.h
+19 -7
View File
@@ -32,12 +32,24 @@
#define uISP_VAL_MAX ((unsigned int)((1 << uISP_REG_BIT) - 1))
/* a:fraction bits for 16bit precision, b:fraction bits for ISP precision */
#define sDIGIT_FITTING(v, a, b) \
min_t(int, max_t(int, (((v) >> sSHIFT) >> max(sFRACTION_BITS_FITTING(a) - (b), 0)), \
sISP_VAL_MIN), sISP_VAL_MAX)
#define uDIGIT_FITTING(v, a, b) \
min((unsigned int)max((unsigned)(((v) >> uSHIFT) \
>> max((int)(uFRACTION_BITS_FITTING(a) - (b)), 0)), \
uISP_VAL_MIN), uISP_VAL_MAX)
static inline int sDIGIT_FITTING(int v, int a, int b)
{
int fit_shift = sFRACTION_BITS_FITTING(a) - b;
v >>= sSHIFT;
v >>= fit_shift > 0 ? fit_shift : 0;
return clamp_t(int, v, sISP_VAL_MIN, sISP_VAL_MAX);
}
static inline unsigned int uDIGIT_FITTING(unsigned int v, int a, int b)
{
int fit_shift = uFRACTION_BITS_FITTING(a) - b;
v >>= uSHIFT;
v >>= fit_shift > 0 ? fit_shift : 0;
return clamp_t(unsigned int, v, uISP_VAL_MIN, uISP_VAL_MAX);
}
#endif /* __SH_CSS_FRAC_H */
kernel/printk/printk.c
+1
View File
@@ -2622,6 +2622,7 @@ int match_devname_and_update_preferred_console(const char *devname,
return -ENOENT;
}
EXPORT_SYMBOL_GPL(match_devname_and_update_preferred_console);
bool console_suspend_enabled = true;
EXPORT_SYMBOL(console_suspend_enabled);