FROMGIT: KVM: arm64: Fix the value of the CPTR_EL2 RES1 bitmask for nVHE
Since the introduction of SME, bit 12 in CPTR_EL2 (nVHE) is TSM for trapping SME, instead of RES1, as per ARM ARM DDI 0487K.a, section D23.2.34. Fix the value of CPTR_NVHE_EL2_RES1 to reflect that, and adjust the code that relies on it accordingly. Bug: 357781595 Link: https://lore.kernel.org/all/20241216105057.579031-15-tabba@google.com/ (cherry picked from commit 1eccad35c9268f1ad4be3d72d37167a58c0ac2db https://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm.git/ next) Change-Id: Ib2647cace12820ebb1a6238bb11d1352b264be64 Signed-off-by: Fuad Tabba <tabba@google.com>
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@@ -299,7 +299,7 @@
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#define CPTR_EL2_TSM (1 << 12)
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#define CPTR_EL2_TFP (1 << CPTR_EL2_TFP_SHIFT)
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#define CPTR_EL2_TZ (1 << 8)
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#define CPTR_NVHE_EL2_RES1 0x000032ff /* known RES1 bits in CPTR_EL2 (nVHE) */
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#define CPTR_NVHE_EL2_RES1 (BIT(13) | BIT(9) | GENMASK(7, 0))
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#define CPTR_NVHE_EL2_RES0 (GENMASK(63, 32) | \
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GENMASK(29, 21) | \
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GENMASK(19, 14) | \
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@@ -780,8 +780,8 @@ static __always_inline void kvm_reset_cptr_el2(struct kvm_vcpu *vcpu)
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if (vcpu_has_sve(vcpu) && guest_owns_fp_regs())
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val |= CPTR_EL2_TZ;
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if (cpus_have_final_cap(ARM64_SME))
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val &= ~CPTR_EL2_TSM;
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if (!cpus_have_final_cap(ARM64_SME))
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val |= CPTR_EL2_TSM;
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}
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kvm_write_cptr_el2(val);
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