tmakin/ack-tegra
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge tag 'spi-fix-v6.8-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Browse Source 
Pull spi fix from Mark Brown:
 "One simple fix for a minor but valid issue with constants overflowing
  identified via cppcheck"

* tag 'spi-fix-v6.8-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
  spi: sh-msiof: avoid integer overflow in constants
This commit is contained in:
Linus Torvalds
2024-02-01 10:10:17 -08:00
parent 4b561d1001 6500ad28fd
commit 6a864c09ea
1 changed files with 8 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/spi/spi-sh-msiof.c
+8 -8
View File
@@ -136,14 +136,14 @@ struct sh_msiof_spi_priv {
/* SIFCTR */
#define SIFCTR_TFWM_MASK GENMASK(31, 29) /* Transmit FIFO Watermark */
#define SIFCTR_TFWM_64 (0 << 29) /* Transfer Request when 64 empty stages */
#define SIFCTR_TFWM_32 (1 << 29) /* Transfer Request when 32 empty stages */
#define SIFCTR_TFWM_24 (2 << 29) /* Transfer Request when 24 empty stages */
#define SIFCTR_TFWM_16 (3 << 29) /* Transfer Request when 16 empty stages */
#define SIFCTR_TFWM_12 (4 << 29) /* Transfer Request when 12 empty stages */
#define SIFCTR_TFWM_8 (5 << 29) /* Transfer Request when 8 empty stages */
#define SIFCTR_TFWM_4 (6 << 29) /* Transfer Request when 4 empty stages */
#define SIFCTR_TFWM_1 (7 << 29) /* Transfer Request when 1 empty stage */
#define SIFCTR_TFWM_64 (0UL << 29) /* Transfer Request when 64 empty stages */
#define SIFCTR_TFWM_32 (1UL << 29) /* Transfer Request when 32 empty stages */
#define SIFCTR_TFWM_24 (2UL << 29) /* Transfer Request when 24 empty stages */
#define SIFCTR_TFWM_16 (3UL << 29) /* Transfer Request when 16 empty stages */
#define SIFCTR_TFWM_12 (4UL << 29) /* Transfer Request when 12 empty stages */
#define SIFCTR_TFWM_8 (5UL << 29) /* Transfer Request when 8 empty stages */
#define SIFCTR_TFWM_4 (6UL << 29) /* Transfer Request when 4 empty stages */
#define SIFCTR_TFWM_1 (7UL << 29) /* Transfer Request when 1 empty stage */
#define SIFCTR_TFUA_MASK GENMASK(26, 20) /* Transmit FIFO Usable Area */
#define SIFCTR_TFUA_SHIFT 20
#define SIFCTR_TFUA(i) ((i) << SIFCTR_TFUA_SHIFT)