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arm64: dts: rockchip: add CAN-FD controller nodes to rk3568

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Add nodes to the rk3568 devicetree to support the CAN-FD controllers.

Signed-off-by: David Jander <david@protonic.nl>
Tested-by: Alibek Omarov <a1ba.omarov@gmail.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20240904-rk3568-canfd-v1-1-73bda5fb4e03@pengutronix.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
David Jander
2024-09-04 16:07:56 +02:00
committed by Heiko Stuebner
parent 2edb4f0ede
commit 687d6009ae
1 changed files with 39 additions and 0 deletions
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arch/arm64/boot/dts/rockchip/rk3568.dtsi
+39
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@@ -213,6 +213,45 @@
};
};
can0: can@fe570000 {
compatible = "rockchip,rk3568v2-canfd";
reg = <0x0 0xfe570000 0x0 0x1000>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru CLK_CAN0>, <&cru PCLK_CAN0>;
clock-names = "baud", "pclk";
resets = <&cru SRST_CAN0>, <&cru SRST_P_CAN0>;
reset-names = "core", "apb";
pinctrl-names = "default";
pinctrl-0 = <&can0m0_pins>;
status = "disabled";
};
can1: can@fe580000 {
compatible = "rockchip,rk3568v2-canfd";
reg = <0x0 0xfe580000 0x0 0x1000>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru CLK_CAN1>, <&cru PCLK_CAN1>;
clock-names = "baud", "pclk";
resets = <&cru SRST_CAN1>, <&cru SRST_P_CAN1>;
reset-names = "core", "apb";
pinctrl-names = "default";
pinctrl-0 = <&can1m0_pins>;
status = "disabled";
};
can2: can@fe590000 {
compatible = "rockchip,rk3568v2-canfd";
reg = <0x0 0xfe590000 0x0 0x1000>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru CLK_CAN2>, <&cru PCLK_CAN2>;
clock-names = "baud", "pclk";
resets = <&cru SRST_CAN2>, <&cru SRST_P_CAN2>;
reset-names = "core", "apb";
pinctrl-names = "default";
pinctrl-0 = <&can2m0_pins>;
status = "disabled";
};
combphy0: phy@fe820000 {
compatible = "rockchip,rk3568-naneng-combphy";
reg = <0x0 0xfe820000 0x0 0x100>;