Merge tag 'ti-serdes-for-5.13' into next
TI Serdes changes for 5.13
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@@ -28,13 +28,27 @@ properties:
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'#size-cells':
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const: 0
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'#clock-cells':
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const: 1
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clocks:
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maxItems: 1
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minItems: 1
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maxItems: 2
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description:
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PHY reference clock. Must contain an entry in clock-names.
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PHY reference clock for 1 item. Must contain an entry in clock-names.
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Optional Parent to enable output reference clock.
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clock-names:
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const: refclk
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minItems: 1
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items:
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- const: refclk
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- const: phy_en_refclk
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assigned-clocks:
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maxItems: 3
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assigned-clock-parents:
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maxItems: 3
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reg:
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minItems: 1
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@@ -15,6 +15,7 @@ properties:
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enum:
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- ti,j721e-wiz-16g
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- ti,j721e-wiz-10g
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- ti,am64-wiz-10g
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power-domains:
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maxItems: 1
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@@ -42,6 +43,9 @@ properties:
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"#reset-cells":
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const: 1
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"#clock-cells":
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const: 1
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ranges: true
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assigned-clocks:
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@@ -90,4 +90,9 @@
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#define J7200_SERDES0_LANE3_USB 0x2
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#define J7200_SERDES0_LANE3_IP4_UNUSED 0x3
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/* AM64 */
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#define AM64_SERDES0_LANE0_PCIE0 0x0
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#define AM64_SERDES0_LANE0_USB 0x1
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#endif /* _DT_BINDINGS_MUX_TI_SERDES */
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@@ -10,4 +10,6 @@
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#define TORRENT_SERDES_EXTERNAL_SSC 1
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#define TORRENT_SERDES_INTERNAL_SSC 2
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#define CDNS_TORRENT_REFCLK_DRIVER 0
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#endif /* _DT_BINDINGS_TORRENT_SERDES_H */
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@@ -0,0 +1,21 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* This header provides constants for TI SERDES.
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*/
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#ifndef _DT_BINDINGS_TI_SERDES
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#define _DT_BINDINGS_TI_SERDES
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/* Clock index for output clocks from WIZ */
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/* MUX Clocks */
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#define TI_WIZ_PLL0_REFCLK 0
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#define TI_WIZ_PLL1_REFCLK 1
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#define TI_WIZ_REFCLK_DIG 2
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/* Reserve index here for future additions */
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/* MISC Clocks */
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#define TI_WIZ_PHY_EN_REFCLK 16
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#endif /* _DT_BINDINGS_TI_SERDES */
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