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@@ -37,56 +37,28 @@
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#define EUSB2_TUNE_EUSB_EQU 0x5A
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#define EUSB2_TUNE_EUSB_HS_COMP_CUR 0x5B
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#define QCOM_EUSB2_REPEATER_INIT_CFG(r, v) \
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{ \
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.reg = r, \
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.val = v, \
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}
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enum eusb2_reg_layout {
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TUNE_EUSB_HS_COMP_CUR,
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TUNE_EUSB_EQU,
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TUNE_EUSB_SLEW,
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TUNE_USB2_HS_COMP_CUR,
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TUNE_USB2_PREEM,
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TUNE_USB2_EQU,
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TUNE_USB2_SLEW,
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TUNE_SQUELCH_U,
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TUNE_HSDISC,
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TUNE_RES_FSDIF,
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TUNE_IUSB2,
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TUNE_USB2_CROSSOVER,
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NUM_TUNE_FIELDS,
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enum reg_fields {
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F_TUNE_EUSB_HS_COMP_CUR,
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F_TUNE_EUSB_EQU,
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F_TUNE_EUSB_SLEW,
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F_TUNE_USB2_HS_COMP_CUR,
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F_TUNE_USB2_PREEM,
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F_TUNE_USB2_EQU,
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F_TUNE_USB2_SLEW,
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F_TUNE_SQUELCH_U,
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F_TUNE_HSDISC,
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F_TUNE_RES_FSDIF,
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F_TUNE_IUSB2,
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F_TUNE_USB2_CROSSOVER,
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F_NUM_TUNE_FIELDS,
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FORCE_VAL_5 = NUM_TUNE_FIELDS,
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FORCE_EN_5,
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F_FORCE_VAL_5 = F_NUM_TUNE_FIELDS,
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F_FORCE_EN_5,
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EN_CTL1,
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F_EN_CTL1,
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F_RPTR_STATUS,
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F_NUM_FIELDS,
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};
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static struct reg_field eusb2_repeater_tune_reg_fields[F_NUM_FIELDS] = {
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[F_TUNE_EUSB_HS_COMP_CUR] = REG_FIELD(EUSB2_TUNE_EUSB_HS_COMP_CUR, 0, 1),
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[F_TUNE_EUSB_EQU] = REG_FIELD(EUSB2_TUNE_EUSB_EQU, 0, 1),
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[F_TUNE_EUSB_SLEW] = REG_FIELD(EUSB2_TUNE_EUSB_SLEW, 0, 1),
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[F_TUNE_USB2_HS_COMP_CUR] = REG_FIELD(EUSB2_TUNE_USB2_HS_COMP_CUR, 0, 1),
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[F_TUNE_USB2_PREEM] = REG_FIELD(EUSB2_TUNE_USB2_PREEM, 0, 2),
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[F_TUNE_USB2_EQU] = REG_FIELD(EUSB2_TUNE_USB2_EQU, 0, 1),
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[F_TUNE_USB2_SLEW] = REG_FIELD(EUSB2_TUNE_USB2_SLEW, 0, 1),
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[F_TUNE_SQUELCH_U] = REG_FIELD(EUSB2_TUNE_SQUELCH_U, 0, 2),
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[F_TUNE_HSDISC] = REG_FIELD(EUSB2_TUNE_HSDISC, 0, 2),
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[F_TUNE_RES_FSDIF] = REG_FIELD(EUSB2_TUNE_RES_FSDIF, 0, 2),
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[F_TUNE_IUSB2] = REG_FIELD(EUSB2_TUNE_IUSB2, 0, 3),
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[F_TUNE_USB2_CROSSOVER] = REG_FIELD(EUSB2_TUNE_USB2_CROSSOVER, 0, 2),
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[F_FORCE_VAL_5] = REG_FIELD(EUSB2_FORCE_VAL_5, 0, 7),
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[F_FORCE_EN_5] = REG_FIELD(EUSB2_FORCE_EN_5, 0, 7),
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[F_EN_CTL1] = REG_FIELD(EUSB2_EN_CTL1, 0, 7),
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[F_RPTR_STATUS] = REG_FIELD(EUSB2_RPTR_STATUS, 0, 7),
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RPTR_STATUS,
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LAYOUT_SIZE,
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};
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struct eusb2_repeater_cfg {
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@@ -98,10 +70,11 @@ struct eusb2_repeater_cfg {
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struct eusb2_repeater {
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struct device *dev;
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struct regmap_field *regs[F_NUM_FIELDS];
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struct regmap *regmap;
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struct phy *phy;
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struct regulator_bulk_data *vregs;
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const struct eusb2_repeater_cfg *cfg;
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u32 base;
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enum phy_mode mode;
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};
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@@ -109,10 +82,10 @@ static const char * const pm8550b_vreg_l[] = {
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"vdd18", "vdd3",
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};
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static const u32 pm8550b_init_tbl[F_NUM_TUNE_FIELDS] = {
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[F_TUNE_IUSB2] = 0x8,
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[F_TUNE_SQUELCH_U] = 0x3,
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[F_TUNE_USB2_PREEM] = 0x5,
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static const u32 pm8550b_init_tbl[NUM_TUNE_FIELDS] = {
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[TUNE_IUSB2] = 0x8,
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[TUNE_SQUELCH_U] = 0x3,
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[TUNE_USB2_PREEM] = 0x5,
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};
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static const struct eusb2_repeater_cfg pm8550b_eusb2_cfg = {
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@@ -140,47 +113,42 @@ static int eusb2_repeater_init_vregs(struct eusb2_repeater *rptr)
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static int eusb2_repeater_init(struct phy *phy)
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{
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struct reg_field *regfields = eusb2_repeater_tune_reg_fields;
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struct eusb2_repeater *rptr = phy_get_drvdata(phy);
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struct device_node *np = rptr->dev->of_node;
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u32 init_tbl[F_NUM_TUNE_FIELDS] = { 0 };
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u8 override;
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struct regmap *regmap = rptr->regmap;
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const u32 *init_tbl = rptr->cfg->init_tbl;
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u8 tune_usb2_preem = init_tbl[TUNE_USB2_PREEM];
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u8 tune_hsdisc = init_tbl[TUNE_HSDISC];
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u8 tune_iusb2 = init_tbl[TUNE_IUSB2];
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u32 base = rptr->base;
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u32 val;
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int ret;
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int i;
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of_property_read_u8(np, "qcom,tune-usb2-amplitude", &tune_iusb2);
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of_property_read_u8(np, "qcom,tune-usb2-disc-thres", &tune_hsdisc);
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of_property_read_u8(np, "qcom,tune-usb2-preem", &tune_usb2_preem);
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ret = regulator_bulk_enable(rptr->cfg->num_vregs, rptr->vregs);
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if (ret)
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return ret;
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regmap_field_update_bits(rptr->regs[F_EN_CTL1], EUSB2_RPTR_EN, EUSB2_RPTR_EN);
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regmap_write(regmap, base + EUSB2_EN_CTL1, EUSB2_RPTR_EN);
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for (i = 0; i < F_NUM_TUNE_FIELDS; i++) {
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if (init_tbl[i]) {
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regmap_field_update_bits(rptr->regs[i], init_tbl[i], init_tbl[i]);
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} else {
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/* Write 0 if there's no value set */
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u32 mask = GENMASK(regfields[i].msb, regfields[i].lsb);
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regmap_write(regmap, base + EUSB2_TUNE_EUSB_HS_COMP_CUR, init_tbl[TUNE_EUSB_HS_COMP_CUR]);
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regmap_write(regmap, base + EUSB2_TUNE_EUSB_EQU, init_tbl[TUNE_EUSB_EQU]);
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regmap_write(regmap, base + EUSB2_TUNE_EUSB_SLEW, init_tbl[TUNE_EUSB_SLEW]);
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regmap_write(regmap, base + EUSB2_TUNE_USB2_HS_COMP_CUR, init_tbl[TUNE_USB2_HS_COMP_CUR]);
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regmap_write(regmap, base + EUSB2_TUNE_USB2_EQU, init_tbl[TUNE_USB2_EQU]);
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regmap_write(regmap, base + EUSB2_TUNE_USB2_SLEW, init_tbl[TUNE_USB2_SLEW]);
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regmap_write(regmap, base + EUSB2_TUNE_SQUELCH_U, init_tbl[TUNE_SQUELCH_U]);
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regmap_write(regmap, base + EUSB2_TUNE_RES_FSDIF, init_tbl[TUNE_RES_FSDIF]);
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regmap_write(regmap, base + EUSB2_TUNE_USB2_CROSSOVER, init_tbl[TUNE_USB2_CROSSOVER]);
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regmap_field_update_bits(rptr->regs[i], mask, 0);
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}
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}
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memcpy(init_tbl, rptr->cfg->init_tbl, sizeof(init_tbl));
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regmap_write(regmap, base + EUSB2_TUNE_USB2_PREEM, tune_usb2_preem);
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regmap_write(regmap, base + EUSB2_TUNE_HSDISC, tune_hsdisc);
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regmap_write(regmap, base + EUSB2_TUNE_IUSB2, tune_iusb2);
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if (!of_property_read_u8(np, "qcom,tune-usb2-amplitude", &override))
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init_tbl[F_TUNE_IUSB2] = override;
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if (!of_property_read_u8(np, "qcom,tune-usb2-disc-thres", &override))
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init_tbl[F_TUNE_HSDISC] = override;
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if (!of_property_read_u8(np, "qcom,tune-usb2-preem", &override))
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init_tbl[F_TUNE_USB2_PREEM] = override;
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for (i = 0; i < F_NUM_TUNE_FIELDS; i++)
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regmap_field_update_bits(rptr->regs[i], init_tbl[i], init_tbl[i]);
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ret = regmap_field_read_poll_timeout(rptr->regs[F_RPTR_STATUS],
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val, val & RPTR_OK, 10, 5);
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ret = regmap_read_poll_timeout(regmap, base + EUSB2_RPTR_STATUS, val, val & RPTR_OK, 10, 5);
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if (ret)
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dev_err(rptr->dev, "initialization timed-out\n");
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@@ -191,6 +159,8 @@ static int eusb2_repeater_set_mode(struct phy *phy,
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enum phy_mode mode, int submode)
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{
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struct eusb2_repeater *rptr = phy_get_drvdata(phy);
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struct regmap *regmap = rptr->regmap;
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u32 base = rptr->base;
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switch (mode) {
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case PHY_MODE_USB_HOST:
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@@ -199,10 +169,8 @@ static int eusb2_repeater_set_mode(struct phy *phy,
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* per eUSB 1.2 Spec. Below implement software workaround until
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* PHY and controller is fixing seen observation.
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*/
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regmap_field_update_bits(rptr->regs[F_FORCE_EN_5],
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F_CLK_19P2M_EN, F_CLK_19P2M_EN);
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regmap_field_update_bits(rptr->regs[F_FORCE_VAL_5],
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V_CLK_19P2M_EN, V_CLK_19P2M_EN);
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regmap_write(regmap, base + EUSB2_FORCE_EN_5, F_CLK_19P2M_EN);
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regmap_write(regmap, base + EUSB2_FORCE_VAL_5, V_CLK_19P2M_EN);
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break;
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case PHY_MODE_USB_DEVICE:
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/*
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@@ -211,10 +179,8 @@ static int eusb2_repeater_set_mode(struct phy *phy,
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* repeater doesn't clear previous value due to shared
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* regulators (say host <-> device mode switch).
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*/
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regmap_field_update_bits(rptr->regs[F_FORCE_EN_5],
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F_CLK_19P2M_EN, 0);
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regmap_field_update_bits(rptr->regs[F_FORCE_VAL_5],
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V_CLK_19P2M_EN, 0);
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regmap_write(regmap, base + EUSB2_FORCE_EN_5, 0);
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regmap_write(regmap, base + EUSB2_FORCE_VAL_5, 0);
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break;
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default:
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return -EINVAL;
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@@ -243,9 +209,8 @@ static int eusb2_repeater_probe(struct platform_device *pdev)
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struct device *dev = &pdev->dev;
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struct phy_provider *phy_provider;
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struct device_node *np = dev->of_node;
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struct regmap *regmap;
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int i, ret;
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u32 res;
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int ret;
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rptr = devm_kzalloc(dev, sizeof(*rptr), GFP_KERNEL);
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if (!rptr)
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@@ -258,22 +223,15 @@ static int eusb2_repeater_probe(struct platform_device *pdev)
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if (!rptr->cfg)
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return -EINVAL;
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regmap = dev_get_regmap(dev->parent, NULL);
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if (!regmap)
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rptr->regmap = dev_get_regmap(dev->parent, NULL);
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if (!rptr->regmap)
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return -ENODEV;
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ret = of_property_read_u32(np, "reg", &res);
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if (ret < 0)
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return ret;
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for (i = 0; i < F_NUM_FIELDS; i++)
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eusb2_repeater_tune_reg_fields[i].reg += res;
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ret = devm_regmap_field_bulk_alloc(dev, regmap, rptr->regs,
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eusb2_repeater_tune_reg_fields,
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F_NUM_FIELDS);
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if (ret)
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return ret;
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rptr->base = res;
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ret = eusb2_repeater_init_vregs(rptr);
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if (ret < 0) {
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